1.\" Copyright (c) 2001 Yar Tikhiy 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. 9.\" 2. Redistributions in binary form must reproduce the above copyright 10.\" notice, this list of conditions and the following disclaimer in the 11.\" documentation and/or other materials provided with the distribution. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23.\" SUCH DAMAGE. 24.\" 25.Dd November 28, 2007 26.Dt AGP 4 27.Os 28.Sh NAME 29.Nm agp 30.Nd "generic interface to the Accelerated Graphics Port (AGP)" 31.Sh SYNOPSIS 32.Cd "device agp" 33.Sh DESCRIPTION 34The 35.Nm 36driver provides uniform, abstract methods for controlling 37the following devices: 38.Pp 39.Bl -tag -width "NVIDIA:" -compact 40.It Ali: 41M1541, M1621 and M1671 host to AGP bridges 42.It AMD: 43751, 761 and 762 host to AGP bridges 44.It ATI: 45RS100, RS200, RS250 and RS300 AGP bridges 46.It Intel: 47i820, i840, i845, i850, and i860 host to AGP bridges 48.It Intel: 49i810, i810-DC100, i810E, i815, 830M, 845G, 845M, 852GM, 852GME, 855GM, 855GME, 865G, 915G and 915GM SVGA controllers 50.It Intel: 5182443BX, 82443GX, 82443LX, 82815, 82820, 82830, 82840, 82845, 82845G, 82850, 82855, 82855GM, 82860, 82865, 82875P, E7205 and E7505 host to AGP bridges 52.It NVIDIA: 53nForce and nForce2 AGP controllers 54.It SiS: 55530, 540, 550, 620, 630, 645, 645DX, 648, 650, 651, 655, 661, 730, 735, 740, 741, 745, 746, 760 and 5591 host to AGP bridges 56.It VIA: 573296, 82C597, 82C598, 82C691, 82C694X, 82C8363, 8235, 8237, 8361, 8367, 8371, 8377, 8501, 8601, 862x, 8633, 8653, 8703, 8753, 8754, 8763, 8783, KT880, PM800, PM880, PN800, PN880, PT880, XM266 and XN266 host to PCI bridges 58.El 59.Pp 60The most common application of 61.Nm 62is for running 63.Xr X 7 Pq Pa ports/x11/xorg-docs 64on the Intel i81x controllers. 65.Sh IOCTLS 66The following 67.Xr ioctl 2 68operations can be performed on 69.Pa /dev/agpgart , 70which are defined in 71.In sys/agpio.h : 72.Bl -tag -width indent 73.It Dv AGPIOC_INFO 74Returns state of the 75.Nm 76system. 77The result is a pointer to the following structure: 78.Bd -literal 79typedef struct _agp_info { 80 agp_version version; /* version of the driver */ 81 uint32_t bridge_id; /* bridge vendor/device */ 82 uint32_t agp_mode; /* mode info of bridge */ 83 off_t aper_base; /* base of aperture */ 84 size_t aper_size; /* size of aperture */ 85 size_t pg_total; /* max pages (swap + system) */ 86 size_t pg_system; /* max pages (system) */ 87 size_t pg_used; /* current pages used */ 88} agp_info; 89.Ed 90.It Dv AGPIOC_ACQUIRE 91Acquire control of the AGP chipset for use by this client. 92Returns 93.Er EBUSY 94if the AGP chipset is already acquired by another client. 95.It Dv AGPIOC_RELEASE 96Release control of the AGP chipset. 97This does not unbind or free any allocated memory, which is the 98responsibility of the client to handle if necessary. 99.It Dv AGPIOC_SETUP 100Enable the AGP hardware with the relevant mode. 101This 102.Xr ioctl 2 103takes the following structure: 104.Bd -literal 105typedef struct _agp_setup { 106 uint32_t agp_mode; /* mode info of bridge */ 107} agp_setup; 108.Ed 109.Pp 110The mode bits are defined in 111.In sys/agpio.h . 112.It Dv AGPIOC_ALLOCATE 113Allocate physical memory suitable for mapping into the AGP aperture. 114This 115.Xr ioctl 2 116takes the following structure: 117.Bd -literal 118typedef struct _agp_allocate { 119 int key; /* tag of allocation */ 120 size_t pg_count; /* number of pages */ 121 uint32_t type; /* 0 == normal, other devspec */ 122 uint32_t physical; /* device specific (some devices 123 * need a phys address of the 124 * actual page behind the gatt 125 * table) */ 126} agp_allocate; 127.Ed 128.Pp 129Returns a handle to the allocated memory. 130.It Dv AGPIOC_DEALLOCATE 131Free the previously allocated memory associated with the handle passed. 132.It Dv AGPIOC_BIND 133Bind the allocated memory at given offset with the AGP aperture. 134Returns 135.Er EINVAL 136if the memory is already bound or the offset is not at AGP page boundary. 137This 138.Xr ioctl 2 139takes the following structure: 140.Bd -literal 141typedef struct _agp_bind { 142 int key; /* tag of allocation */ 143 off_t pg_start; /* starting page to populate */ 144} agp_bind; 145.Ed 146.Pp 147The tag of allocation is the handle returned by 148.Dv AGPIOC_ALLOCATE . 149.It Dv AGPIOC_UNBIND 150Unbind memory from the AGP aperture. 151Returns 152.Er EINVAL 153if the memory is not bound. 154This 155.Xr ioctl 2 156takes the following structure: 157.Bd -literal 158typedef struct _agp_unbind { 159 int key; /* tag of allocation */ 160 uint32_t priority; /* priority for paging out */ 161} agp_unbind; 162.Ed 163.El 164.Sh FILES 165.Bl -tag -width ".Pa /dev/agpgart" -compact 166.It Pa /dev/agpgart 167AGP device node. 168.El 169.Sh SEE ALSO 170.Xr X 7 Pq Pa ports/x11/xorg 171.Sh HISTORY 172The 173.Nm 174driver first appeared in 175.Fx 4.1 . 176