1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2011 NetApp, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <sys/param.h> 35 #include <sys/sysctl.h> 36 #include <sys/ioctl.h> 37 #include <sys/mman.h> 38 #include <sys/_iovec.h> 39 #include <sys/cpuset.h> 40 41 #include <x86/segments.h> 42 #include <machine/specialreg.h> 43 44 #include <errno.h> 45 #include <stdio.h> 46 #include <stdlib.h> 47 #include <assert.h> 48 #include <string.h> 49 #include <fcntl.h> 50 #include <unistd.h> 51 52 #include <libutil.h> 53 54 #include <machine/vmm.h> 55 #include <machine/vmm_dev.h> 56 57 #include "vmmapi.h" 58 59 #define MB (1024 * 1024UL) 60 #define GB (1024 * 1024 * 1024UL) 61 62 /* 63 * Size of the guard region before and after the virtual address space 64 * mapping the guest physical memory. This must be a multiple of the 65 * superpage size for performance reasons. 66 */ 67 #define VM_MMAP_GUARD_SIZE (4 * MB) 68 69 #define PROT_RW (PROT_READ | PROT_WRITE) 70 #define PROT_ALL (PROT_READ | PROT_WRITE | PROT_EXEC) 71 72 struct vmctx { 73 int fd; 74 uint32_t lowmem_limit; 75 int memflags; 76 size_t lowmem; 77 size_t highmem; 78 char *baseaddr; 79 char *name; 80 }; 81 82 #define CREATE(x) sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x))) 83 #define DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x))) 84 85 static int 86 vm_device_open(const char *name) 87 { 88 int fd, len; 89 char *vmfile; 90 91 len = strlen("/dev/vmm/") + strlen(name) + 1; 92 vmfile = malloc(len); 93 assert(vmfile != NULL); 94 snprintf(vmfile, len, "/dev/vmm/%s", name); 95 96 /* Open the device file */ 97 fd = open(vmfile, O_RDWR, 0); 98 99 free(vmfile); 100 return (fd); 101 } 102 103 int 104 vm_create(const char *name) 105 { 106 107 return (CREATE((char *)name)); 108 } 109 110 struct vmctx * 111 vm_open(const char *name) 112 { 113 struct vmctx *vm; 114 115 vm = malloc(sizeof(struct vmctx) + strlen(name) + 1); 116 assert(vm != NULL); 117 118 vm->fd = -1; 119 vm->memflags = 0; 120 vm->lowmem_limit = 3 * GB; 121 vm->name = (char *)(vm + 1); 122 strcpy(vm->name, name); 123 124 if ((vm->fd = vm_device_open(vm->name)) < 0) 125 goto err; 126 127 return (vm); 128 err: 129 vm_destroy(vm); 130 return (NULL); 131 } 132 133 void 134 vm_destroy(struct vmctx *vm) 135 { 136 assert(vm != NULL); 137 138 if (vm->fd >= 0) 139 close(vm->fd); 140 DESTROY(vm->name); 141 142 free(vm); 143 } 144 145 int 146 vm_parse_memsize(const char *optarg, size_t *ret_memsize) 147 { 148 char *endptr; 149 size_t optval; 150 int error; 151 152 optval = strtoul(optarg, &endptr, 0); 153 if (*optarg != '\0' && *endptr == '\0') { 154 /* 155 * For the sake of backward compatibility if the memory size 156 * specified on the command line is less than a megabyte then 157 * it is interpreted as being in units of MB. 158 */ 159 if (optval < MB) 160 optval *= MB; 161 *ret_memsize = optval; 162 error = 0; 163 } else 164 error = expand_number(optarg, ret_memsize); 165 166 return (error); 167 } 168 169 uint32_t 170 vm_get_lowmem_limit(struct vmctx *ctx) 171 { 172 173 return (ctx->lowmem_limit); 174 } 175 176 void 177 vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit) 178 { 179 180 ctx->lowmem_limit = limit; 181 } 182 183 void 184 vm_set_memflags(struct vmctx *ctx, int flags) 185 { 186 187 ctx->memflags = flags; 188 } 189 190 int 191 vm_get_memflags(struct vmctx *ctx) 192 { 193 194 return (ctx->memflags); 195 } 196 197 /* 198 * Map segment 'segid' starting at 'off' into guest address range [gpa,gpa+len). 199 */ 200 int 201 vm_mmap_memseg(struct vmctx *ctx, vm_paddr_t gpa, int segid, vm_ooffset_t off, 202 size_t len, int prot) 203 { 204 struct vm_memmap memmap; 205 int error, flags; 206 207 memmap.gpa = gpa; 208 memmap.segid = segid; 209 memmap.segoff = off; 210 memmap.len = len; 211 memmap.prot = prot; 212 memmap.flags = 0; 213 214 if (ctx->memflags & VM_MEM_F_WIRED) 215 memmap.flags |= VM_MEMMAP_F_WIRED; 216 217 /* 218 * If this mapping already exists then don't create it again. This 219 * is the common case for SYSMEM mappings created by bhyveload(8). 220 */ 221 error = vm_mmap_getnext(ctx, &gpa, &segid, &off, &len, &prot, &flags); 222 if (error == 0 && gpa == memmap.gpa) { 223 if (segid != memmap.segid || off != memmap.segoff || 224 prot != memmap.prot || flags != memmap.flags) { 225 errno = EEXIST; 226 return (-1); 227 } else { 228 return (0); 229 } 230 } 231 232 error = ioctl(ctx->fd, VM_MMAP_MEMSEG, &memmap); 233 return (error); 234 } 235 236 int 237 vm_mmap_getnext(struct vmctx *ctx, vm_paddr_t *gpa, int *segid, 238 vm_ooffset_t *segoff, size_t *len, int *prot, int *flags) 239 { 240 struct vm_memmap memmap; 241 int error; 242 243 bzero(&memmap, sizeof(struct vm_memmap)); 244 memmap.gpa = *gpa; 245 error = ioctl(ctx->fd, VM_MMAP_GETNEXT, &memmap); 246 if (error == 0) { 247 *gpa = memmap.gpa; 248 *segid = memmap.segid; 249 *segoff = memmap.segoff; 250 *len = memmap.len; 251 *prot = memmap.prot; 252 *flags = memmap.flags; 253 } 254 return (error); 255 } 256 257 /* 258 * Return 0 if the segments are identical and non-zero otherwise. 259 * 260 * This is slightly complicated by the fact that only device memory segments 261 * are named. 262 */ 263 static int 264 cmpseg(size_t len, const char *str, size_t len2, const char *str2) 265 { 266 267 if (len == len2) { 268 if ((!str && !str2) || (str && str2 && !strcmp(str, str2))) 269 return (0); 270 } 271 return (-1); 272 } 273 274 static int 275 vm_alloc_memseg(struct vmctx *ctx, int segid, size_t len, const char *name) 276 { 277 struct vm_memseg memseg; 278 size_t n; 279 int error; 280 281 /* 282 * If the memory segment has already been created then just return. 283 * This is the usual case for the SYSMEM segment created by userspace 284 * loaders like bhyveload(8). 285 */ 286 error = vm_get_memseg(ctx, segid, &memseg.len, memseg.name, 287 sizeof(memseg.name)); 288 if (error) 289 return (error); 290 291 if (memseg.len != 0) { 292 if (cmpseg(len, name, memseg.len, VM_MEMSEG_NAME(&memseg))) { 293 errno = EINVAL; 294 return (-1); 295 } else { 296 return (0); 297 } 298 } 299 300 bzero(&memseg, sizeof(struct vm_memseg)); 301 memseg.segid = segid; 302 memseg.len = len; 303 if (name != NULL) { 304 n = strlcpy(memseg.name, name, sizeof(memseg.name)); 305 if (n >= sizeof(memseg.name)) { 306 errno = ENAMETOOLONG; 307 return (-1); 308 } 309 } 310 311 error = ioctl(ctx->fd, VM_ALLOC_MEMSEG, &memseg); 312 return (error); 313 } 314 315 int 316 vm_get_memseg(struct vmctx *ctx, int segid, size_t *lenp, char *namebuf, 317 size_t bufsize) 318 { 319 struct vm_memseg memseg; 320 size_t n; 321 int error; 322 323 memseg.segid = segid; 324 error = ioctl(ctx->fd, VM_GET_MEMSEG, &memseg); 325 if (error == 0) { 326 *lenp = memseg.len; 327 n = strlcpy(namebuf, memseg.name, bufsize); 328 if (n >= bufsize) { 329 errno = ENAMETOOLONG; 330 error = -1; 331 } 332 } 333 return (error); 334 } 335 336 static int 337 setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char *base) 338 { 339 char *ptr; 340 int error, flags; 341 342 /* Map 'len' bytes starting at 'gpa' in the guest address space */ 343 error = vm_mmap_memseg(ctx, gpa, VM_SYSMEM, gpa, len, PROT_ALL); 344 if (error) 345 return (error); 346 347 flags = MAP_SHARED | MAP_FIXED; 348 if ((ctx->memflags & VM_MEM_F_INCORE) == 0) 349 flags |= MAP_NOCORE; 350 351 /* mmap into the process address space on the host */ 352 ptr = mmap(base + gpa, len, PROT_RW, flags, ctx->fd, gpa); 353 if (ptr == MAP_FAILED) 354 return (-1); 355 356 return (0); 357 } 358 359 int 360 vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms) 361 { 362 size_t objsize, len; 363 vm_paddr_t gpa; 364 char *baseaddr, *ptr; 365 int error, flags; 366 367 assert(vms == VM_MMAP_ALL); 368 369 /* 370 * If 'memsize' cannot fit entirely in the 'lowmem' segment then 371 * create another 'highmem' segment above 4GB for the remainder. 372 */ 373 if (memsize > ctx->lowmem_limit) { 374 ctx->lowmem = ctx->lowmem_limit; 375 ctx->highmem = memsize - ctx->lowmem_limit; 376 objsize = 4*GB + ctx->highmem; 377 } else { 378 ctx->lowmem = memsize; 379 ctx->highmem = 0; 380 objsize = ctx->lowmem; 381 } 382 383 error = vm_alloc_memseg(ctx, VM_SYSMEM, objsize, NULL); 384 if (error) 385 return (error); 386 387 /* 388 * Stake out a contiguous region covering the guest physical memory 389 * and the adjoining guard regions. 390 */ 391 len = VM_MMAP_GUARD_SIZE + objsize + VM_MMAP_GUARD_SIZE; 392 flags = MAP_PRIVATE | MAP_ANON | MAP_NOCORE | MAP_ALIGNED_SUPER; 393 ptr = mmap(NULL, len, PROT_NONE, flags, -1, 0); 394 if (ptr == MAP_FAILED) 395 return (-1); 396 397 baseaddr = ptr + VM_MMAP_GUARD_SIZE; 398 if (ctx->highmem > 0) { 399 gpa = 4*GB; 400 len = ctx->highmem; 401 error = setup_memory_segment(ctx, gpa, len, baseaddr); 402 if (error) 403 return (error); 404 } 405 406 if (ctx->lowmem > 0) { 407 gpa = 0; 408 len = ctx->lowmem; 409 error = setup_memory_segment(ctx, gpa, len, baseaddr); 410 if (error) 411 return (error); 412 } 413 414 ctx->baseaddr = baseaddr; 415 416 return (0); 417 } 418 419 /* 420 * Returns a non-NULL pointer if [gaddr, gaddr+len) is entirely contained in 421 * the lowmem or highmem regions. 422 * 423 * In particular return NULL if [gaddr, gaddr+len) falls in guest MMIO region. 424 * The instruction emulation code depends on this behavior. 425 */ 426 void * 427 vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len) 428 { 429 430 if (ctx->lowmem > 0) { 431 if (gaddr < ctx->lowmem && len <= ctx->lowmem && 432 gaddr + len <= ctx->lowmem) 433 return (ctx->baseaddr + gaddr); 434 } 435 436 if (ctx->highmem > 0) { 437 if (gaddr >= 4*GB) { 438 if (gaddr < 4*GB + ctx->highmem && 439 len <= ctx->highmem && 440 gaddr + len <= 4*GB + ctx->highmem) 441 return (ctx->baseaddr + gaddr); 442 } 443 } 444 445 return (NULL); 446 } 447 448 size_t 449 vm_get_lowmem_size(struct vmctx *ctx) 450 { 451 452 return (ctx->lowmem); 453 } 454 455 size_t 456 vm_get_highmem_size(struct vmctx *ctx) 457 { 458 459 return (ctx->highmem); 460 } 461 462 void * 463 vm_create_devmem(struct vmctx *ctx, int segid, const char *name, size_t len) 464 { 465 char pathname[MAXPATHLEN]; 466 size_t len2; 467 char *base, *ptr; 468 int fd, error, flags; 469 470 fd = -1; 471 ptr = MAP_FAILED; 472 if (name == NULL || strlen(name) == 0) { 473 errno = EINVAL; 474 goto done; 475 } 476 477 error = vm_alloc_memseg(ctx, segid, len, name); 478 if (error) 479 goto done; 480 481 strlcpy(pathname, "/dev/vmm.io/", sizeof(pathname)); 482 strlcat(pathname, ctx->name, sizeof(pathname)); 483 strlcat(pathname, ".", sizeof(pathname)); 484 strlcat(pathname, name, sizeof(pathname)); 485 486 fd = open(pathname, O_RDWR); 487 if (fd < 0) 488 goto done; 489 490 /* 491 * Stake out a contiguous region covering the device memory and the 492 * adjoining guard regions. 493 */ 494 len2 = VM_MMAP_GUARD_SIZE + len + VM_MMAP_GUARD_SIZE; 495 flags = MAP_PRIVATE | MAP_ANON | MAP_NOCORE | MAP_ALIGNED_SUPER; 496 base = mmap(NULL, len2, PROT_NONE, flags, -1, 0); 497 if (base == MAP_FAILED) 498 goto done; 499 500 flags = MAP_SHARED | MAP_FIXED; 501 if ((ctx->memflags & VM_MEM_F_INCORE) == 0) 502 flags |= MAP_NOCORE; 503 504 /* mmap the devmem region in the host address space */ 505 ptr = mmap(base + VM_MMAP_GUARD_SIZE, len, PROT_RW, flags, fd, 0); 506 done: 507 if (fd >= 0) 508 close(fd); 509 return (ptr); 510 } 511 512 int 513 vm_set_desc(struct vmctx *ctx, int vcpu, int reg, 514 uint64_t base, uint32_t limit, uint32_t access) 515 { 516 int error; 517 struct vm_seg_desc vmsegdesc; 518 519 bzero(&vmsegdesc, sizeof(vmsegdesc)); 520 vmsegdesc.cpuid = vcpu; 521 vmsegdesc.regnum = reg; 522 vmsegdesc.desc.base = base; 523 vmsegdesc.desc.limit = limit; 524 vmsegdesc.desc.access = access; 525 526 error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc); 527 return (error); 528 } 529 530 int 531 vm_get_desc(struct vmctx *ctx, int vcpu, int reg, 532 uint64_t *base, uint32_t *limit, uint32_t *access) 533 { 534 int error; 535 struct vm_seg_desc vmsegdesc; 536 537 bzero(&vmsegdesc, sizeof(vmsegdesc)); 538 vmsegdesc.cpuid = vcpu; 539 vmsegdesc.regnum = reg; 540 541 error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc); 542 if (error == 0) { 543 *base = vmsegdesc.desc.base; 544 *limit = vmsegdesc.desc.limit; 545 *access = vmsegdesc.desc.access; 546 } 547 return (error); 548 } 549 550 int 551 vm_get_seg_desc(struct vmctx *ctx, int vcpu, int reg, struct seg_desc *seg_desc) 552 { 553 int error; 554 555 error = vm_get_desc(ctx, vcpu, reg, &seg_desc->base, &seg_desc->limit, 556 &seg_desc->access); 557 return (error); 558 } 559 560 int 561 vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val) 562 { 563 int error; 564 struct vm_register vmreg; 565 566 bzero(&vmreg, sizeof(vmreg)); 567 vmreg.cpuid = vcpu; 568 vmreg.regnum = reg; 569 vmreg.regval = val; 570 571 error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg); 572 return (error); 573 } 574 575 int 576 vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val) 577 { 578 int error; 579 struct vm_register vmreg; 580 581 bzero(&vmreg, sizeof(vmreg)); 582 vmreg.cpuid = vcpu; 583 vmreg.regnum = reg; 584 585 error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg); 586 *ret_val = vmreg.regval; 587 return (error); 588 } 589 590 int 591 vm_run(struct vmctx *ctx, int vcpu, struct vm_exit *vmexit) 592 { 593 int error; 594 struct vm_run vmrun; 595 596 bzero(&vmrun, sizeof(vmrun)); 597 vmrun.cpuid = vcpu; 598 599 error = ioctl(ctx->fd, VM_RUN, &vmrun); 600 bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit)); 601 return (error); 602 } 603 604 int 605 vm_suspend(struct vmctx *ctx, enum vm_suspend_how how) 606 { 607 struct vm_suspend vmsuspend; 608 609 bzero(&vmsuspend, sizeof(vmsuspend)); 610 vmsuspend.how = how; 611 return (ioctl(ctx->fd, VM_SUSPEND, &vmsuspend)); 612 } 613 614 int 615 vm_reinit(struct vmctx *ctx) 616 { 617 618 return (ioctl(ctx->fd, VM_REINIT, 0)); 619 } 620 621 int 622 vm_inject_exception(struct vmctx *ctx, int vcpu, int vector, int errcode_valid, 623 uint32_t errcode, int restart_instruction) 624 { 625 struct vm_exception exc; 626 627 exc.cpuid = vcpu; 628 exc.vector = vector; 629 exc.error_code = errcode; 630 exc.error_code_valid = errcode_valid; 631 exc.restart_instruction = restart_instruction; 632 633 return (ioctl(ctx->fd, VM_INJECT_EXCEPTION, &exc)); 634 } 635 636 int 637 vm_apicid2vcpu(struct vmctx *ctx, int apicid) 638 { 639 /* 640 * The apic id associated with the 'vcpu' has the same numerical value 641 * as the 'vcpu' itself. 642 */ 643 return (apicid); 644 } 645 646 int 647 vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector) 648 { 649 struct vm_lapic_irq vmirq; 650 651 bzero(&vmirq, sizeof(vmirq)); 652 vmirq.cpuid = vcpu; 653 vmirq.vector = vector; 654 655 return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq)); 656 } 657 658 int 659 vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector) 660 { 661 struct vm_lapic_irq vmirq; 662 663 bzero(&vmirq, sizeof(vmirq)); 664 vmirq.cpuid = vcpu; 665 vmirq.vector = vector; 666 667 return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq)); 668 } 669 670 int 671 vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg) 672 { 673 struct vm_lapic_msi vmmsi; 674 675 bzero(&vmmsi, sizeof(vmmsi)); 676 vmmsi.addr = addr; 677 vmmsi.msg = msg; 678 679 return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi)); 680 } 681 682 int 683 vm_ioapic_assert_irq(struct vmctx *ctx, int irq) 684 { 685 struct vm_ioapic_irq ioapic_irq; 686 687 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 688 ioapic_irq.irq = irq; 689 690 return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq)); 691 } 692 693 int 694 vm_ioapic_deassert_irq(struct vmctx *ctx, int irq) 695 { 696 struct vm_ioapic_irq ioapic_irq; 697 698 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 699 ioapic_irq.irq = irq; 700 701 return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq)); 702 } 703 704 int 705 vm_ioapic_pulse_irq(struct vmctx *ctx, int irq) 706 { 707 struct vm_ioapic_irq ioapic_irq; 708 709 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 710 ioapic_irq.irq = irq; 711 712 return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq)); 713 } 714 715 int 716 vm_ioapic_pincount(struct vmctx *ctx, int *pincount) 717 { 718 719 return (ioctl(ctx->fd, VM_IOAPIC_PINCOUNT, pincount)); 720 } 721 722 int 723 vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 724 { 725 struct vm_isa_irq isa_irq; 726 727 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 728 isa_irq.atpic_irq = atpic_irq; 729 isa_irq.ioapic_irq = ioapic_irq; 730 731 return (ioctl(ctx->fd, VM_ISA_ASSERT_IRQ, &isa_irq)); 732 } 733 734 int 735 vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 736 { 737 struct vm_isa_irq isa_irq; 738 739 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 740 isa_irq.atpic_irq = atpic_irq; 741 isa_irq.ioapic_irq = ioapic_irq; 742 743 return (ioctl(ctx->fd, VM_ISA_DEASSERT_IRQ, &isa_irq)); 744 } 745 746 int 747 vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 748 { 749 struct vm_isa_irq isa_irq; 750 751 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 752 isa_irq.atpic_irq = atpic_irq; 753 isa_irq.ioapic_irq = ioapic_irq; 754 755 return (ioctl(ctx->fd, VM_ISA_PULSE_IRQ, &isa_irq)); 756 } 757 758 int 759 vm_isa_set_irq_trigger(struct vmctx *ctx, int atpic_irq, 760 enum vm_intr_trigger trigger) 761 { 762 struct vm_isa_irq_trigger isa_irq_trigger; 763 764 bzero(&isa_irq_trigger, sizeof(struct vm_isa_irq_trigger)); 765 isa_irq_trigger.atpic_irq = atpic_irq; 766 isa_irq_trigger.trigger = trigger; 767 768 return (ioctl(ctx->fd, VM_ISA_SET_IRQ_TRIGGER, &isa_irq_trigger)); 769 } 770 771 int 772 vm_inject_nmi(struct vmctx *ctx, int vcpu) 773 { 774 struct vm_nmi vmnmi; 775 776 bzero(&vmnmi, sizeof(vmnmi)); 777 vmnmi.cpuid = vcpu; 778 779 return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi)); 780 } 781 782 static struct { 783 const char *name; 784 int type; 785 } capstrmap[] = { 786 { "hlt_exit", VM_CAP_HALT_EXIT }, 787 { "mtrap_exit", VM_CAP_MTRAP_EXIT }, 788 { "pause_exit", VM_CAP_PAUSE_EXIT }, 789 { "unrestricted_guest", VM_CAP_UNRESTRICTED_GUEST }, 790 { "enable_invpcid", VM_CAP_ENABLE_INVPCID }, 791 { 0 } 792 }; 793 794 int 795 vm_capability_name2type(const char *capname) 796 { 797 int i; 798 799 for (i = 0; capstrmap[i].name != NULL && capname != NULL; i++) { 800 if (strcmp(capstrmap[i].name, capname) == 0) 801 return (capstrmap[i].type); 802 } 803 804 return (-1); 805 } 806 807 const char * 808 vm_capability_type2name(int type) 809 { 810 int i; 811 812 for (i = 0; capstrmap[i].name != NULL; i++) { 813 if (capstrmap[i].type == type) 814 return (capstrmap[i].name); 815 } 816 817 return (NULL); 818 } 819 820 int 821 vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, 822 int *retval) 823 { 824 int error; 825 struct vm_capability vmcap; 826 827 bzero(&vmcap, sizeof(vmcap)); 828 vmcap.cpuid = vcpu; 829 vmcap.captype = cap; 830 831 error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap); 832 *retval = vmcap.capval; 833 return (error); 834 } 835 836 int 837 vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val) 838 { 839 struct vm_capability vmcap; 840 841 bzero(&vmcap, sizeof(vmcap)); 842 vmcap.cpuid = vcpu; 843 vmcap.captype = cap; 844 vmcap.capval = val; 845 846 return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap)); 847 } 848 849 int 850 vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func) 851 { 852 struct vm_pptdev pptdev; 853 854 bzero(&pptdev, sizeof(pptdev)); 855 pptdev.bus = bus; 856 pptdev.slot = slot; 857 pptdev.func = func; 858 859 return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev)); 860 } 861 862 int 863 vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func) 864 { 865 struct vm_pptdev pptdev; 866 867 bzero(&pptdev, sizeof(pptdev)); 868 pptdev.bus = bus; 869 pptdev.slot = slot; 870 pptdev.func = func; 871 872 return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev)); 873 } 874 875 int 876 vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func, 877 vm_paddr_t gpa, size_t len, vm_paddr_t hpa) 878 { 879 struct vm_pptdev_mmio pptmmio; 880 881 bzero(&pptmmio, sizeof(pptmmio)); 882 pptmmio.bus = bus; 883 pptmmio.slot = slot; 884 pptmmio.func = func; 885 pptmmio.gpa = gpa; 886 pptmmio.len = len; 887 pptmmio.hpa = hpa; 888 889 return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio)); 890 } 891 892 int 893 vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func, 894 uint64_t addr, uint64_t msg, int numvec) 895 { 896 struct vm_pptdev_msi pptmsi; 897 898 bzero(&pptmsi, sizeof(pptmsi)); 899 pptmsi.vcpu = vcpu; 900 pptmsi.bus = bus; 901 pptmsi.slot = slot; 902 pptmsi.func = func; 903 pptmsi.msg = msg; 904 pptmsi.addr = addr; 905 pptmsi.numvec = numvec; 906 907 return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi)); 908 } 909 910 int 911 vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func, 912 int idx, uint64_t addr, uint64_t msg, uint32_t vector_control) 913 { 914 struct vm_pptdev_msix pptmsix; 915 916 bzero(&pptmsix, sizeof(pptmsix)); 917 pptmsix.vcpu = vcpu; 918 pptmsix.bus = bus; 919 pptmsix.slot = slot; 920 pptmsix.func = func; 921 pptmsix.idx = idx; 922 pptmsix.msg = msg; 923 pptmsix.addr = addr; 924 pptmsix.vector_control = vector_control; 925 926 return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix); 927 } 928 929 uint64_t * 930 vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv, 931 int *ret_entries) 932 { 933 int error; 934 935 static struct vm_stats vmstats; 936 937 vmstats.cpuid = vcpu; 938 939 error = ioctl(ctx->fd, VM_STATS, &vmstats); 940 if (error == 0) { 941 if (ret_entries) 942 *ret_entries = vmstats.num_entries; 943 if (ret_tv) 944 *ret_tv = vmstats.tv; 945 return (vmstats.statbuf); 946 } else 947 return (NULL); 948 } 949 950 const char * 951 vm_get_stat_desc(struct vmctx *ctx, int index) 952 { 953 static struct vm_stat_desc statdesc; 954 955 statdesc.index = index; 956 if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0) 957 return (statdesc.desc); 958 else 959 return (NULL); 960 } 961 962 int 963 vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state) 964 { 965 int error; 966 struct vm_x2apic x2apic; 967 968 bzero(&x2apic, sizeof(x2apic)); 969 x2apic.cpuid = vcpu; 970 971 error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic); 972 *state = x2apic.state; 973 return (error); 974 } 975 976 int 977 vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state) 978 { 979 int error; 980 struct vm_x2apic x2apic; 981 982 bzero(&x2apic, sizeof(x2apic)); 983 x2apic.cpuid = vcpu; 984 x2apic.state = state; 985 986 error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic); 987 988 return (error); 989 } 990 991 /* 992 * From Intel Vol 3a: 993 * Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT 994 */ 995 int 996 vcpu_reset(struct vmctx *vmctx, int vcpu) 997 { 998 int error; 999 uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx; 1000 uint32_t desc_access, desc_limit; 1001 uint16_t sel; 1002 1003 zero = 0; 1004 1005 rflags = 0x2; 1006 error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags); 1007 if (error) 1008 goto done; 1009 1010 rip = 0xfff0; 1011 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0) 1012 goto done; 1013 1014 cr0 = CR0_NE; 1015 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0) 1016 goto done; 1017 1018 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0) 1019 goto done; 1020 1021 cr4 = 0; 1022 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0) 1023 goto done; 1024 1025 /* 1026 * CS: present, r/w, accessed, 16-bit, byte granularity, usable 1027 */ 1028 desc_base = 0xffff0000; 1029 desc_limit = 0xffff; 1030 desc_access = 0x0093; 1031 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS, 1032 desc_base, desc_limit, desc_access); 1033 if (error) 1034 goto done; 1035 1036 sel = 0xf000; 1037 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0) 1038 goto done; 1039 1040 /* 1041 * SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity 1042 */ 1043 desc_base = 0; 1044 desc_limit = 0xffff; 1045 desc_access = 0x0093; 1046 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS, 1047 desc_base, desc_limit, desc_access); 1048 if (error) 1049 goto done; 1050 1051 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS, 1052 desc_base, desc_limit, desc_access); 1053 if (error) 1054 goto done; 1055 1056 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES, 1057 desc_base, desc_limit, desc_access); 1058 if (error) 1059 goto done; 1060 1061 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS, 1062 desc_base, desc_limit, desc_access); 1063 if (error) 1064 goto done; 1065 1066 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS, 1067 desc_base, desc_limit, desc_access); 1068 if (error) 1069 goto done; 1070 1071 sel = 0; 1072 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0) 1073 goto done; 1074 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0) 1075 goto done; 1076 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0) 1077 goto done; 1078 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0) 1079 goto done; 1080 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0) 1081 goto done; 1082 1083 /* General purpose registers */ 1084 rdx = 0xf00; 1085 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0) 1086 goto done; 1087 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0) 1088 goto done; 1089 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0) 1090 goto done; 1091 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0) 1092 goto done; 1093 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0) 1094 goto done; 1095 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0) 1096 goto done; 1097 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0) 1098 goto done; 1099 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0) 1100 goto done; 1101 1102 /* GDTR, IDTR */ 1103 desc_base = 0; 1104 desc_limit = 0xffff; 1105 desc_access = 0; 1106 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR, 1107 desc_base, desc_limit, desc_access); 1108 if (error != 0) 1109 goto done; 1110 1111 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR, 1112 desc_base, desc_limit, desc_access); 1113 if (error != 0) 1114 goto done; 1115 1116 /* TR */ 1117 desc_base = 0; 1118 desc_limit = 0xffff; 1119 desc_access = 0x0000008b; 1120 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access); 1121 if (error) 1122 goto done; 1123 1124 sel = 0; 1125 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0) 1126 goto done; 1127 1128 /* LDTR */ 1129 desc_base = 0; 1130 desc_limit = 0xffff; 1131 desc_access = 0x00000082; 1132 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base, 1133 desc_limit, desc_access); 1134 if (error) 1135 goto done; 1136 1137 sel = 0; 1138 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0) 1139 goto done; 1140 1141 /* XXX cr2, debug registers */ 1142 1143 error = 0; 1144 done: 1145 return (error); 1146 } 1147 1148 int 1149 vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num) 1150 { 1151 int error, i; 1152 struct vm_gpa_pte gpapte; 1153 1154 bzero(&gpapte, sizeof(gpapte)); 1155 gpapte.gpa = gpa; 1156 1157 error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte); 1158 1159 if (error == 0) { 1160 *num = gpapte.ptenum; 1161 for (i = 0; i < gpapte.ptenum; i++) 1162 pte[i] = gpapte.pte[i]; 1163 } 1164 1165 return (error); 1166 } 1167 1168 int 1169 vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities) 1170 { 1171 int error; 1172 struct vm_hpet_cap cap; 1173 1174 bzero(&cap, sizeof(struct vm_hpet_cap)); 1175 error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap); 1176 if (capabilities != NULL) 1177 *capabilities = cap.capabilities; 1178 return (error); 1179 } 1180 1181 int 1182 vm_gla2gpa(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, 1183 uint64_t gla, int prot, uint64_t *gpa, int *fault) 1184 { 1185 struct vm_gla2gpa gg; 1186 int error; 1187 1188 bzero(&gg, sizeof(struct vm_gla2gpa)); 1189 gg.vcpuid = vcpu; 1190 gg.prot = prot; 1191 gg.gla = gla; 1192 gg.paging = *paging; 1193 1194 error = ioctl(ctx->fd, VM_GLA2GPA, &gg); 1195 if (error == 0) { 1196 *fault = gg.fault; 1197 *gpa = gg.gpa; 1198 } 1199 return (error); 1200 } 1201 1202 #ifndef min 1203 #define min(a,b) (((a) < (b)) ? (a) : (b)) 1204 #endif 1205 1206 int 1207 vm_copy_setup(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, 1208 uint64_t gla, size_t len, int prot, struct iovec *iov, int iovcnt, 1209 int *fault) 1210 { 1211 void *va; 1212 uint64_t gpa; 1213 int error, i, n, off; 1214 1215 for (i = 0; i < iovcnt; i++) { 1216 iov[i].iov_base = 0; 1217 iov[i].iov_len = 0; 1218 } 1219 1220 while (len) { 1221 assert(iovcnt > 0); 1222 error = vm_gla2gpa(ctx, vcpu, paging, gla, prot, &gpa, fault); 1223 if (error || *fault) 1224 return (error); 1225 1226 off = gpa & PAGE_MASK; 1227 n = min(len, PAGE_SIZE - off); 1228 1229 va = vm_map_gpa(ctx, gpa, n); 1230 if (va == NULL) 1231 return (EFAULT); 1232 1233 iov->iov_base = va; 1234 iov->iov_len = n; 1235 iov++; 1236 iovcnt--; 1237 1238 gla += n; 1239 len -= n; 1240 } 1241 return (0); 1242 } 1243 1244 void 1245 vm_copy_teardown(struct vmctx *ctx, int vcpu, struct iovec *iov, int iovcnt) 1246 { 1247 1248 return; 1249 } 1250 1251 void 1252 vm_copyin(struct vmctx *ctx, int vcpu, struct iovec *iov, void *vp, size_t len) 1253 { 1254 const char *src; 1255 char *dst; 1256 size_t n; 1257 1258 dst = vp; 1259 while (len) { 1260 assert(iov->iov_len); 1261 n = min(len, iov->iov_len); 1262 src = iov->iov_base; 1263 bcopy(src, dst, n); 1264 1265 iov++; 1266 dst += n; 1267 len -= n; 1268 } 1269 } 1270 1271 void 1272 vm_copyout(struct vmctx *ctx, int vcpu, const void *vp, struct iovec *iov, 1273 size_t len) 1274 { 1275 const char *src; 1276 char *dst; 1277 size_t n; 1278 1279 src = vp; 1280 while (len) { 1281 assert(iov->iov_len); 1282 n = min(len, iov->iov_len); 1283 dst = iov->iov_base; 1284 bcopy(src, dst, n); 1285 1286 iov++; 1287 src += n; 1288 len -= n; 1289 } 1290 } 1291 1292 static int 1293 vm_get_cpus(struct vmctx *ctx, int which, cpuset_t *cpus) 1294 { 1295 struct vm_cpuset vm_cpuset; 1296 int error; 1297 1298 bzero(&vm_cpuset, sizeof(struct vm_cpuset)); 1299 vm_cpuset.which = which; 1300 vm_cpuset.cpusetsize = sizeof(cpuset_t); 1301 vm_cpuset.cpus = cpus; 1302 1303 error = ioctl(ctx->fd, VM_GET_CPUS, &vm_cpuset); 1304 return (error); 1305 } 1306 1307 int 1308 vm_active_cpus(struct vmctx *ctx, cpuset_t *cpus) 1309 { 1310 1311 return (vm_get_cpus(ctx, VM_ACTIVE_CPUS, cpus)); 1312 } 1313 1314 int 1315 vm_suspended_cpus(struct vmctx *ctx, cpuset_t *cpus) 1316 { 1317 1318 return (vm_get_cpus(ctx, VM_SUSPENDED_CPUS, cpus)); 1319 } 1320 1321 int 1322 vm_activate_cpu(struct vmctx *ctx, int vcpu) 1323 { 1324 struct vm_activate_cpu ac; 1325 int error; 1326 1327 bzero(&ac, sizeof(struct vm_activate_cpu)); 1328 ac.vcpuid = vcpu; 1329 error = ioctl(ctx->fd, VM_ACTIVATE_CPU, &ac); 1330 return (error); 1331 } 1332 1333 int 1334 vm_get_intinfo(struct vmctx *ctx, int vcpu, uint64_t *info1, uint64_t *info2) 1335 { 1336 struct vm_intinfo vmii; 1337 int error; 1338 1339 bzero(&vmii, sizeof(struct vm_intinfo)); 1340 vmii.vcpuid = vcpu; 1341 error = ioctl(ctx->fd, VM_GET_INTINFO, &vmii); 1342 if (error == 0) { 1343 *info1 = vmii.info1; 1344 *info2 = vmii.info2; 1345 } 1346 return (error); 1347 } 1348 1349 int 1350 vm_set_intinfo(struct vmctx *ctx, int vcpu, uint64_t info1) 1351 { 1352 struct vm_intinfo vmii; 1353 int error; 1354 1355 bzero(&vmii, sizeof(struct vm_intinfo)); 1356 vmii.vcpuid = vcpu; 1357 vmii.info1 = info1; 1358 error = ioctl(ctx->fd, VM_SET_INTINFO, &vmii); 1359 return (error); 1360 } 1361 1362 int 1363 vm_rtc_write(struct vmctx *ctx, int offset, uint8_t value) 1364 { 1365 struct vm_rtc_data rtcdata; 1366 int error; 1367 1368 bzero(&rtcdata, sizeof(struct vm_rtc_data)); 1369 rtcdata.offset = offset; 1370 rtcdata.value = value; 1371 error = ioctl(ctx->fd, VM_RTC_WRITE, &rtcdata); 1372 return (error); 1373 } 1374 1375 int 1376 vm_rtc_read(struct vmctx *ctx, int offset, uint8_t *retval) 1377 { 1378 struct vm_rtc_data rtcdata; 1379 int error; 1380 1381 bzero(&rtcdata, sizeof(struct vm_rtc_data)); 1382 rtcdata.offset = offset; 1383 error = ioctl(ctx->fd, VM_RTC_READ, &rtcdata); 1384 if (error == 0) 1385 *retval = rtcdata.value; 1386 return (error); 1387 } 1388 1389 int 1390 vm_rtc_settime(struct vmctx *ctx, time_t secs) 1391 { 1392 struct vm_rtc_time rtctime; 1393 int error; 1394 1395 bzero(&rtctime, sizeof(struct vm_rtc_time)); 1396 rtctime.secs = secs; 1397 error = ioctl(ctx->fd, VM_RTC_SETTIME, &rtctime); 1398 return (error); 1399 } 1400 1401 int 1402 vm_rtc_gettime(struct vmctx *ctx, time_t *secs) 1403 { 1404 struct vm_rtc_time rtctime; 1405 int error; 1406 1407 bzero(&rtctime, sizeof(struct vm_rtc_time)); 1408 error = ioctl(ctx->fd, VM_RTC_GETTIME, &rtctime); 1409 if (error == 0) 1410 *secs = rtctime.secs; 1411 return (error); 1412 } 1413 1414 int 1415 vm_restart_instruction(void *arg, int vcpu) 1416 { 1417 struct vmctx *ctx = arg; 1418 1419 return (ioctl(ctx->fd, VM_RESTART_INSTRUCTION, &vcpu)); 1420 } 1421 1422 int 1423 vm_get_device_fd(struct vmctx *ctx) 1424 { 1425 1426 return (ctx->fd); 1427 } 1428 1429 const cap_ioctl_t * 1430 vm_get_ioctls(size_t *len) 1431 { 1432 cap_ioctl_t *cmds; 1433 /* keep in sync with machine/vmm_dev.h */ 1434 static const cap_ioctl_t vm_ioctl_cmds[] = { VM_RUN, VM_SUSPEND, VM_REINIT, 1435 VM_ALLOC_MEMSEG, VM_GET_MEMSEG, VM_MMAP_MEMSEG, VM_MMAP_MEMSEG, 1436 VM_MMAP_GETNEXT, VM_SET_REGISTER, VM_GET_REGISTER, 1437 VM_SET_SEGMENT_DESCRIPTOR, VM_GET_SEGMENT_DESCRIPTOR, 1438 VM_INJECT_EXCEPTION, VM_LAPIC_IRQ, VM_LAPIC_LOCAL_IRQ, 1439 VM_LAPIC_MSI, VM_IOAPIC_ASSERT_IRQ, VM_IOAPIC_DEASSERT_IRQ, 1440 VM_IOAPIC_PULSE_IRQ, VM_IOAPIC_PINCOUNT, VM_ISA_ASSERT_IRQ, 1441 VM_ISA_DEASSERT_IRQ, VM_ISA_PULSE_IRQ, VM_ISA_SET_IRQ_TRIGGER, 1442 VM_SET_CAPABILITY, VM_GET_CAPABILITY, VM_BIND_PPTDEV, 1443 VM_UNBIND_PPTDEV, VM_MAP_PPTDEV_MMIO, VM_PPTDEV_MSI, 1444 VM_PPTDEV_MSIX, VM_INJECT_NMI, VM_STATS, VM_STAT_DESC, 1445 VM_SET_X2APIC_STATE, VM_GET_X2APIC_STATE, 1446 VM_GET_HPET_CAPABILITIES, VM_GET_GPA_PMAP, VM_GLA2GPA, 1447 VM_ACTIVATE_CPU, VM_GET_CPUS, VM_SET_INTINFO, VM_GET_INTINFO, 1448 VM_RTC_WRITE, VM_RTC_READ, VM_RTC_SETTIME, VM_RTC_GETTIME, 1449 VM_RESTART_INSTRUCTION }; 1450 1451 if (len == NULL) { 1452 cmds = malloc(sizeof(vm_ioctl_cmds)); 1453 if (cmds == NULL) 1454 return (NULL); 1455 bcopy(vm_ioctl_cmds, cmds, sizeof(vm_ioctl_cmds)); 1456 return (cmds); 1457 } 1458 1459 *len = nitems(vm_ioctl_cmds); 1460 return (NULL); 1461 } 1462 1463