1[ 2 { 3 "BriefDescription": "Cycles weighted by number of requests pending in Coherency Tracker.", 4 "EventCode": "0x83", 5 "EventName": "UNC_ARB_COH_TRK_OCCUPANCY.ALL", 6 "PerPkg": "1", 7 "PublicDescription": "Cycles weighted by number of requests pending in Coherency Tracker.", 8 "UMask": "0x01", 9 "Unit": "ARB" 10 }, 11 { 12 "BriefDescription": "Number of requests allocated in Coherency Tracker.", 13 "Counter": "0,1", 14 "EventCode": "0x84", 15 "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL", 16 "PerPkg": "1", 17 "PublicDescription": "Number of requests allocated in Coherency Tracker.", 18 "UMask": "0x01", 19 "Unit": "ARB" 20 }, 21 { 22 "BriefDescription": "Counts cycles weighted by the number of requests waiting for data returning from the memory controller. Accounts for coherent and non-coherent requests initiated by IA cores, processor graphic units, or LLC.", 23 "EventCode": "0x80", 24 "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL", 25 "PerPkg": "1", 26 "PublicDescription": "Counts cycles weighted by the number of requests waiting for data returning from the memory controller. Accounts for coherent and non-coherent requests initiated by IA cores, processor graphic units, or LLC.", 27 "UMask": "0x01", 28 "Unit": "ARB" 29 }, 30 { 31 "BriefDescription": "Cycles with at least half of the requests outstanding are waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC.", 32 "Counter": "0,1", 33 "CounterMask": "10", 34 "EventCode": "0x80", 35 "EventName": "UNC_ARB_TRK_OCCUPANCY.CYCLES_OVER_HALF_FULL", 36 "PerPkg": "1", 37 "PublicDescription": "Cycles with at least half of the requests outstanding are waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC.", 38 "UMask": "0x01", 39 "Unit": "ARB" 40 }, 41 { 42 "BriefDescription": "Cycles with at least one request outstanding is waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC.", 43 "Counter": "0,1", 44 "CounterMask": "1", 45 "EventCode": "0x80", 46 "EventName": "UNC_ARB_TRK_OCCUPANCY.CYCLES_WITH_ANY_REQUEST", 47 "PerPkg": "1", 48 "PublicDescription": "Cycles with at least one request outstanding is waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC.", 49 "UMask": "0x01", 50 "Unit": "ARB" 51 }, 52 { 53 "BriefDescription": "Counts the number of coherent and in-coherent requests initiated by IA cores, processor graphic units, or LLC.", 54 "Counter": "0,1", 55 "EventCode": "0x81", 56 "EventName": "UNC_ARB_TRK_REQUESTS.ALL", 57 "PerPkg": "1", 58 "PublicDescription": "Counts the number of coherent and in-coherent requests initiated by IA cores, processor graphic units, or LLC.", 59 "UMask": "0x01", 60 "Unit": "ARB" 61 }, 62 { 63 "BriefDescription": "Counts the number of LLC evictions allocated.", 64 "Counter": "0,1", 65 "EventCode": "0x81", 66 "EventName": "UNC_ARB_TRK_REQUESTS.EVICTIONS", 67 "PerPkg": "1", 68 "PublicDescription": "Counts the number of LLC evictions allocated.", 69 "UMask": "0x80", 70 "Unit": "ARB" 71 }, 72 { 73 "BriefDescription": "Counts the number of allocated write entries, include full, partial, and LLC evictions.", 74 "Counter": "0,1", 75 "EventCode": "0x81", 76 "EventName": "UNC_ARB_TRK_REQUESTS.WRITES", 77 "PerPkg": "1", 78 "PublicDescription": "Counts the number of allocated write entries, include full, partial, and LLC evictions.", 79 "UMask": "0x20", 80 "Unit": "ARB" 81 }, 82 { 83 "BriefDescription": "This 48-bit fixed counter counts the UCLK cycles.", 84 "Counter": "Fixed", 85 "EventName": "UNC_CLOCK.SOCKET", 86 "PerPkg": "1", 87 "PublicDescription": "This 48-bit fixed counter counts the UCLK cycles.", 88 "UMask": "0x01", 89 "Unit": "ARB" 90 } 91] 92