xref: /freebsd/lib/libpmc/pmu-events/arch/arm64/arm/cortex-a510/instruction.json (revision 9d97138e2d138bcd03dc28f45e78b13c536bed84) 
1[
2    {
3        "ArchStdEvent": "LD_RETIRED"
4    },
5    {
6        "ArchStdEvent": "ST_RETIRED"
7    },
8    {
9        "ArchStdEvent": "INST_RETIRED"
10    },
11    {
12        "ArchStdEvent": "EXC_RETURN"
13    },
14    {
15        "ArchStdEvent": "CID_WRITE_RETIRED"
16    },
17    {
18        "ArchStdEvent": "PC_WRITE_RETIRED"
19    },
20    {
21        "ArchStdEvent": "BR_IMMED_RETIRED"
22    },
23    {
24        "ArchStdEvent": "BR_RETURN_RETIRED"
25    },
26    {
27        "ArchStdEvent": "INST_SPEC"
28    },
29    {
30        "ArchStdEvent": "TTBR_WRITE_RETIRED"
31    },
32    {
33        "ArchStdEvent": "BR_RETIRED"
34    },
35    {
36        "ArchStdEvent": "BR_MIS_PRED_RETIRED"
37    },
38    {
39        "ArchStdEvent": "OP_RETIRED"
40    },
41    {
42        "ArchStdEvent": "OP_SPEC"
43    },
44    {
45        "ArchStdEvent": "LD_SPEC"
46    },
47    {
48        "ArchStdEvent": "ST_SPEC"
49    },
50    {
51        "ArchStdEvent": "LDST_SPEC"
52    },
53    {
54        "ArchStdEvent": "DP_SPEC"
55    },
56    {
57        "ArchStdEvent": "ASE_SPEC"
58    },
59    {
60        "ArchStdEvent": "VFP_SPEC"
61    },
62    {
63        "ArchStdEvent": "PC_WRITE_SPEC"
64    },
65    {
66        "ArchStdEvent": "CRYPTO_SPEC"
67    },
68    {
69        "ArchStdEvent": "SVE_INST_RETIRED"
70    },
71    {
72        "ArchStdEvent": "SVE_INST_SPEC"
73    },
74    {
75        "ArchStdEvent": "FP_HP_SPEC"
76    },
77    {
78        "ArchStdEvent": "FP_SP_SPEC"
79    },
80    {
81        "ArchStdEvent": "FP_DP_SPEC"
82    },
83    {
84        "ArchStdEvent": "ASE_SVE_INT8_SPEC"
85    },
86    {
87        "ArchStdEvent": "ASE_SVE_INT16_SPEC"
88    },
89    {
90        "ArchStdEvent": "ASE_SVE_INT32_SPEC"
91    },
92    {
93        "ArchStdEvent": "ASE_SVE_INT64_SPEC"
94    }
95]
96