xref: /freebsd/contrib/llvm-project/llvm/lib/Target/VE/VVPInstrInfo.td (revision 8ddb146abcdf061be9f2c0db7e391697dafad85c) 
1//===-------------- VVPInstrInfo.td - VVP_* SDNode patterns ---------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines the VE Vector Predicated SDNodes (VVP SDNodes).  VVP
10// SDNodes are an intermediate isel layer between the vector SDNodes emitted by
11// LLVM and the actual VE vector instructions. For example:
12//
13//  ADD(x,y)   -->   VVP_ADD(x,y,mask,evl)   -->   VADDSWSXrvml(x,y,mask,evl)
14//     ^                      ^                            ^
15//  The standard     The VVP layer SDNode.        The VE vector instruction.
16//  SDNode.
17//
18// TODO explain how VVP nodes relate to VP SDNodes once VP ISel is uptream.
19//===----------------------------------------------------------------------===//
20
21// Binary Operators {
22
23// BinaryOp(x,y,mask,vl)
24def SDTIntBinOpVVP : SDTypeProfile<1, 4, [     // vp_add, vp_and, etc.
25  SDTCisSameAs<0, 1>,
26  SDTCisSameAs<0, 2>,
27  SDTCisInt<0>,
28  SDTCisSameNumEltsAs<0, 3>,
29  IsVLVT<4>
30]>;
31
32// BinaryFPOp(x,y,mask,vl)
33def SDTFPBinOpVVP : SDTypeProfile<1, 4, [      // vvp_fadd, etc.
34  SDTCisSameAs<0, 1>,
35  SDTCisSameAs<0, 2>,
36  SDTCisFP<0>,
37  SDTCisInt<3>,
38  SDTCisSameNumEltsAs<0, 3>,
39  IsVLVT<4>
40]>;
41
42// Select(OnTrue, OnFalse, SelMask, vl)
43def SDTSelectVVP : SDTypeProfile<1, 4, [       // vp_select, vp_merge
44  SDTCisVec<0>,
45  SDTCisSameNumEltsAs<0, 3>,
46  SDTCisSameAs<0, 1>,
47  SDTCisSameAs<1, 2>,
48  IsVLVT<4>
49]>;
50
51// Binary operator commutative pattern.
52class vvp_commutative<SDNode RootOp> :
53  PatFrags<
54  (ops node:$lhs, node:$rhs, node:$mask, node:$vlen),
55  [(RootOp node:$lhs, node:$rhs, node:$mask, node:$vlen),
56   (RootOp node:$rhs, node:$lhs, node:$mask, node:$vlen)]>;
57
58// VVP node definitions.
59def vvp_add    : SDNode<"VEISD::VVP_ADD",  SDTIntBinOpVVP>;
60def c_vvp_add  : vvp_commutative<vvp_add>;
61
62def vvp_sub    : SDNode<"VEISD::VVP_SUB",  SDTIntBinOpVVP>;
63
64def vvp_mul    : SDNode<"VEISD::VVP_MUL",  SDTIntBinOpVVP>;
65def c_vvp_mul  : vvp_commutative<vvp_mul>;
66
67def vvp_sdiv   : SDNode<"VEISD::VVP_SDIV", SDTIntBinOpVVP>;
68def vvp_udiv   : SDNode<"VEISD::VVP_UDIV", SDTIntBinOpVVP>;
69
70def vvp_and    : SDNode<"VEISD::VVP_AND",  SDTIntBinOpVVP>;
71def c_vvp_and  : vvp_commutative<vvp_and>;
72
73def vvp_or     : SDNode<"VEISD::VVP_OR",  SDTIntBinOpVVP>;
74def c_vvp_or   : vvp_commutative<vvp_or>;
75
76def vvp_xor    : SDNode<"VEISD::VVP_XOR",  SDTIntBinOpVVP>;
77def c_vvp_xor  : vvp_commutative<vvp_xor>;
78
79def vvp_srl    : SDNode<"VEISD::VVP_SRL",  SDTIntBinOpVVP>;
80def vvp_sra    : SDNode<"VEISD::VVP_SRA",  SDTIntBinOpVVP>;
81def vvp_shl    : SDNode<"VEISD::VVP_SHL",  SDTIntBinOpVVP>;
82
83def vvp_fadd    : SDNode<"VEISD::VVP_FADD",  SDTFPBinOpVVP>;
84def c_vvp_fadd  : vvp_commutative<vvp_fadd>;
85def vvp_fsub    : SDNode<"VEISD::VVP_FSUB",  SDTFPBinOpVVP>;
86def vvp_fmul    : SDNode<"VEISD::VVP_FMUL",  SDTFPBinOpVVP>;
87def c_vvp_fmul  : vvp_commutative<vvp_fmul>;
88def vvp_fdiv    : SDNode<"VEISD::VVP_FDIV",  SDTFPBinOpVVP>;
89
90// } Binary Operators
91
92def vvp_select : SDNode<"VEISD::VVP_SELECT", SDTSelectVVP>;
93