1480093f4SDimitry Andric //===-- VEMCTargetDesc.cpp - VE Target Descriptions -----------------------===//
2480093f4SDimitry Andric //
3480093f4SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4480093f4SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
5480093f4SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6480093f4SDimitry Andric //
7480093f4SDimitry Andric //===----------------------------------------------------------------------===//
8480093f4SDimitry Andric //
9480093f4SDimitry Andric // This file provides VE specific target descriptions.
10480093f4SDimitry Andric //
11480093f4SDimitry Andric //===----------------------------------------------------------------------===//
12480093f4SDimitry Andric
13480093f4SDimitry Andric #include "VEMCTargetDesc.h"
145ffd83dbSDimitry Andric #include "TargetInfo/VETargetInfo.h"
155ffd83dbSDimitry Andric #include "VEInstPrinter.h"
16480093f4SDimitry Andric #include "VEMCAsmInfo.h"
17480093f4SDimitry Andric #include "VETargetStreamer.h"
18480093f4SDimitry Andric #include "llvm/MC/MCInstrInfo.h"
19480093f4SDimitry Andric #include "llvm/MC/MCRegisterInfo.h"
20480093f4SDimitry Andric #include "llvm/MC/MCSubtargetInfo.h"
21349cc55cSDimitry Andric #include "llvm/MC/TargetRegistry.h"
22480093f4SDimitry Andric #include "llvm/Support/ErrorHandling.h"
23480093f4SDimitry Andric
24480093f4SDimitry Andric using namespace llvm;
25480093f4SDimitry Andric
26480093f4SDimitry Andric #define GET_INSTRINFO_MC_DESC
27753f127fSDimitry Andric #define ENABLE_INSTR_PREDICATE_VERIFIER
28480093f4SDimitry Andric #include "VEGenInstrInfo.inc"
29480093f4SDimitry Andric
30480093f4SDimitry Andric #define GET_SUBTARGETINFO_MC_DESC
31480093f4SDimitry Andric #include "VEGenSubtargetInfo.inc"
32480093f4SDimitry Andric
33480093f4SDimitry Andric #define GET_REGINFO_MC_DESC
34480093f4SDimitry Andric #include "VEGenRegisterInfo.inc"
35480093f4SDimitry Andric
createVEMCAsmInfo(const MCRegisterInfo & MRI,const Triple & TT,const MCTargetOptions & Options)36480093f4SDimitry Andric static MCAsmInfo *createVEMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT,
37480093f4SDimitry Andric const MCTargetOptions &Options) {
38480093f4SDimitry Andric MCAsmInfo *MAI = new VEELFMCAsmInfo(TT);
39480093f4SDimitry Andric unsigned Reg = MRI.getDwarfRegNum(VE::SX11, true);
405ffd83dbSDimitry Andric MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, Reg, 0);
41480093f4SDimitry Andric MAI->addInitialFrameState(Inst);
42480093f4SDimitry Andric return MAI;
43480093f4SDimitry Andric }
44480093f4SDimitry Andric
createVEMCInstrInfo()45480093f4SDimitry Andric static MCInstrInfo *createVEMCInstrInfo() {
46480093f4SDimitry Andric MCInstrInfo *X = new MCInstrInfo();
47480093f4SDimitry Andric InitVEMCInstrInfo(X);
48480093f4SDimitry Andric return X;
49480093f4SDimitry Andric }
50480093f4SDimitry Andric
createVEMCRegisterInfo(const Triple & TT)51480093f4SDimitry Andric static MCRegisterInfo *createVEMCRegisterInfo(const Triple &TT) {
52480093f4SDimitry Andric MCRegisterInfo *X = new MCRegisterInfo();
53480093f4SDimitry Andric InitVEMCRegisterInfo(X, VE::SX10);
54480093f4SDimitry Andric return X;
55480093f4SDimitry Andric }
56480093f4SDimitry Andric
createVEMCSubtargetInfo(const Triple & TT,StringRef CPU,StringRef FS)57480093f4SDimitry Andric static MCSubtargetInfo *createVEMCSubtargetInfo(const Triple &TT, StringRef CPU,
58480093f4SDimitry Andric StringRef FS) {
59480093f4SDimitry Andric if (CPU.empty())
60e8d8bef9SDimitry Andric CPU = "generic";
61e8d8bef9SDimitry Andric return createVEMCSubtargetInfoImpl(TT, CPU, /*TuneCPU=*/CPU, FS);
62480093f4SDimitry Andric }
63480093f4SDimitry Andric
64480093f4SDimitry Andric static MCTargetStreamer *
createObjectTargetStreamer(MCStreamer & S,const MCSubtargetInfo & STI)65480093f4SDimitry Andric createObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
66480093f4SDimitry Andric return new VETargetELFStreamer(S);
67480093f4SDimitry Andric }
68480093f4SDimitry Andric
createTargetAsmStreamer(MCStreamer & S,formatted_raw_ostream & OS,MCInstPrinter * InstPrint)69480093f4SDimitry Andric static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
70480093f4SDimitry Andric formatted_raw_ostream &OS,
71*0fca6ea1SDimitry Andric MCInstPrinter *InstPrint) {
72480093f4SDimitry Andric return new VETargetAsmStreamer(S, OS);
73480093f4SDimitry Andric }
74480093f4SDimitry Andric
createNullTargetStreamer(MCStreamer & S)7506c3fb27SDimitry Andric static MCTargetStreamer *createNullTargetStreamer(MCStreamer &S) {
7606c3fb27SDimitry Andric return new VETargetStreamer(S);
7706c3fb27SDimitry Andric }
7806c3fb27SDimitry Andric
createVEMCInstPrinter(const Triple & T,unsigned SyntaxVariant,const MCAsmInfo & MAI,const MCInstrInfo & MII,const MCRegisterInfo & MRI)79480093f4SDimitry Andric static MCInstPrinter *createVEMCInstPrinter(const Triple &T,
80480093f4SDimitry Andric unsigned SyntaxVariant,
81480093f4SDimitry Andric const MCAsmInfo &MAI,
82480093f4SDimitry Andric const MCInstrInfo &MII,
83480093f4SDimitry Andric const MCRegisterInfo &MRI) {
84480093f4SDimitry Andric return new VEInstPrinter(MAI, MII, MRI);
85480093f4SDimitry Andric }
86480093f4SDimitry Andric
LLVMInitializeVETargetMC()87e8d8bef9SDimitry Andric extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeVETargetMC() {
88480093f4SDimitry Andric // Register the MC asm info.
89480093f4SDimitry Andric RegisterMCAsmInfoFn X(getTheVETarget(), createVEMCAsmInfo);
90480093f4SDimitry Andric
91480093f4SDimitry Andric for (Target *T : {&getTheVETarget()}) {
92480093f4SDimitry Andric // Register the MC instruction info.
93480093f4SDimitry Andric TargetRegistry::RegisterMCInstrInfo(*T, createVEMCInstrInfo);
94480093f4SDimitry Andric
95480093f4SDimitry Andric // Register the MC register info.
96480093f4SDimitry Andric TargetRegistry::RegisterMCRegInfo(*T, createVEMCRegisterInfo);
97480093f4SDimitry Andric
98480093f4SDimitry Andric // Register the MC subtarget info.
99480093f4SDimitry Andric TargetRegistry::RegisterMCSubtargetInfo(*T, createVEMCSubtargetInfo);
100480093f4SDimitry Andric
1015ffd83dbSDimitry Andric // Register the MC Code Emitter.
1025ffd83dbSDimitry Andric TargetRegistry::RegisterMCCodeEmitter(*T, createVEMCCodeEmitter);
1035ffd83dbSDimitry Andric
1045ffd83dbSDimitry Andric // Register the asm backend.
1055ffd83dbSDimitry Andric TargetRegistry::RegisterMCAsmBackend(*T, createVEAsmBackend);
1065ffd83dbSDimitry Andric
107480093f4SDimitry Andric // Register the object target streamer.
108480093f4SDimitry Andric TargetRegistry::RegisterObjectTargetStreamer(*T,
109480093f4SDimitry Andric createObjectTargetStreamer);
110480093f4SDimitry Andric
111480093f4SDimitry Andric // Register the asm streamer.
112480093f4SDimitry Andric TargetRegistry::RegisterAsmTargetStreamer(*T, createTargetAsmStreamer);
113480093f4SDimitry Andric
11406c3fb27SDimitry Andric // Register the null streamer.
11506c3fb27SDimitry Andric TargetRegistry::RegisterNullTargetStreamer(*T, createNullTargetStreamer);
11606c3fb27SDimitry Andric
117480093f4SDimitry Andric // Register the MCInstPrinter
118480093f4SDimitry Andric TargetRegistry::RegisterMCInstPrinter(*T, createVEMCInstPrinter);
119480093f4SDimitry Andric }
120480093f4SDimitry Andric }
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