1//===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9//===----------------------------------------------------------------------===// 10// Type profiles 11//===----------------------------------------------------------------------===// 12def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>, 13 SDTCisVT<1, i64>]>; 14def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 15 SDTCisVT<1, i64>]>; 16def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 17def SDT_ZCmp : SDTypeProfile<1, 2, 18 [SDTCisVT<0, i32>, 19 SDTCisSameAs<1, 2>]>; 20def SDT_ZICmp : SDTypeProfile<1, 3, 21 [SDTCisVT<0, i32>, 22 SDTCisSameAs<1, 2>, 23 SDTCisVT<3, i32>]>; 24def SDT_ZBRCCMask : SDTypeProfile<0, 4, 25 [SDTCisVT<0, i32>, 26 SDTCisVT<1, i32>, 27 SDTCisVT<2, OtherVT>, 28 SDTCisVT<3, i32>]>; 29def SDT_ZSelectCCMask : SDTypeProfile<1, 5, 30 [SDTCisSameAs<0, 1>, 31 SDTCisSameAs<1, 2>, 32 SDTCisVT<3, i32>, 33 SDTCisVT<4, i32>, 34 SDTCisVT<5, i32>]>; 35def SDT_ZWrapPtr : SDTypeProfile<1, 1, 36 [SDTCisSameAs<0, 1>, 37 SDTCisPtrTy<0>]>; 38def SDT_ZWrapOffset : SDTypeProfile<1, 2, 39 [SDTCisSameAs<0, 1>, 40 SDTCisSameAs<0, 2>, 41 SDTCisPtrTy<0>]>; 42def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>; 43def SDT_ZProbedAlloca : SDTypeProfile<1, 2, 44 [SDTCisSameAs<0, 1>, 45 SDTCisSameAs<0, 2>, 46 SDTCisPtrTy<0>]>; 47def SDT_ZGR128Binary : SDTypeProfile<1, 2, 48 [SDTCisVT<0, untyped>, 49 SDTCisInt<1>, 50 SDTCisInt<2>]>; 51def SDT_ZBinaryWithFlags : SDTypeProfile<2, 2, 52 [SDTCisInt<0>, 53 SDTCisVT<1, i32>, 54 SDTCisSameAs<0, 2>, 55 SDTCisSameAs<0, 3>]>; 56def SDT_ZBinaryWithCarry : SDTypeProfile<2, 3, 57 [SDTCisInt<0>, 58 SDTCisVT<1, i32>, 59 SDTCisSameAs<0, 2>, 60 SDTCisSameAs<0, 3>, 61 SDTCisVT<1, i32>]>; 62def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5, 63 [SDTCisVT<0, i32>, 64 SDTCisPtrTy<1>, 65 SDTCisVT<2, i32>, 66 SDTCisVT<3, i32>, 67 SDTCisVT<4, i32>, 68 SDTCisVT<5, i32>]>; 69def SDT_ZAtomicCmpSwapW : SDTypeProfile<2, 6, 70 [SDTCisVT<0, i32>, 71 SDTCisVT<1, i32>, 72 SDTCisPtrTy<2>, 73 SDTCisVT<3, i32>, 74 SDTCisVT<4, i32>, 75 SDTCisVT<5, i32>, 76 SDTCisVT<6, i32>, 77 SDTCisVT<7, i32>]>; 78def SDT_ZAtomicCmpSwap : SDTypeProfile<2, 3, 79 [SDTCisInt<0>, 80 SDTCisVT<1, i32>, 81 SDTCisPtrTy<2>, 82 SDTCisSameAs<0, 3>, 83 SDTCisSameAs<0, 4>]>; 84def SDT_ZAtomicLoad128 : SDTypeProfile<1, 1, 85 [SDTCisVT<0, untyped>, 86 SDTCisPtrTy<1>]>; 87def SDT_ZAtomicStore128 : SDTypeProfile<0, 2, 88 [SDTCisVT<0, untyped>, 89 SDTCisPtrTy<1>]>; 90def SDT_ZAtomicCmpSwap128 : SDTypeProfile<2, 3, 91 [SDTCisVT<0, untyped>, 92 SDTCisVT<1, i32>, 93 SDTCisPtrTy<2>, 94 SDTCisVT<3, untyped>, 95 SDTCisVT<4, untyped>]>; 96def SDT_ZMemMemLength : SDTypeProfile<0, 3, 97 [SDTCisPtrTy<0>, 98 SDTCisPtrTy<1>, 99 SDTCisVT<2, i64>]>; 100def SDT_ZMemMemLengthCC : SDTypeProfile<1, 3, 101 [SDTCisVT<0, i32>, 102 SDTCisPtrTy<1>, 103 SDTCisPtrTy<2>, 104 SDTCisVT<3, i64>]>; 105def SDT_ZMemsetMVC : SDTypeProfile<0, 3, 106 [SDTCisPtrTy<0>, 107 SDTCisVT<1, i64>, 108 SDTCisVT<2, i32>]>; 109def SDT_ZString : SDTypeProfile<1, 3, 110 [SDTCisPtrTy<0>, 111 SDTCisPtrTy<1>, 112 SDTCisPtrTy<2>, 113 SDTCisVT<3, i32>]>; 114def SDT_ZStringCC : SDTypeProfile<2, 3, 115 [SDTCisPtrTy<0>, 116 SDTCisVT<1, i32>, 117 SDTCisPtrTy<2>, 118 SDTCisPtrTy<3>, 119 SDTCisVT<4, i32>]>; 120def SDT_ZIPM : SDTypeProfile<1, 1, 121 [SDTCisVT<0, i32>, 122 SDTCisVT<1, i32>]>; 123def SDT_ZPrefetch : SDTypeProfile<0, 2, 124 [SDTCisVT<0, i32>, 125 SDTCisPtrTy<1>]>; 126def SDT_ZTBegin : SDTypeProfile<1, 2, 127 [SDTCisVT<0, i32>, 128 SDTCisPtrTy<1>, 129 SDTCisVT<2, i32>]>; 130def SDT_ZADAENTRY : SDTypeProfile<1, 3, 131 [SDTCisPtrTy<0>, 132 SDTCisPtrTy<1>, 133 SDTCisPtrTy<2>, 134 SDTCisVT<3, i64>]>; 135def SDT_ZTEnd : SDTypeProfile<1, 0, 136 [SDTCisVT<0, i32>]>; 137def SDT_ZInsertVectorElt : SDTypeProfile<1, 3, 138 [SDTCisVec<0>, 139 SDTCisSameAs<0, 1>, 140 SDTCisVT<3, i32>]>; 141def SDT_ZExtractVectorElt : SDTypeProfile<1, 2, 142 [SDTCisVec<1>, 143 SDTCisVT<2, i32>]>; 144def SDT_ZReplicate : SDTypeProfile<1, 1, 145 [SDTCisVec<0>]>; 146def SDT_ZVecUnaryConv : SDTypeProfile<1, 1, 147 [SDTCisVec<0>, 148 SDTCisVec<1>]>; 149def SDT_ZVecUnary : SDTypeProfile<1, 1, 150 [SDTCisVec<0>, 151 SDTCisSameAs<0, 1>]>; 152def SDT_ZVecUnaryCC : SDTypeProfile<2, 1, 153 [SDTCisVec<0>, 154 SDTCisVT<1, i32>, 155 SDTCisSameAs<0, 2>]>; 156def SDT_ZVecBinary : SDTypeProfile<1, 2, 157 [SDTCisVec<0>, 158 SDTCisSameAs<0, 1>, 159 SDTCisSameAs<0, 2>]>; 160def SDT_ZVecBinaryCC : SDTypeProfile<2, 2, 161 [SDTCisVec<0>, 162 SDTCisVT<1, i32>, 163 SDTCisSameAs<0, 2>, 164 SDTCisSameAs<0, 2>]>; 165def SDT_ZVecBinaryInt : SDTypeProfile<1, 2, 166 [SDTCisVec<0>, 167 SDTCisSameAs<0, 1>, 168 SDTCisVT<2, i32>]>; 169def SDT_ZVecBinaryConv : SDTypeProfile<1, 2, 170 [SDTCisVec<0>, 171 SDTCisVec<1>, 172 SDTCisSameAs<1, 2>]>; 173def SDT_ZVecBinaryConvCC : SDTypeProfile<2, 2, 174 [SDTCisVec<0>, 175 SDTCisVT<1, i32>, 176 SDTCisVec<2>, 177 SDTCisSameAs<2, 3>]>; 178def SDT_ZVecBinaryConvIntCC : SDTypeProfile<2, 2, 179 [SDTCisVec<0>, 180 SDTCisVT<1, i32>, 181 SDTCisVec<2>, 182 SDTCisVT<3, i32>]>; 183def SDT_ZRotateMask : SDTypeProfile<1, 2, 184 [SDTCisVec<0>, 185 SDTCisVT<1, i32>, 186 SDTCisVT<2, i32>]>; 187def SDT_ZJoinDwords : SDTypeProfile<1, 2, 188 [SDTCisVT<0, v2i64>, 189 SDTCisVT<1, i64>, 190 SDTCisVT<2, i64>]>; 191def SDT_ZVecTernary : SDTypeProfile<1, 3, 192 [SDTCisVec<0>, 193 SDTCisSameAs<0, 1>, 194 SDTCisSameAs<0, 2>, 195 SDTCisSameAs<0, 3>]>; 196def SDT_ZVecTernaryConvCC : SDTypeProfile<2, 3, 197 [SDTCisVec<0>, 198 SDTCisVT<1, i32>, 199 SDTCisVec<2>, 200 SDTCisSameAs<2, 3>, 201 SDTCisSameAs<0, 4>]>; 202def SDT_ZVecTernaryInt : SDTypeProfile<1, 3, 203 [SDTCisVec<0>, 204 SDTCisSameAs<0, 1>, 205 SDTCisSameAs<0, 2>, 206 SDTCisVT<3, i32>]>; 207def SDT_ZVecTernaryIntCC : SDTypeProfile<2, 3, 208 [SDTCisVec<0>, 209 SDTCisVT<1, i32>, 210 SDTCisSameAs<0, 2>, 211 SDTCisSameAs<0, 3>, 212 SDTCisVT<4, i32>]>; 213def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4, 214 [SDTCisVec<0>, 215 SDTCisSameAs<0, 1>, 216 SDTCisSameAs<0, 2>, 217 SDTCisSameAs<0, 3>, 218 SDTCisVT<4, i32>]>; 219def SDT_ZVecQuaternaryIntCC : SDTypeProfile<2, 4, 220 [SDTCisVec<0>, 221 SDTCisVT<1, i32>, 222 SDTCisSameAs<0, 2>, 223 SDTCisSameAs<0, 3>, 224 SDTCisSameAs<0, 4>, 225 SDTCisVT<5, i32>]>; 226def SDT_ZTest : SDTypeProfile<1, 2, 227 [SDTCisVT<0, i32>, 228 SDTCisVT<2, i64>]>; 229 230//===----------------------------------------------------------------------===// 231// Node definitions 232//===----------------------------------------------------------------------===// 233 234// These are target-independent nodes, but have target-specific formats. 235def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 236 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>; 237def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 238 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue, 239 SDNPOutGlue]>; 240def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>; 241 242// Nodes for SystemZISD::*. See SystemZISelLowering.h for more details. 243def z_retglue : SDNode<"SystemZISD::RET_GLUE", SDTNone, 244 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; 245def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 246 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 247 SDNPVariadic]>; 248def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 249 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 250 SDNPVariadic]>; 251def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall, 252 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 253 SDNPVariadic]>; 254def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall, 255 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 256 SDNPVariadic]>; 257def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 258def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", 259 SDT_ZWrapOffset, []>; 260def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp>; 261def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp>; 262def z_strict_fcmp : SDNode<"SystemZISD::STRICT_FCMP", SDT_ZCmp, 263 [SDNPHasChain]>; 264def z_strict_fcmps : SDNode<"SystemZISD::STRICT_FCMPS", SDT_ZCmp, 265 [SDNPHasChain]>; 266def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp>; 267def z_br_ccmask_1 : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask, 268 [SDNPHasChain]>; 269def z_select_ccmask_1 : SDNode<"SystemZISD::SELECT_CCMASK", 270 SDT_ZSelectCCMask>; 271def z_ipm_1 : SDNode<"SystemZISD::IPM", SDT_ZIPM>; 272def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>; 273def z_probed_alloca : SDNode<"SystemZISD::PROBED_ALLOCA", SDT_ZProbedAlloca, 274 [SDNPHasChain]>; 275def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>; 276def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>; 277def z_umul_lohi : SDNode<"SystemZISD::UMUL_LOHI", SDT_ZGR128Binary>; 278def z_sdivrem : SDNode<"SystemZISD::SDIVREM", SDT_ZGR128Binary>; 279def z_udivrem : SDNode<"SystemZISD::UDIVREM", SDT_ZGR128Binary>; 280def z_saddo : SDNode<"SystemZISD::SADDO", SDT_ZBinaryWithFlags>; 281def z_ssubo : SDNode<"SystemZISD::SSUBO", SDT_ZBinaryWithFlags>; 282def z_uaddo : SDNode<"SystemZISD::UADDO", SDT_ZBinaryWithFlags>; 283def z_usubo : SDNode<"SystemZISD::USUBO", SDT_ZBinaryWithFlags>; 284def z_addcarry_1 : SDNode<"SystemZISD::ADDCARRY", SDT_ZBinaryWithCarry>; 285def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>; 286 287def z_loadbswap : SDNode<"SystemZISD::LRV", SDTLoad, 288 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 289def z_storebswap : SDNode<"SystemZISD::STRV", SDTStore, 290 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 291def z_loadeswap : SDNode<"SystemZISD::VLER", SDTLoad, 292 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 293def z_storeeswap : SDNode<"SystemZISD::VSTER", SDTStore, 294 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 295 296def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest>; 297 298// Defined because the index is an i32 rather than a pointer. 299def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", 300 SDT_ZInsertVectorElt>; 301def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT", 302 SDT_ZExtractVectorElt>; 303def z_byte_mask : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>; 304def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>; 305def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>; 306def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>; 307def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>; 308def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>; 309def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>; 310def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>; 311def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS", 312 SDT_ZVecTernaryInt>; 313def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>; 314def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>; 315def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConvCC>; 316def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConvCC>; 317def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>; 318def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>; 319def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>; 320def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>; 321def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR", 322 SDT_ZVecBinaryInt>; 323def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR", 324 SDT_ZVecBinaryInt>; 325def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR", 326 SDT_ZVecBinaryInt>; 327def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZVecBinaryConv>; 328def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>; 329def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>; 330def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>; 331def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecBinaryCC>; 332def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecBinaryCC>; 333def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecBinaryCC>; 334def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>; 335def z_strict_vfcmpe : SDNode<"SystemZISD::STRICT_VFCMPE", 336 SDT_ZVecBinaryConv, [SDNPHasChain]>; 337def z_strict_vfcmpes : SDNode<"SystemZISD::STRICT_VFCMPES", 338 SDT_ZVecBinaryConv, [SDNPHasChain]>; 339def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>; 340def z_strict_vfcmph : SDNode<"SystemZISD::STRICT_VFCMPH", 341 SDT_ZVecBinaryConv, [SDNPHasChain]>; 342def z_strict_vfcmphs : SDNode<"SystemZISD::STRICT_VFCMPHS", 343 SDT_ZVecBinaryConv, [SDNPHasChain]>; 344def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>; 345def z_strict_vfcmphe : SDNode<"SystemZISD::STRICT_VFCMPHE", 346 SDT_ZVecBinaryConv, [SDNPHasChain]>; 347def z_strict_vfcmphes : SDNode<"SystemZISD::STRICT_VFCMPHES", 348 SDT_ZVecBinaryConv, [SDNPHasChain]>; 349def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConvCC>; 350def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConvCC>; 351def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConvCC>; 352def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>; 353def z_strict_vextend : SDNode<"SystemZISD::STRICT_VEXTEND", 354 SDT_ZVecUnaryConv, [SDNPHasChain]>; 355def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>; 356def z_strict_vround : SDNode<"SystemZISD::STRICT_VROUND", 357 SDT_ZVecUnaryConv, [SDNPHasChain]>; 358def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp>; 359def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryIntCC>; 360def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryIntCC>; 361def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinaryCC>; 362def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinaryCC>; 363def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinaryCC>; 364def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinaryCC>; 365def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnaryCC>; 366def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC", 367 SDT_ZVecQuaternaryIntCC>; 368def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC", 369 SDT_ZVecQuaternaryIntCC>; 370def z_vstrs_cc : SDNode<"SystemZISD::VSTRS_CC", 371 SDT_ZVecTernaryConvCC>; 372def z_vstrsz_cc : SDNode<"SystemZISD::VSTRSZ_CC", 373 SDT_ZVecTernaryConvCC>; 374def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvIntCC>; 375 376class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW> 377 : SDNode<"SystemZISD::"#name, profile, 378 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; 379 380def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">; 381def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">; 382def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">; 383def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">; 384def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">; 385def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">; 386def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">; 387def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">; 388def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">; 389def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">; 390def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">; 391 392def z_atomic_cmp_swap : SDNode<"SystemZISD::ATOMIC_CMP_SWAP", 393 SDT_ZAtomicCmpSwap, 394 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 395 SDNPMemOperand]>; 396def z_atomic_cmp_swapw : SDNode<"SystemZISD::ATOMIC_CMP_SWAPW", 397 SDT_ZAtomicCmpSwapW, 398 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 399 SDNPMemOperand]>; 400 401def z_atomic_load_128 : SDNode<"SystemZISD::ATOMIC_LOAD_128", 402 SDT_ZAtomicLoad128, 403 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 404def z_atomic_store_128 : SDNode<"SystemZISD::ATOMIC_STORE_128", 405 SDT_ZAtomicStore128, 406 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 407def z_atomic_cmp_swap_128 : SDNode<"SystemZISD::ATOMIC_CMP_SWAP_128", 408 SDT_ZAtomicCmpSwap128, 409 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 410 SDNPMemOperand]>; 411 412def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength, 413 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 414def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength, 415 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 416def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength, 417 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 418def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength, 419 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 420def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLengthCC, 421 [SDNPHasChain, SDNPMayLoad]>; 422def z_memset_mvc : SDNode<"SystemZISD::MEMSET_MVC", SDT_ZMemsetMVC, 423 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 424def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZStringCC, 425 [SDNPHasChain, SDNPMayLoad]>; 426def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString, 427 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 428def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZStringCC, 429 [SDNPHasChain, SDNPMayLoad]>; 430def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch, 431 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, 432 SDNPMemOperand]>; 433 434def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin, 435 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 436def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin, 437 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 438def z_tend : SDNode<"SystemZISD::TEND", SDT_ZTEnd, 439 [SDNPHasChain, SDNPSideEffect]>; 440 441def z_ada_entry : SDNode<"SystemZISD::ADA_ENTRY", 442 SDT_ZADAENTRY>; 443 444def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>; 445def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>; 446def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>; 447 448//===----------------------------------------------------------------------===// 449// Pattern fragments 450//===----------------------------------------------------------------------===// 451 452def z_loadbswap16 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 453 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 454}]>; 455def z_loadbswap32 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 456 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 457}]>; 458def z_loadbswap64 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 459 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 460}]>; 461 462def z_storebswap16 : PatFrag<(ops node:$src, node:$addr), 463 (z_storebswap node:$src, node:$addr), [{ 464 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 465}]>; 466def z_storebswap32 : PatFrag<(ops node:$src, node:$addr), 467 (z_storebswap node:$src, node:$addr), [{ 468 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 469}]>; 470def z_storebswap64 : PatFrag<(ops node:$src, node:$addr), 471 (z_storebswap node:$src, node:$addr), [{ 472 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 473}]>; 474 475// Fragments including CC as an implicit source. 476def z_br_ccmask 477 : PatFrag<(ops node:$valid, node:$mask, node:$bb), 478 (z_br_ccmask_1 node:$valid, node:$mask, node:$bb, CC)>; 479def z_select_ccmask 480 : PatFrag<(ops node:$true, node:$false, node:$valid, node:$mask), 481 (z_select_ccmask_1 node:$true, node:$false, 482 node:$valid, node:$mask, CC)>; 483def z_ipm : PatFrag<(ops), (z_ipm_1 CC)>; 484def z_addcarry : PatFrag<(ops node:$lhs, node:$rhs), 485 (z_addcarry_1 node:$lhs, node:$rhs, CC)>; 486def z_subcarry : PatFrag<(ops node:$lhs, node:$rhs), 487 (z_subcarry_1 node:$lhs, node:$rhs, CC)>; 488 489// Signed and unsigned comparisons. 490def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{ 491 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 492 return Type != SystemZICMP::UnsignedOnly; 493}]>; 494def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{ 495 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 496 return Type != SystemZICMP::SignedOnly; 497}]>; 498 499// Register- and memory-based TEST UNDER MASK. 500def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, timm)>; 501def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>; 502 503// Register sign-extend operations. Sub-32-bit values are represented as i32s. 504def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>; 505def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>; 506def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>; 507 508// Match extensions of an i32 to an i64, followed by an in-register sign 509// extension from a sub-i32 value. 510def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>; 511def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>; 512 513// Register zero-extend operations. Sub-32-bit values are represented as i32s. 514def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>; 515def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>; 516def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>; 517 518// Extending loads in which the extension type can be signed. 519def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 520 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 521 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD; 522}]>; 523def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 524 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 525}]>; 526def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 527 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 528}]>; 529def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 530 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 531}]>; 532 533// Extending loads in which the extension type can be unsigned. 534def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 535 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 536 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD; 537}]>; 538def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 539 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 540}]>; 541def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 542 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 543}]>; 544def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 545 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 546}]>; 547 548// Extending loads in which the extension type doesn't matter. 549def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 550 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD; 551}]>; 552def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 553 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 554}]>; 555def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 556 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 557}]>; 558def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 559 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 560}]>; 561 562// Aligned loads. 563class AlignedLoad<SDPatternOperator load> 564 : PatFrag<(ops node:$addr), (load node:$addr), 565 [{ return storeLoadIsAligned(N); }]>; 566def aligned_load : AlignedLoad<load>; 567def aligned_asextloadi16 : AlignedLoad<asextloadi16>; 568def aligned_asextloadi32 : AlignedLoad<asextloadi32>; 569def aligned_azextloadi16 : AlignedLoad<azextloadi16>; 570def aligned_azextloadi32 : AlignedLoad<azextloadi32>; 571 572// Aligned stores. 573class AlignedStore<SDPatternOperator store> 574 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), 575 [{ return storeLoadIsAligned(N); }]>; 576def aligned_store : AlignedStore<store>; 577def aligned_truncstorei16 : AlignedStore<truncstorei16>; 578def aligned_truncstorei32 : AlignedStore<truncstorei32>; 579 580// Non-volatile loads. Used for instructions that might access the storage 581// location multiple times. 582class NonvolatileLoad<SDPatternOperator load> 583 : PatFrag<(ops node:$addr), (load node:$addr), [{ 584 auto *Load = cast<LoadSDNode>(N); 585 return !Load->isVolatile(); 586}]>; 587def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>; 588def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>; 589def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>; 590 591// Non-volatile stores. 592class NonvolatileStore<SDPatternOperator store> 593 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 594 auto *Store = cast<StoreSDNode>(N); 595 return !Store->isVolatile(); 596}]>; 597def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>; 598def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>; 599def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>; 600 601// A store of a load that can be implemented using MVC. 602def mvc_store : PatFrag<(ops node:$value, node:$addr), 603 (unindexedstore node:$value, node:$addr), 604 [{ return storeLoadCanUseMVC(N); }]>; 605 606// Binary read-modify-write operations on memory in which the other 607// operand is also memory and for which block operations like NC can 608// be used. There are two patterns for each operator, depending on 609// which operand contains the "other" load. 610multiclass block_op<SDPatternOperator operator> { 611 def "1" : PatFrag<(ops node:$value, node:$addr), 612 (unindexedstore (operator node:$value, 613 (unindexedload node:$addr)), 614 node:$addr), 615 [{ return storeLoadCanUseBlockBinary(N, 0); }]>; 616 def "2" : PatFrag<(ops node:$value, node:$addr), 617 (unindexedstore (operator (unindexedload node:$addr), 618 node:$value), 619 node:$addr), 620 [{ return storeLoadCanUseBlockBinary(N, 1); }]>; 621} 622defm block_and : block_op<and>; 623defm block_or : block_op<or>; 624defm block_xor : block_op<xor>; 625 626// Insertions. 627def inserti8 : PatFrag<(ops node:$src1, node:$src2), 628 (or (and node:$src1, -256), node:$src2)>; 629def insertll : PatFrag<(ops node:$src1, node:$src2), 630 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>; 631def insertlh : PatFrag<(ops node:$src1, node:$src2), 632 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>; 633def inserthl : PatFrag<(ops node:$src1, node:$src2), 634 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>; 635def inserthh : PatFrag<(ops node:$src1, node:$src2), 636 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>; 637def insertlf : PatFrag<(ops node:$src1, node:$src2), 638 (or (and node:$src1, 0xffffffff00000000), node:$src2)>; 639def inserthf : PatFrag<(ops node:$src1, node:$src2), 640 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>; 641 642// ORs that can be treated as insertions. 643def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2), 644 (or node:$src1, node:$src2), [{ 645 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 646 return CurDAG->MaskedValueIsZero(N->getOperand(0), 647 APInt::getLowBitsSet(BitWidth, 8)); 648}]>; 649 650// ORs that can be treated as reversed insertions. 651def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2), 652 (or node:$src1, node:$src2), [{ 653 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 654 return CurDAG->MaskedValueIsZero(N->getOperand(1), 655 APInt::getLowBitsSet(BitWidth, 8)); 656}]>; 657 658// Negative integer absolute. 659def z_inegabs : PatFrag<(ops node:$src), (ineg (abs node:$src))>; 660 661// Integer multiply-and-add 662def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3), 663 (add (mul node:$src1, node:$src2), node:$src3)>; 664 665// Alternatives to match operations with or without an overflow CC result. 666def z_sadd : PatFrags<(ops node:$src1, node:$src2), 667 [(z_saddo node:$src1, node:$src2), 668 (add node:$src1, node:$src2)]>; 669def z_uadd : PatFrags<(ops node:$src1, node:$src2), 670 [(z_uaddo node:$src1, node:$src2), 671 (add node:$src1, node:$src2)]>; 672def z_ssub : PatFrags<(ops node:$src1, node:$src2), 673 [(z_ssubo node:$src1, node:$src2), 674 (sub node:$src1, node:$src2)]>; 675def z_usub : PatFrags<(ops node:$src1, node:$src2), 676 [(z_usubo node:$src1, node:$src2), 677 (sub node:$src1, node:$src2)]>; 678 679// Combined logical operations. 680def andc : PatFrag<(ops node:$src1, node:$src2), 681 (and node:$src1, (not node:$src2))>; 682def orc : PatFrag<(ops node:$src1, node:$src2), 683 (or node:$src1, (not node:$src2))>; 684def nand : PatFrag<(ops node:$src1, node:$src2), 685 (not (and node:$src1, node:$src2))>; 686def nor : PatFrag<(ops node:$src1, node:$src2), 687 (not (or node:$src1, node:$src2))>; 688def nxor : PatFrag<(ops node:$src1, node:$src2), 689 (not (xor node:$src1, node:$src2))>; 690 691// Fused multiply-subtract, using the natural operand order. 692def any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 693 (any_fma node:$src1, node:$src2, (fneg node:$src3))>; 694 695// Fused multiply-add and multiply-subtract, but with the order of the 696// operands matching SystemZ's MA and MS instructions. 697def z_any_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 698 (any_fma node:$src2, node:$src3, node:$src1)>; 699def z_any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 700 (any_fma node:$src2, node:$src3, (fneg node:$src1))>; 701 702// Negative fused multiply-add and multiply-subtract. 703def any_fnma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 704 (fneg (any_fma node:$src1, node:$src2, node:$src3))>; 705def any_fnms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 706 (fneg (any_fms node:$src1, node:$src2, node:$src3))>; 707 708// Floating-point negative absolute. 709def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>; 710 711// Strict floating-point fragments. 712def z_any_fcmp : PatFrags<(ops node:$lhs, node:$rhs), 713 [(z_strict_fcmp node:$lhs, node:$rhs), 714 (z_fcmp node:$lhs, node:$rhs)]>; 715def z_any_vfcmpe : PatFrags<(ops node:$lhs, node:$rhs), 716 [(z_strict_vfcmpe node:$lhs, node:$rhs), 717 (z_vfcmpe node:$lhs, node:$rhs)]>; 718def z_any_vfcmph : PatFrags<(ops node:$lhs, node:$rhs), 719 [(z_strict_vfcmph node:$lhs, node:$rhs), 720 (z_vfcmph node:$lhs, node:$rhs)]>; 721def z_any_vfcmphe : PatFrags<(ops node:$lhs, node:$rhs), 722 [(z_strict_vfcmphe node:$lhs, node:$rhs), 723 (z_vfcmphe node:$lhs, node:$rhs)]>; 724def z_any_vextend : PatFrags<(ops node:$src), 725 [(z_strict_vextend node:$src), 726 (z_vextend node:$src)]>; 727def z_any_vround : PatFrags<(ops node:$src), 728 [(z_strict_vround node:$src), 729 (z_vround node:$src)]>; 730 731// Create a unary operator that loads from memory and then performs 732// the given operation on it. 733class loadu<SDPatternOperator operator, SDPatternOperator load = load> 734 : PatFrag<(ops node:$addr), (operator (load node:$addr))>; 735 736// Create a store operator that performs the given unary operation 737// on the value before storing it. 738class storeu<SDPatternOperator operator, SDPatternOperator store = store> 739 : PatFrag<(ops node:$value, node:$addr), 740 (store (operator node:$value), node:$addr)>; 741 742// Create a store operator that performs the given inherent operation 743// and stores the resulting value. 744class storei<SDPatternOperator operator, SDPatternOperator store = store> 745 : PatFrag<(ops node:$addr), 746 (store (operator), node:$addr)>; 747 748// Create a shift operator that optionally ignores an AND of the 749// shift count with an immediate if the bottom 6 bits are all set. 750def imm32bottom6set : PatLeaf<(i32 imm), [{ 751 return (N->getZExtValue() & 0x3f) == 0x3f; 752}]>; 753class shiftop<SDPatternOperator operator> 754 : PatFrags<(ops node:$val, node:$count), 755 [(operator node:$val, node:$count), 756 (operator node:$val, (and node:$count, imm32bottom6set))]>; 757 758def imm32mod64 : PatLeaf<(i32 imm), [{ 759 return (N->getZExtValue() % 64 == 0); 760}]>; 761 762// Load a scalar and replicate it in all elements of a vector. 763class z_replicate_load<ValueType scalartype, SDPatternOperator load> 764 : PatFrag<(ops node:$addr), 765 (z_replicate (scalartype (load node:$addr)))>; 766def z_replicate_loadi8 : z_replicate_load<i32, anyextloadi8>; 767def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>; 768def z_replicate_loadi32 : z_replicate_load<i32, load>; 769def z_replicate_loadi64 : z_replicate_load<i64, load>; 770def z_replicate_loadf32 : z_replicate_load<f32, load>; 771def z_replicate_loadf64 : z_replicate_load<f64, load>; 772// Byte-swapped replicated vector element loads. 773def z_replicate_loadbswapi16 : z_replicate_load<i32, z_loadbswap16>; 774def z_replicate_loadbswapi32 : z_replicate_load<i32, z_loadbswap32>; 775def z_replicate_loadbswapi64 : z_replicate_load<i64, z_loadbswap64>; 776 777// Load a scalar and insert it into a single element of a vector. 778class z_vle<ValueType scalartype, SDPatternOperator load> 779 : PatFrag<(ops node:$vec, node:$addr, node:$index), 780 (z_vector_insert node:$vec, (scalartype (load node:$addr)), 781 node:$index)>; 782def z_vlei8 : z_vle<i32, anyextloadi8>; 783def z_vlei16 : z_vle<i32, anyextloadi16>; 784def z_vlei32 : z_vle<i32, load>; 785def z_vlei64 : z_vle<i64, load>; 786def z_vlef32 : z_vle<f32, load>; 787def z_vlef64 : z_vle<f64, load>; 788// Byte-swapped vector element loads. 789def z_vlebri16 : z_vle<i32, z_loadbswap16>; 790def z_vlebri32 : z_vle<i32, z_loadbswap32>; 791def z_vlebri64 : z_vle<i64, z_loadbswap64>; 792 793// Load a scalar and insert it into the low element of the high i64 of a 794// zeroed vector. 795class z_vllez<ValueType scalartype, SDPatternOperator load, int index> 796 : PatFrag<(ops node:$addr), 797 (z_vector_insert immAllZerosV, 798 (scalartype (load node:$addr)), (i32 index))>; 799def z_vllezi8 : z_vllez<i32, anyextloadi8, 7>; 800def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>; 801def z_vllezi32 : z_vllez<i32, load, 1>; 802def z_vllezi64 : PatFrags<(ops node:$addr), 803 [(z_vector_insert immAllZerosV, 804 (i64 (load node:$addr)), (i32 0)), 805 (z_join_dwords (i64 (load node:$addr)), (i64 0))]>; 806// We use high merges to form a v4f32 from four f32s. Propagating zero 807// into all elements but index 1 gives this expression. 808def z_vllezf32 : PatFrag<(ops node:$addr), 809 (z_merge_high 810 (v2i64 811 (z_unpackl_high 812 (v4i32 813 (bitconvert 814 (v4f32 (scalar_to_vector 815 (f32 (load node:$addr)))))))), 816 (v2i64 817 (bitconvert (v4f32 immAllZerosV))))>; 818def z_vllezf64 : PatFrag<(ops node:$addr), 819 (z_merge_high 820 (v2f64 (scalar_to_vector (f64 (load node:$addr)))), 821 immAllZerosV)>; 822 823// Similarly for the high element of a zeroed vector. 824def z_vllezli32 : z_vllez<i32, load, 0>; 825def z_vllezlf32 : PatFrag<(ops node:$addr), 826 (z_merge_high 827 (v2i64 828 (bitconvert 829 (z_merge_high 830 (v4f32 (scalar_to_vector 831 (f32 (load node:$addr)))), 832 (v4f32 immAllZerosV)))), 833 (v2i64 834 (bitconvert (v4f32 immAllZerosV))))>; 835 836// Byte-swapped variants. 837def z_vllebrzi16 : z_vllez<i32, z_loadbswap16, 3>; 838def z_vllebrzi32 : z_vllez<i32, z_loadbswap32, 1>; 839def z_vllebrzli32 : z_vllez<i32, z_loadbswap32, 0>; 840def z_vllebrzi64 : PatFrags<(ops node:$addr), 841 [(z_vector_insert immAllZerosV, 842 (i64 (z_loadbswap64 node:$addr)), 843 (i32 0)), 844 (z_join_dwords (i64 (z_loadbswap64 node:$addr)), 845 (i64 0))]>; 846 847 848// Store one element of a vector. 849class z_vste<ValueType scalartype, SDPatternOperator store> 850 : PatFrag<(ops node:$vec, node:$addr, node:$index), 851 (store (scalartype (z_vector_extract node:$vec, node:$index)), 852 node:$addr)>; 853def z_vstei8 : z_vste<i32, truncstorei8>; 854def z_vstei16 : z_vste<i32, truncstorei16>; 855def z_vstei32 : z_vste<i32, store>; 856def z_vstei64 : z_vste<i64, store>; 857def z_vstef32 : z_vste<f32, store>; 858def z_vstef64 : z_vste<f64, store>; 859// Byte-swapped vector element stores. 860def z_vstebri16 : z_vste<i32, z_storebswap16>; 861def z_vstebri32 : z_vste<i32, z_storebswap32>; 862def z_vstebri64 : z_vste<i64, z_storebswap64>; 863 864// Arithmetic negation on vectors. 865def z_vneg : PatFrag<(ops node:$x), (sub immAllZerosV, node:$x)>; 866 867// Bitwise negation on vectors. 868def z_vnot : PatFrag<(ops node:$x), (xor node:$x, immAllOnesV)>; 869 870// Signed "integer greater than zero" on vectors. 871def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, immAllZerosV)>; 872 873// Signed "integer less than zero" on vectors. 874def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph immAllZerosV, node:$x)>; 875 876// Sign-extend the i64 elements of a vector. 877class z_vse<int shift> 878 : PatFrag<(ops node:$src), 879 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>; 880def z_vsei8 : z_vse<56>; 881def z_vsei16 : z_vse<48>; 882def z_vsei32 : z_vse<32>; 883 884// ...and again with the extensions being done on individual i64 scalars. 885class z_vse_by_parts<SDPatternOperator operator, int index1, int index2> 886 : PatFrag<(ops node:$src), 887 (z_join_dwords 888 (operator (z_vector_extract node:$src, index1)), 889 (operator (z_vector_extract node:$src, index2)))>; 890def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>; 891def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>; 892def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>; 893