181ad6265SDimitry Andric //===-- SPIRVISelLowering.h - SPIR-V DAG Lowering Interface -----*- C++ -*-===// 281ad6265SDimitry Andric // 381ad6265SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 481ad6265SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 581ad6265SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 681ad6265SDimitry Andric // 781ad6265SDimitry Andric //===----------------------------------------------------------------------===// 881ad6265SDimitry Andric // 981ad6265SDimitry Andric // This file defines the interfaces that SPIR-V uses to lower LLVM code into a 1081ad6265SDimitry Andric // selection DAG. 1181ad6265SDimitry Andric // 1281ad6265SDimitry Andric //===----------------------------------------------------------------------===// 1381ad6265SDimitry Andric 1481ad6265SDimitry Andric #ifndef LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H 1581ad6265SDimitry Andric #define LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H 1681ad6265SDimitry Andric 1781ad6265SDimitry Andric #include "llvm/CodeGen/TargetLowering.h" 1881ad6265SDimitry Andric 1981ad6265SDimitry Andric namespace llvm { 2081ad6265SDimitry Andric class SPIRVSubtarget; 2181ad6265SDimitry Andric 2281ad6265SDimitry Andric class SPIRVTargetLowering : public TargetLowering { 2381ad6265SDimitry Andric public: 2481ad6265SDimitry Andric explicit SPIRVTargetLowering(const TargetMachine &TM, 2581ad6265SDimitry Andric const SPIRVSubtarget &STI) 2681ad6265SDimitry Andric : TargetLowering(TM) {} 2781ad6265SDimitry Andric 2881ad6265SDimitry Andric // Stop IRTranslator breaking up FMA instrs to preserve types information. 2981ad6265SDimitry Andric bool isFMAFasterThanFMulAndFAdd(const MachineFunction &MF, 3081ad6265SDimitry Andric EVT) const override { 3181ad6265SDimitry Andric return true; 3281ad6265SDimitry Andric } 3381ad6265SDimitry Andric 3481ad6265SDimitry Andric // This is to prevent sexts of non-i64 vector indices which are generated 3581ad6265SDimitry Andric // within general IRTranslator hence type generation for it is omitted. 3681ad6265SDimitry Andric MVT getVectorIdxTy(const DataLayout &DL) const override { 3781ad6265SDimitry Andric return MVT::getIntegerVT(32); 3881ad6265SDimitry Andric } 3981ad6265SDimitry Andric unsigned getNumRegistersForCallingConv(LLVMContext &Context, 4081ad6265SDimitry Andric CallingConv::ID CC, 4181ad6265SDimitry Andric EVT VT) const override; 4281ad6265SDimitry Andric MVT getRegisterTypeForCallingConv(LLVMContext &Context, CallingConv::ID CC, 4381ad6265SDimitry Andric EVT VT) const override; 44*bdd1243dSDimitry Andric bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I, 45*bdd1243dSDimitry Andric MachineFunction &MF, 46*bdd1243dSDimitry Andric unsigned Intrinsic) const override; 4781ad6265SDimitry Andric }; 4881ad6265SDimitry Andric } // namespace llvm 4981ad6265SDimitry Andric 5081ad6265SDimitry Andric #endif // LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H 51