1*0b57cec5SDimitry Andric//===-- RISCVCallingConv.td - Calling Conventions RISCV ----*- tablegen -*-===// 2*0b57cec5SDimitry Andric// 3*0b57cec5SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*0b57cec5SDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 5*0b57cec5SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*0b57cec5SDimitry Andric// 7*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 8*0b57cec5SDimitry Andric// 9*0b57cec5SDimitry Andric// This describes the calling conventions for the RISCV architecture. 10*0b57cec5SDimitry Andric// 11*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 12*0b57cec5SDimitry Andric 13*0b57cec5SDimitry Andric// The RISC-V calling convention is handled with custom code in 14*0b57cec5SDimitry Andric// RISCVISelLowering.cpp (CC_RISCV). 15*0b57cec5SDimitry Andric 16*0b57cec5SDimitry Andricdef CSR_ILP32_LP64 17*0b57cec5SDimitry Andric : CalleeSavedRegs<(add X1, X3, X4, X8, X9, (sequence "X%u", 18, 27))>; 18*0b57cec5SDimitry Andric 19*0b57cec5SDimitry Andricdef CSR_ILP32F_LP64F 20*0b57cec5SDimitry Andric : CalleeSavedRegs<(add CSR_ILP32_LP64, 21*0b57cec5SDimitry Andric F8_32, F9_32, (sequence "F%u_32", 18, 27))>; 22*0b57cec5SDimitry Andric 23*0b57cec5SDimitry Andricdef CSR_ILP32D_LP64D 24*0b57cec5SDimitry Andric : CalleeSavedRegs<(add CSR_ILP32_LP64, 25*0b57cec5SDimitry Andric F8_64, F9_64, (sequence "F%u_64", 18, 27))>; 26*0b57cec5SDimitry Andric 27*0b57cec5SDimitry Andric// Needed for implementation of RISCVRegisterInfo::getNoPreservedMask() 28*0b57cec5SDimitry Andricdef CSR_NoRegs : CalleeSavedRegs<(add)>; 29*0b57cec5SDimitry Andric 30*0b57cec5SDimitry Andric// Interrupt handler needs to save/restore all registers that are used, 31*0b57cec5SDimitry Andric// both Caller and Callee saved registers. 32*0b57cec5SDimitry Andricdef CSR_Interrupt : CalleeSavedRegs<(add X1, 33*0b57cec5SDimitry Andric (sequence "X%u", 3, 9), 34*0b57cec5SDimitry Andric (sequence "X%u", 10, 11), 35*0b57cec5SDimitry Andric (sequence "X%u", 12, 17), 36*0b57cec5SDimitry Andric (sequence "X%u", 18, 27), 37*0b57cec5SDimitry Andric (sequence "X%u", 28, 31))>; 38*0b57cec5SDimitry Andric 39*0b57cec5SDimitry Andric// Same as CSR_Interrupt, but including all 32-bit FP registers. 40*0b57cec5SDimitry Andricdef CSR_XLEN_F32_Interrupt: CalleeSavedRegs<(add X1, 41*0b57cec5SDimitry Andric (sequence "X%u", 3, 9), 42*0b57cec5SDimitry Andric (sequence "X%u", 10, 11), 43*0b57cec5SDimitry Andric (sequence "X%u", 12, 17), 44*0b57cec5SDimitry Andric (sequence "X%u", 18, 27), 45*0b57cec5SDimitry Andric (sequence "X%u", 28, 31), 46*0b57cec5SDimitry Andric (sequence "F%u_32", 0, 7), 47*0b57cec5SDimitry Andric (sequence "F%u_32", 10, 11), 48*0b57cec5SDimitry Andric (sequence "F%u_32", 12, 17), 49*0b57cec5SDimitry Andric (sequence "F%u_32", 28, 31), 50*0b57cec5SDimitry Andric (sequence "F%u_32", 8, 9), 51*0b57cec5SDimitry Andric (sequence "F%u_32", 18, 27))>; 52*0b57cec5SDimitry Andric 53*0b57cec5SDimitry Andric// Same as CSR_Interrupt, but including all 64-bit FP registers. 54*0b57cec5SDimitry Andricdef CSR_XLEN_F64_Interrupt: CalleeSavedRegs<(add X1, 55*0b57cec5SDimitry Andric (sequence "X%u", 3, 9), 56*0b57cec5SDimitry Andric (sequence "X%u", 10, 11), 57*0b57cec5SDimitry Andric (sequence "X%u", 12, 17), 58*0b57cec5SDimitry Andric (sequence "X%u", 18, 27), 59*0b57cec5SDimitry Andric (sequence "X%u", 28, 31), 60*0b57cec5SDimitry Andric (sequence "F%u_64", 0, 7), 61*0b57cec5SDimitry Andric (sequence "F%u_64", 10, 11), 62*0b57cec5SDimitry Andric (sequence "F%u_64", 12, 17), 63*0b57cec5SDimitry Andric (sequence "F%u_64", 28, 31), 64*0b57cec5SDimitry Andric (sequence "F%u_64", 8, 9), 65*0b57cec5SDimitry Andric (sequence "F%u_64", 18, 27))>; 66