xref: /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h (revision 8ddb146abcdf061be9f2c0db7e391697dafad85c)
1 //===-- PPCTargetTransformInfo.h - PPC specific TTI -------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file a TargetTransformInfo::Concept conforming object specific to the
10 /// PPC target machine. It uses the target's detailed information to
11 /// provide more precise answers to certain TTI queries, while letting the
12 /// target independent and default TTI implementations handle the rest.
13 ///
14 //===----------------------------------------------------------------------===//
15 
16 #ifndef LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H
17 #define LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H
18 
19 #include "PPCTargetMachine.h"
20 #include "llvm/Analysis/TargetTransformInfo.h"
21 #include "llvm/CodeGen/BasicTTIImpl.h"
22 #include "llvm/CodeGen/TargetLowering.h"
23 
24 namespace llvm {
25 
26 class PPCTTIImpl : public BasicTTIImplBase<PPCTTIImpl> {
27   typedef BasicTTIImplBase<PPCTTIImpl> BaseT;
28   typedef TargetTransformInfo TTI;
29   friend BaseT;
30 
31   const PPCSubtarget *ST;
32   const PPCTargetLowering *TLI;
33 
34   const PPCSubtarget *getST() const { return ST; }
35   const PPCTargetLowering *getTLI() const { return TLI; }
36   bool mightUseCTR(BasicBlock *BB, TargetLibraryInfo *LibInfo,
37                    SmallPtrSetImpl<const Value *> &Visited);
38 
39 public:
40   explicit PPCTTIImpl(const PPCTargetMachine *TM, const Function &F)
41       : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
42         TLI(ST->getTargetLowering()) {}
43 
44   Optional<Instruction *> instCombineIntrinsic(InstCombiner &IC,
45                                                IntrinsicInst &II) const;
46 
47   /// \name Scalar TTI Implementations
48   /// @{
49 
50   using BaseT::getIntImmCost;
51   InstructionCost getIntImmCost(const APInt &Imm, Type *Ty,
52                                 TTI::TargetCostKind CostKind);
53 
54   InstructionCost getIntImmCostInst(unsigned Opcode, unsigned Idx,
55                                     const APInt &Imm, Type *Ty,
56                                     TTI::TargetCostKind CostKind,
57                                     Instruction *Inst = nullptr);
58   InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
59                                       const APInt &Imm, Type *Ty,
60                                       TTI::TargetCostKind CostKind);
61 
62   InstructionCost getUserCost(const User *U, ArrayRef<const Value *> Operands,
63                               TTI::TargetCostKind CostKind);
64 
65   TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
66   bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE,
67                                 AssumptionCache &AC,
68                                 TargetLibraryInfo *LibInfo,
69                                 HardwareLoopInfo &HWLoopInfo);
70   bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI,
71                   DominatorTree *DT, AssumptionCache *AC,
72                   TargetLibraryInfo *LibInfo);
73   bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info);
74   void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
75                                TTI::UnrollingPreferences &UP,
76                                OptimizationRemarkEmitter *ORE);
77   void getPeelingPreferences(Loop *L, ScalarEvolution &SE,
78                              TTI::PeelingPreferences &PP);
79   bool isLSRCostLess(TargetTransformInfo::LSRCost &C1,
80                      TargetTransformInfo::LSRCost &C2);
81   bool isNumRegsMajorCostOfLSR();
82   bool shouldBuildRelLookupTables() const;
83   /// @}
84 
85   /// \name Vector TTI Implementations
86   /// @{
87   bool useColdCCForColdCall(Function &F);
88   bool enableAggressiveInterleaving(bool LoopHasReductions);
89   TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize,
90                                                     bool IsZeroCmp) const;
91   bool enableInterleavedAccessVectorization();
92 
93   enum PPCRegisterClass {
94     GPRRC, FPRRC, VRRC, VSXRC
95   };
96   unsigned getNumberOfRegisters(unsigned ClassID) const;
97   unsigned getRegisterClassForType(bool Vector, Type *Ty = nullptr) const;
98   const char* getRegisterClassName(unsigned ClassID) const;
99   TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const;
100   unsigned getCacheLineSize() const override;
101   unsigned getPrefetchDistance() const override;
102   unsigned getMaxInterleaveFactor(unsigned VF);
103   InstructionCost vectorCostAdjustmentFactor(unsigned Opcode, Type *Ty1,
104                                              Type *Ty2);
105   InstructionCost getArithmeticInstrCost(
106       unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
107       TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
108       TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
109       TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
110       TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None,
111       ArrayRef<const Value *> Args = ArrayRef<const Value *>(),
112       const Instruction *CxtI = nullptr);
113   InstructionCost getShuffleCost(TTI::ShuffleKind Kind, Type *Tp,
114                                  ArrayRef<int> Mask, int Index, Type *SubTp);
115   InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
116                                    TTI::CastContextHint CCH,
117                                    TTI::TargetCostKind CostKind,
118                                    const Instruction *I = nullptr);
119   InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind,
120                                  const Instruction *I = nullptr);
121   InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
122                                      CmpInst::Predicate VecPred,
123                                      TTI::TargetCostKind CostKind,
124                                      const Instruction *I = nullptr);
125   InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
126                                      unsigned Index);
127   InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src,
128                                   MaybeAlign Alignment, unsigned AddressSpace,
129                                   TTI::TargetCostKind CostKind,
130                                   const Instruction *I = nullptr);
131   InstructionCost getInterleavedMemoryOpCost(
132       unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
133       Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
134       bool UseMaskForCond = false, bool UseMaskForGaps = false);
135   InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
136                                         TTI::TargetCostKind CostKind);
137   bool areTypesABICompatible(const Function *Caller, const Function *Callee,
138                              const ArrayRef<Type *> &Types) const;
139   bool hasActiveVectorLength(unsigned Opcode, Type *DataType,
140                              Align Alignment) const;
141   InstructionCost getVPMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
142                                     unsigned AddressSpace,
143                                     TTI::TargetCostKind CostKind,
144                                     const Instruction *I = nullptr);
145 
146 private:
147   // The following constant is used for estimating costs on power9.
148   static const InstructionCost::CostType P9PipelineFlushEstimate = 80;
149 
150   /// @}
151 };
152 
153 } // end namespace llvm
154 
155 #endif
156