xref: /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h (revision 0bf56da32d83fbd3b5db8d6c72cd1e7cc26fbc66)
1 //===-- MipsMCTargetDesc.h - Mips Target Descriptions -----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file provides Mips specific target descriptions.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCTARGETDESC_H
14 #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCTARGETDESC_H
15 
16 #include "llvm/Support/DataTypes.h"
17 
18 #include <memory>
19 
20 namespace llvm {
21 class MCAsmBackend;
22 class MCCodeEmitter;
23 class MCContext;
24 class MCInstrInfo;
25 class MCObjectTargetWriter;
26 class MCRegisterInfo;
27 class MCSubtargetInfo;
28 class MCTargetOptions;
29 class StringRef;
30 class Target;
31 class Triple;
32 class raw_ostream;
33 class raw_pwrite_stream;
34 
35 MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
36                                          const MCRegisterInfo &MRI,
37                                          MCContext &Ctx);
38 MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
39                                          const MCRegisterInfo &MRI,
40                                          MCContext &Ctx);
41 
42 MCAsmBackend *createMipsAsmBackend(const Target &T, const MCSubtargetInfo &STI,
43                                    const MCRegisterInfo &MRI,
44                                    const MCTargetOptions &Options);
45 
46 std::unique_ptr<MCObjectTargetWriter>
47 createMipsELFObjectWriter(const Triple &TT, bool IsN32);
48 
49 namespace MIPS_MC {
50 StringRef selectMipsCPU(const Triple &TT, StringRef CPU);
51 }
52 
53 } // End llvm namespace
54 
55 // Defines symbolic names for Mips registers.  This defines a mapping from
56 // register name to register number.
57 #define GET_REGINFO_ENUM
58 #include "MipsGenRegisterInfo.inc"
59 
60 // Defines symbolic names for the Mips instructions.
61 #define GET_INSTRINFO_ENUM
62 #include "MipsGenInstrInfo.inc"
63 
64 #define GET_SUBTARGETINFO_ENUM
65 #include "MipsGenSubtargetInfo.inc"
66 
67 #endif
68