1 //===-- ARM.h - Top-level interface for ARM representation ------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains the entry points for global functions defined in the LLVM 10 // ARM back-end. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_ARM_ARM_H 15 #define LLVM_LIB_TARGET_ARM_ARM_H 16 17 #include "llvm/IR/LegacyPassManager.h" 18 #include "llvm/Support/CodeGen.h" 19 #include <functional> 20 #include <vector> 21 22 namespace llvm { 23 24 class ARMAsmPrinter; 25 class ARMBaseTargetMachine; 26 class ARMRegisterBankInfo; 27 class ARMSubtarget; 28 struct BasicBlockInfo; 29 class Function; 30 class FunctionPass; 31 class InstructionSelector; 32 class MachineBasicBlock; 33 class MachineFunction; 34 class MachineInstr; 35 class MCInst; 36 class PassRegistry; 37 38 FunctionPass *createARMLowOverheadLoopsPass(); 39 Pass *createARMParallelDSPPass(); 40 FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM, 41 CodeGenOpt::Level OptLevel); 42 FunctionPass *createA15SDOptimizerPass(); 43 FunctionPass *createARMLoadStoreOptimizationPass(bool PreAlloc = false); 44 FunctionPass *createARMExpandPseudoPass(); 45 FunctionPass *createARMCodeGenPreparePass(); 46 FunctionPass *createARMConstantIslandPass(); 47 FunctionPass *createMLxExpansionPass(); 48 FunctionPass *createThumb2ITBlockPass(); 49 FunctionPass *createMVEVPTBlockPass(); 50 FunctionPass *createARMOptimizeBarriersPass(); 51 FunctionPass *createThumb2SizeReductionPass( 52 std::function<bool(const Function &)> Ftor = nullptr); 53 InstructionSelector * 54 createARMInstructionSelector(const ARMBaseTargetMachine &TM, const ARMSubtarget &STI, 55 const ARMRegisterBankInfo &RBI); 56 57 void LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, 58 ARMAsmPrinter &AP); 59 60 void initializeARMParallelDSPPass(PassRegistry &); 61 void initializeARMLoadStoreOptPass(PassRegistry &); 62 void initializeARMPreAllocLoadStoreOptPass(PassRegistry &); 63 void initializeARMCodeGenPreparePass(PassRegistry &); 64 void initializeARMConstantIslandsPass(PassRegistry &); 65 void initializeARMExpandPseudoPass(PassRegistry &); 66 void initializeThumb2SizeReducePass(PassRegistry &); 67 void initializeThumb2ITBlockPass(PassRegistry &); 68 void initializeMVEVPTBlockPass(PassRegistry &); 69 void initializeARMLowOverheadLoopsPass(PassRegistry &); 70 71 } // end namespace llvm 72 73 #endif // LLVM_LIB_TARGET_ARM_ARM_H 74