xref: /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/R600FrameLowering.cpp (revision 8ddb146abcdf061be9f2c0db7e391697dafad85c)
1 //===----------------------- R600FrameLowering.cpp ------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //==-----------------------------------------------------------------------===//
8 
9 #include "R600FrameLowering.h"
10 #include "R600Subtarget.h"
11 
12 using namespace llvm;
13 
14 R600FrameLowering::~R600FrameLowering() = default;
15 
16 /// \returns The number of registers allocated for \p FI.
17 StackOffset
18 R600FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
19                                           Register &FrameReg) const {
20   const MachineFrameInfo &MFI = MF.getFrameInfo();
21   const R600RegisterInfo *RI
22     = MF.getSubtarget<R600Subtarget>().getRegisterInfo();
23 
24   // Fill in FrameReg output argument.
25   FrameReg = RI->getFrameRegister(MF);
26 
27   // Start the offset at 2 so we don't overwrite work group information.
28   // FIXME: We should only do this when the shader actually uses this
29   // information.
30   unsigned OffsetBytes = 2 * (getStackWidth(MF) * 4);
31   int UpperBound = FI == -1 ? MFI.getNumObjects() : FI;
32 
33   for (int i = MFI.getObjectIndexBegin(); i < UpperBound; ++i) {
34     OffsetBytes = alignTo(OffsetBytes, MFI.getObjectAlign(i));
35     OffsetBytes += MFI.getObjectSize(i);
36     // Each register holds 4 bytes, so we must always align the offset to at
37     // least 4 bytes, so that 2 frame objects won't share the same register.
38     OffsetBytes = alignTo(OffsetBytes, Align(4));
39   }
40 
41   if (FI != -1)
42     OffsetBytes = alignTo(OffsetBytes, MFI.getObjectAlign(FI));
43 
44   return StackOffset::getFixed(OffsetBytes / (getStackWidth(MF) * 4));
45 }
46