1 //===- AMDGPULegalizerInfo ---------------------------------------*- C++ -*-==// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 /// \file 9 /// This file declares the targeting of the Machinelegalizer class for 10 /// AMDGPU. 11 /// \todo This should be generated by TableGen. 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINELEGALIZER_H 15 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINELEGALIZER_H 16 17 #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h" 18 #include "AMDGPUArgumentUsageInfo.h" 19 #include "SIInstrInfo.h" 20 21 namespace llvm { 22 23 class GCNTargetMachine; 24 class GCNSubtarget; 25 class MachineIRBuilder; 26 27 namespace AMDGPU { 28 struct ImageDimIntrinsicInfo; 29 } 30 class AMDGPULegalizerInfo final : public LegalizerInfo { 31 const GCNSubtarget &ST; 32 33 public: 34 AMDGPULegalizerInfo(const GCNSubtarget &ST, 35 const GCNTargetMachine &TM); 36 37 bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI, 38 LostDebugLocObserver &LocObserver) const override; 39 40 Register getSegmentAperture(unsigned AddrSpace, 41 MachineRegisterInfo &MRI, 42 MachineIRBuilder &B) const; 43 44 bool legalizeAddrSpaceCast(MachineInstr &MI, MachineRegisterInfo &MRI, 45 MachineIRBuilder &B) const; 46 bool legalizeFroundeven(MachineInstr &MI, MachineRegisterInfo &MRI, 47 MachineIRBuilder &B) const; 48 bool legalizeFceil(MachineInstr &MI, MachineRegisterInfo &MRI, 49 MachineIRBuilder &B) const; 50 bool legalizeFrem(MachineInstr &MI, MachineRegisterInfo &MRI, 51 MachineIRBuilder &B) const; 52 bool legalizeIntrinsicTrunc(MachineInstr &MI, MachineRegisterInfo &MRI, 53 MachineIRBuilder &B) const; 54 bool legalizeITOFP(MachineInstr &MI, MachineRegisterInfo &MRI, 55 MachineIRBuilder &B, bool Signed) const; 56 bool legalizeFPTOI(MachineInstr &MI, MachineRegisterInfo &MRI, 57 MachineIRBuilder &B, bool Signed) const; 58 bool legalizeMinNumMaxNum(LegalizerHelper &Helper, MachineInstr &MI) const; 59 bool legalizeExtractVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI, 60 MachineIRBuilder &B) const; 61 bool legalizeInsertVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI, 62 MachineIRBuilder &B) const; 63 64 bool legalizeSinCos(MachineInstr &MI, MachineRegisterInfo &MRI, 65 MachineIRBuilder &B) const; 66 67 bool buildPCRelGlobalAddress(Register DstReg, LLT PtrTy, MachineIRBuilder &B, 68 const GlobalValue *GV, int64_t Offset, 69 unsigned GAFlags = SIInstrInfo::MO_NONE) const; 70 71 void buildAbsGlobalAddress(Register DstReg, LLT PtrTy, MachineIRBuilder &B, 72 const GlobalValue *GV, 73 MachineRegisterInfo &MRI) const; 74 75 bool legalizeGlobalValue(MachineInstr &MI, MachineRegisterInfo &MRI, 76 MachineIRBuilder &B) const; 77 bool legalizeLoad(LegalizerHelper &Helper, MachineInstr &MI) const; 78 bool legalizeStore(LegalizerHelper &Helper, MachineInstr &MI) const; 79 80 bool legalizeFMad(MachineInstr &MI, MachineRegisterInfo &MRI, 81 MachineIRBuilder &B) const; 82 83 bool legalizeAtomicCmpXChg(MachineInstr &MI, MachineRegisterInfo &MRI, 84 MachineIRBuilder &B) const; 85 86 std::pair<Register, Register> 87 getScaledLogInput(MachineIRBuilder &B, Register Src, unsigned Flags) const; 88 89 bool legalizeFlog2(MachineInstr &MI, MachineIRBuilder &B) const; 90 bool legalizeFlogCommon(MachineInstr &MI, MachineIRBuilder &B) const; 91 bool legalizeFlogUnsafe(MachineIRBuilder &B, Register Dst, Register Src, 92 bool IsLog10, unsigned Flags) const; 93 bool legalizeFExp2(MachineInstr &MI, MachineIRBuilder &B) const; 94 bool legalizeFExpUnsafe(MachineIRBuilder &B, Register Dst, Register Src, 95 unsigned Flags) const; 96 bool legalizeFExp(MachineInstr &MI, MachineIRBuilder &B) const; 97 bool legalizeFPow(MachineInstr &MI, MachineIRBuilder &B) const; 98 bool legalizeFFloor(MachineInstr &MI, MachineRegisterInfo &MRI, 99 MachineIRBuilder &B) const; 100 101 bool legalizeBuildVector(MachineInstr &MI, MachineRegisterInfo &MRI, 102 MachineIRBuilder &B) const; 103 104 void buildMultiply(LegalizerHelper &Helper, MutableArrayRef<Register> Accum, 105 ArrayRef<Register> Src0, ArrayRef<Register> Src1, 106 bool UsePartialMad64_32, 107 bool SeparateOddAlignedProducts) const; 108 bool legalizeMul(LegalizerHelper &Helper, MachineInstr &MI) const; 109 bool legalizeCTLZ_CTTZ(MachineInstr &MI, MachineRegisterInfo &MRI, 110 MachineIRBuilder &B) const; 111 bool legalizeCTLZ_ZERO_UNDEF(MachineInstr &MI, MachineRegisterInfo &MRI, 112 MachineIRBuilder &B) const; 113 114 bool loadInputValue(Register DstReg, MachineIRBuilder &B, 115 const ArgDescriptor *Arg, 116 const TargetRegisterClass *ArgRC, LLT ArgTy) const; 117 bool loadInputValue(Register DstReg, MachineIRBuilder &B, 118 AMDGPUFunctionArgInfo::PreloadedValue ArgType) const; 119 120 bool legalizePointerAsRsrcIntrin(MachineInstr &MI, MachineRegisterInfo &MRI, 121 MachineIRBuilder &B) const; 122 123 bool legalizePreloadedArgIntrin( 124 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, 125 AMDGPUFunctionArgInfo::PreloadedValue ArgType) const; 126 bool legalizeWorkitemIDIntrinsic( 127 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, 128 unsigned Dim, AMDGPUFunctionArgInfo::PreloadedValue ArgType) const; 129 130 Register getKernargParameterPtr(MachineIRBuilder &B, int64_t Offset) const; 131 bool legalizeKernargMemParameter(MachineInstr &MI, MachineIRBuilder &B, 132 uint64_t Offset, 133 Align Alignment = Align(4)) const; 134 135 bool legalizeUnsignedDIV_REM(MachineInstr &MI, MachineRegisterInfo &MRI, 136 MachineIRBuilder &B) const; 137 138 void legalizeUnsignedDIV_REM32Impl(MachineIRBuilder &B, Register DstDivReg, 139 Register DstRemReg, Register Num, 140 Register Den) const; 141 142 void legalizeUnsignedDIV_REM64Impl(MachineIRBuilder &B, Register DstDivReg, 143 Register DstRemReg, Register Num, 144 Register Den) const; 145 146 bool legalizeSignedDIV_REM(MachineInstr &MI, MachineRegisterInfo &MRI, 147 MachineIRBuilder &B) const; 148 149 bool legalizeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI, 150 MachineIRBuilder &B) const; 151 bool legalizeFDIV16(MachineInstr &MI, MachineRegisterInfo &MRI, 152 MachineIRBuilder &B) const; 153 bool legalizeFDIV32(MachineInstr &MI, MachineRegisterInfo &MRI, 154 MachineIRBuilder &B) const; 155 bool legalizeFDIV64(MachineInstr &MI, MachineRegisterInfo &MRI, 156 MachineIRBuilder &B) const; 157 bool legalizeFFREXP(MachineInstr &MI, MachineRegisterInfo &MRI, 158 MachineIRBuilder &B) const; 159 bool legalizeFastUnsafeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI, 160 MachineIRBuilder &B) const; 161 bool legalizeFastUnsafeFDIV64(MachineInstr &MI, MachineRegisterInfo &MRI, 162 MachineIRBuilder &B) const; 163 bool legalizeFDIVFastIntrin(MachineInstr &MI, MachineRegisterInfo &MRI, 164 MachineIRBuilder &B) const; 165 166 bool legalizeFSQRTF16(MachineInstr &MI, MachineRegisterInfo &MRI, 167 MachineIRBuilder &B) const; 168 bool legalizeFSQRTF32(MachineInstr &MI, MachineRegisterInfo &MRI, 169 MachineIRBuilder &B) const; 170 bool legalizeFSQRTF64(MachineInstr &MI, MachineRegisterInfo &MRI, 171 MachineIRBuilder &B) const; 172 bool legalizeFSQRT(MachineInstr &MI, MachineRegisterInfo &MRI, 173 MachineIRBuilder &B) const; 174 175 bool legalizeRsqClampIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI, 176 MachineIRBuilder &B) const; 177 178 bool getImplicitArgPtr(Register DstReg, MachineRegisterInfo &MRI, 179 MachineIRBuilder &B) const; 180 181 bool legalizeImplicitArgPtr(MachineInstr &MI, MachineRegisterInfo &MRI, 182 MachineIRBuilder &B) const; 183 184 bool getLDSKernelId(Register DstReg, MachineRegisterInfo &MRI, 185 MachineIRBuilder &B) const; 186 187 bool legalizeLDSKernelId(MachineInstr &MI, MachineRegisterInfo &MRI, 188 MachineIRBuilder &B) const; 189 190 bool legalizeIsAddrSpace(MachineInstr &MI, MachineRegisterInfo &MRI, 191 MachineIRBuilder &B, unsigned AddrSpace) const; 192 193 std::pair<Register, unsigned> splitBufferOffsets(MachineIRBuilder &B, 194 Register OrigOffset) const; 195 196 Register handleD16VData(MachineIRBuilder &B, MachineRegisterInfo &MRI, 197 Register Reg, bool ImageStore = false) const; 198 Register fixStoreSourceType(MachineIRBuilder &B, Register VData, 199 bool IsFormat) const; 200 201 bool legalizeBufferStore(MachineInstr &MI, MachineRegisterInfo &MRI, 202 MachineIRBuilder &B, bool IsTyped, 203 bool IsFormat) const; 204 bool legalizeBufferLoad(MachineInstr &MI, MachineRegisterInfo &MRI, 205 MachineIRBuilder &B, bool IsFormat, 206 bool IsTyped) const; 207 bool legalizeBufferAtomic(MachineInstr &MI, MachineIRBuilder &B, 208 Intrinsic::ID IID) const; 209 210 bool legalizeLaneOp(LegalizerHelper &Helper, MachineInstr &MI, 211 Intrinsic::ID IID) const; 212 213 bool legalizeBVHIntrinsic(MachineInstr &MI, MachineIRBuilder &B) const; 214 215 bool legalizeFPTruncRound(MachineInstr &MI, MachineIRBuilder &B) const; 216 bool legalizeStackSave(MachineInstr &MI, MachineIRBuilder &B) const; 217 bool legalizeWaveID(MachineInstr &MI, MachineIRBuilder &B) const; 218 219 bool legalizeGetFPEnv(MachineInstr &MI, MachineRegisterInfo &MRI, 220 MachineIRBuilder &B) const; 221 bool legalizeSetFPEnv(MachineInstr &MI, MachineRegisterInfo &MRI, 222 MachineIRBuilder &B) const; 223 224 bool legalizeImageIntrinsic( 225 MachineInstr &MI, MachineIRBuilder &B, 226 GISelChangeObserver &Observer, 227 const AMDGPU::ImageDimIntrinsicInfo *ImageDimIntr) const; 228 229 bool legalizeSBufferLoad(LegalizerHelper &Helper, MachineInstr &MI) const; 230 231 bool legalizeTrap(MachineInstr &MI, MachineRegisterInfo &MRI, 232 MachineIRBuilder &B) const; 233 bool legalizeTrapEndpgm(MachineInstr &MI, MachineRegisterInfo &MRI, 234 MachineIRBuilder &B) const; 235 bool legalizeTrapHsaQueuePtr(MachineInstr &MI, MachineRegisterInfo &MRI, 236 MachineIRBuilder &B) const; 237 bool legalizeTrapHsa(MachineInstr &MI, MachineRegisterInfo &MRI, 238 MachineIRBuilder &B) const; 239 bool legalizeDebugTrap(MachineInstr &MI, MachineRegisterInfo &MRI, 240 MachineIRBuilder &B) const; 241 242 bool legalizeIntrinsic(LegalizerHelper &Helper, 243 MachineInstr &MI) const override; 244 }; 245 } // End llvm namespace. 246 #endif 247