1//=- AArch64Combine.td - Define AArch64 Combine Rules ---------*-tablegen -*-=// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// 10//===----------------------------------------------------------------------===// 11 12include "llvm/Target/GlobalISel/Combine.td" 13 14def fconstant_to_constant : GICombineRule< 15 (defs root:$root), 16 (match (wip_match_opcode G_FCONSTANT):$root, 17 [{ return matchFConstantToConstant(*${root}, MRI); }]), 18 (apply [{ applyFConstantToConstant(*${root}); }])>; 19 20def icmp_redundant_trunc_matchdata : GIDefMatchData<"Register">; 21def icmp_redundant_trunc : GICombineRule< 22 (defs root:$root, icmp_redundant_trunc_matchdata:$matchinfo), 23 (match (wip_match_opcode G_ICMP):$root, 24 [{ return matchICmpRedundantTrunc(*${root}, MRI, Helper.getKnownBits(), ${matchinfo}); }]), 25 (apply [{ applyICmpRedundantTrunc(*${root}, MRI, B, Observer, ${matchinfo}); }])>; 26 27// AArch64-specific offset folding for G_GLOBAL_VALUE. 28def fold_global_offset_matchdata : GIDefMatchData<"std::pair<uint64_t, uint64_t>">; 29def fold_global_offset : GICombineRule< 30 (defs root:$root, fold_global_offset_matchdata:$matchinfo), 31 (match (wip_match_opcode G_GLOBAL_VALUE):$root, 32 [{ return matchFoldGlobalOffset(*${root}, MRI, ${matchinfo}); }]), 33 (apply [{ applyFoldGlobalOffset(*${root}, MRI, B, Observer, ${matchinfo});}]) 34>; 35 36// Boolean: 0 = G_ZEXT, 1 = G_SEXT 37def ext_addv_to_udot_addv_matchinfo : GIDefMatchData<"std::tuple<Register, Register, bool>">; 38let Predicates = [HasDotProd] in { 39def ext_addv_to_udot_addv : GICombineRule< 40 (defs root:$root, ext_addv_to_udot_addv_matchinfo:$matchinfo), 41 (match (wip_match_opcode G_VECREDUCE_ADD):$root, 42 [{ return matchExtAddvToUdotAddv(*${root}, MRI, STI, ${matchinfo}); }]), 43 (apply [{ applyExtAddvToUdotAddv(*${root}, MRI, B, Observer, STI, ${matchinfo}); }]) 44>; 45} 46 47def AArch64PreLegalizerCombiner: GICombiner< 48 "AArch64PreLegalizerCombinerImpl", [all_combines, 49 fconstant_to_constant, 50 icmp_redundant_trunc, 51 fold_global_offset, 52 shuffle_to_extract, 53 ext_addv_to_udot_addv]> { 54 let CombineAllMethodName = "tryCombineAllImpl"; 55} 56 57def AArch64O0PreLegalizerCombiner: GICombiner< 58 "AArch64O0PreLegalizerCombinerImpl", [optnone_combines]> { 59 let CombineAllMethodName = "tryCombineAllImpl"; 60} 61 62// Matchdata for combines which replace a G_SHUFFLE_VECTOR with a 63// target-specific opcode. 64def shuffle_matchdata : GIDefMatchData<"ShuffleVectorPseudo">; 65 66def rev : GICombineRule< 67 (defs root:$root, shuffle_matchdata:$matchinfo), 68 (match (wip_match_opcode G_SHUFFLE_VECTOR):$root, 69 [{ return matchREV(*${root}, MRI, ${matchinfo}); }]), 70 (apply [{ applyShuffleVectorPseudo(*${root}, ${matchinfo}); }]) 71>; 72 73def zip : GICombineRule< 74 (defs root:$root, shuffle_matchdata:$matchinfo), 75 (match (wip_match_opcode G_SHUFFLE_VECTOR):$root, 76 [{ return matchZip(*${root}, MRI, ${matchinfo}); }]), 77 (apply [{ applyShuffleVectorPseudo(*${root}, ${matchinfo}); }]) 78>; 79 80def uzp : GICombineRule< 81 (defs root:$root, shuffle_matchdata:$matchinfo), 82 (match (wip_match_opcode G_SHUFFLE_VECTOR):$root, 83 [{ return matchUZP(*${root}, MRI, ${matchinfo}); }]), 84 (apply [{ applyShuffleVectorPseudo(*${root}, ${matchinfo}); }]) 85>; 86 87def dup: GICombineRule < 88 (defs root:$root, shuffle_matchdata:$matchinfo), 89 (match (wip_match_opcode G_SHUFFLE_VECTOR):$root, 90 [{ return matchDup(*${root}, MRI, ${matchinfo}); }]), 91 (apply [{ applyShuffleVectorPseudo(*${root}, ${matchinfo}); }]) 92>; 93 94def trn : GICombineRule< 95 (defs root:$root, shuffle_matchdata:$matchinfo), 96 (match (wip_match_opcode G_SHUFFLE_VECTOR):$root, 97 [{ return matchTRN(*${root}, MRI, ${matchinfo}); }]), 98 (apply [{ applyShuffleVectorPseudo(*${root}, ${matchinfo}); }]) 99>; 100 101def ext: GICombineRule < 102 (defs root:$root, shuffle_matchdata:$matchinfo), 103 (match (wip_match_opcode G_SHUFFLE_VECTOR):$root, 104 [{ return matchEXT(*${root}, MRI, ${matchinfo}); }]), 105 (apply [{ applyEXT(*${root}, ${matchinfo}); }]) 106>; 107 108def shuf_to_ins_matchdata : GIDefMatchData<"std::tuple<Register, int, Register, int>">; 109def shuf_to_ins: GICombineRule < 110 (defs root:$root, shuf_to_ins_matchdata:$matchinfo), 111 (match (wip_match_opcode G_SHUFFLE_VECTOR):$root, 112 [{ return matchINS(*${root}, MRI, ${matchinfo}); }]), 113 (apply [{ applyINS(*${root}, MRI, B, ${matchinfo}); }]) 114>; 115 116def vashr_vlshr_imm_matchdata : GIDefMatchData<"int64_t">; 117def vashr_vlshr_imm : GICombineRule< 118 (defs root:$root, vashr_vlshr_imm_matchdata:$matchinfo), 119 (match (wip_match_opcode G_ASHR, G_LSHR):$root, 120 [{ return matchVAshrLshrImm(*${root}, MRI, ${matchinfo}); }]), 121 (apply [{ applyVAshrLshrImm(*${root}, MRI, ${matchinfo}); }]) 122>; 123 124def form_duplane_matchdata : 125 GIDefMatchData<"std::pair<unsigned, int>">; 126def form_duplane : GICombineRule < 127 (defs root:$root, form_duplane_matchdata:$matchinfo), 128 (match (wip_match_opcode G_SHUFFLE_VECTOR):$root, 129 [{ return matchDupLane(*${root}, MRI, ${matchinfo}); }]), 130 (apply [{ applyDupLane(*${root}, MRI, B, ${matchinfo}); }]) 131>; 132 133def shuffle_vector_lowering : GICombineGroup<[dup, rev, ext, zip, uzp, trn, 134 form_duplane, 135 shuf_to_ins]>; 136 137// Turn G_UNMERGE_VALUES -> G_EXTRACT_VECTOR_ELT's 138def vector_unmerge_lowering : GICombineRule < 139 (defs root:$root), 140 (match (wip_match_opcode G_UNMERGE_VALUES):$root, 141 [{ return matchScalarizeVectorUnmerge(*${root}, MRI); }]), 142 (apply [{ applyScalarizeVectorUnmerge(*${root}, MRI, B); }]) 143>; 144 145def adjust_icmp_imm_matchdata : 146 GIDefMatchData<"std::pair<uint64_t, CmpInst::Predicate>">; 147def adjust_icmp_imm : GICombineRule < 148 (defs root:$root, adjust_icmp_imm_matchdata:$matchinfo), 149 (match (wip_match_opcode G_ICMP):$root, 150 [{ return matchAdjustICmpImmAndPred(*${root}, MRI, ${matchinfo}); }]), 151 (apply [{ applyAdjustICmpImmAndPred(*${root}, ${matchinfo}, B, Observer); }]) 152>; 153 154def swap_icmp_operands : GICombineRule < 155 (defs root:$root), 156 (match (wip_match_opcode G_ICMP):$root, 157 [{ return trySwapICmpOperands(*${root}, MRI); }]), 158 (apply [{ applySwapICmpOperands(*${root}, Observer); }]) 159>; 160 161def icmp_lowering : GICombineGroup<[adjust_icmp_imm, swap_icmp_operands]>; 162 163def extractvecelt_pairwise_add_matchdata : GIDefMatchData<"std::tuple<unsigned, LLT, Register>">; 164def extractvecelt_pairwise_add : GICombineRule< 165 (defs root:$root, extractvecelt_pairwise_add_matchdata:$matchinfo), 166 (match (wip_match_opcode G_EXTRACT_VECTOR_ELT):$root, 167 [{ return matchExtractVecEltPairwiseAdd(*${root}, MRI, ${matchinfo}); }]), 168 (apply [{ applyExtractVecEltPairwiseAdd(*${root}, MRI, B, ${matchinfo}); }]) 169>; 170 171def mul_const_matchdata : GIDefMatchData<"std::function<void(MachineIRBuilder&, Register)>">; 172def mul_const : GICombineRule< 173 (defs root:$root, mul_const_matchdata:$matchinfo), 174 (match (wip_match_opcode G_MUL):$root, 175 [{ return matchAArch64MulConstCombine(*${root}, MRI, ${matchinfo}); }]), 176 (apply [{ applyAArch64MulConstCombine(*${root}, MRI, B, ${matchinfo}); }]) 177>; 178 179def lower_mull : GICombineRule< 180 (defs root:$root), 181 (match (wip_match_opcode G_MUL):$root, 182 [{ return matchExtMulToMULL(*${root}, MRI); }]), 183 (apply [{ applyExtMulToMULL(*${root}, MRI, B, Observer); }]) 184>; 185 186def build_vector_to_dup : GICombineRule< 187 (defs root:$root), 188 (match (wip_match_opcode G_BUILD_VECTOR):$root, 189 [{ return matchBuildVectorToDup(*${root}, MRI); }]), 190 (apply [{ applyBuildVectorToDup(*${root}, MRI, B); }]) 191>; 192 193def build_vector_lowering : GICombineGroup<[build_vector_to_dup]>; 194 195def lower_vector_fcmp : GICombineRule< 196 (defs root:$root), 197 (match (wip_match_opcode G_FCMP):$root, 198 [{ return matchLowerVectorFCMP(*${root}, MRI, B); }]), 199 (apply [{ applyLowerVectorFCMP(*${root}, MRI, B); }])>; 200 201def form_truncstore_matchdata : GIDefMatchData<"Register">; 202def form_truncstore : GICombineRule< 203 (defs root:$root, form_truncstore_matchdata:$matchinfo), 204 (match (wip_match_opcode G_STORE):$root, 205 [{ return matchFormTruncstore(*${root}, MRI, ${matchinfo}); }]), 206 (apply [{ applyFormTruncstore(*${root}, MRI, B, Observer, ${matchinfo}); }]) 207>; 208 209def fold_merge_to_zext : GICombineRule< 210 (defs root:$d), 211 (match (wip_match_opcode G_MERGE_VALUES):$d, 212 [{ return matchFoldMergeToZext(*${d}, MRI); }]), 213 (apply [{ applyFoldMergeToZext(*${d}, MRI, B, Observer); }]) 214>; 215 216def mutate_anyext_to_zext : GICombineRule< 217 (defs root:$d), 218 (match (wip_match_opcode G_ANYEXT):$d, 219 [{ return matchMutateAnyExtToZExt(*${d}, MRI); }]), 220 (apply [{ applyMutateAnyExtToZExt(*${d}, MRI, B, Observer); }]) 221>; 222 223def split_store_zero_128 : GICombineRule< 224 (defs root:$d), 225 (match (wip_match_opcode G_STORE):$d, 226 [{ return matchSplitStoreZero128(*${d}, MRI); }]), 227 (apply [{ applySplitStoreZero128(*${d}, MRI, B, Observer); }]) 228>; 229 230def vector_sext_inreg_to_shift : GICombineRule< 231 (defs root:$d), 232 (match (wip_match_opcode G_SEXT_INREG):$d, 233 [{ return matchVectorSextInReg(*${d}, MRI); }]), 234 (apply [{ applyVectorSextInReg(*${d}, MRI, B, Observer); }]) 235>; 236 237def unmerge_ext_to_unmerge_matchdata : GIDefMatchData<"Register">; 238def unmerge_ext_to_unmerge : GICombineRule< 239 (defs root:$d, unmerge_ext_to_unmerge_matchdata:$matchinfo), 240 (match (wip_match_opcode G_UNMERGE_VALUES):$d, 241 [{ return matchUnmergeExtToUnmerge(*${d}, MRI, ${matchinfo}); }]), 242 (apply [{ applyUnmergeExtToUnmerge(*${d}, MRI, B, Observer, ${matchinfo}); }]) 243>; 244 245def regtriple_matchdata : GIDefMatchData<"std::tuple<Register, Register, Register>">; 246def or_to_bsp: GICombineRule < 247 (defs root:$root, regtriple_matchdata:$matchinfo), 248 (match (wip_match_opcode G_OR):$root, 249 [{ return matchOrToBSP(*${root}, MRI, ${matchinfo}); }]), 250 (apply [{ applyOrToBSP(*${root}, MRI, B, ${matchinfo}); }]) 251>; 252 253// Post-legalization combines which should happen at all optimization levels. 254// (E.g. ones that facilitate matching for the selector) For example, matching 255// pseudos. 256def AArch64PostLegalizerLowering 257 : GICombiner<"AArch64PostLegalizerLoweringImpl", 258 [shuffle_vector_lowering, vashr_vlshr_imm, 259 icmp_lowering, build_vector_lowering, 260 lower_vector_fcmp, form_truncstore, 261 vector_sext_inreg_to_shift, 262 unmerge_ext_to_unmerge, lower_mull, 263 vector_unmerge_lowering]> { 264} 265 266// Post-legalization combines which are primarily optimizations. 267def AArch64PostLegalizerCombiner 268 : GICombiner<"AArch64PostLegalizerCombinerImpl", 269 [copy_prop, combines_for_extload, 270 combine_indexed_load_store, 271 sext_trunc_sextload, mutate_anyext_to_zext, 272 hoist_logic_op_with_same_opcode_hands, 273 redundant_and, xor_of_and_with_same_reg, 274 extractvecelt_pairwise_add, redundant_or, 275 mul_const, redundant_sext_inreg, 276 form_bitfield_extract, rotate_out_of_range, 277 icmp_to_true_false_known_bits, merge_unmerge, 278 select_combines, fold_merge_to_zext, 279 constant_fold_binops, identity_combines, 280 ptr_add_immed_chain, overlapping_and, 281 split_store_zero_128, undef_combines, 282 select_to_minmax, or_to_bsp]> { 283} 284