xref: /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/SelectionDAGNodes.h (revision 1db9f3b21e39176dd5b67cf8ac378633b172463e)
1 //===- llvm/CodeGen/SelectionDAGNodes.h - SelectionDAG Nodes ----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares the SDNode class and derived classes, which are used to
10 // represent the nodes and operations present in a SelectionDAG.  These nodes
11 // and operations are machine code level operations, with some similarities to
12 // the GCC RTL representation.
13 //
14 // Clients should include the SelectionDAG.h file instead of this file directly.
15 //
16 //===----------------------------------------------------------------------===//
17 
18 #ifndef LLVM_CODEGEN_SELECTIONDAGNODES_H
19 #define LLVM_CODEGEN_SELECTIONDAGNODES_H
20 
21 #include "llvm/ADT/APFloat.h"
22 #include "llvm/ADT/ArrayRef.h"
23 #include "llvm/ADT/BitVector.h"
24 #include "llvm/ADT/FoldingSet.h"
25 #include "llvm/ADT/GraphTraits.h"
26 #include "llvm/ADT/SmallPtrSet.h"
27 #include "llvm/ADT/SmallVector.h"
28 #include "llvm/ADT/ilist_node.h"
29 #include "llvm/ADT/iterator.h"
30 #include "llvm/ADT/iterator_range.h"
31 #include "llvm/CodeGen/ISDOpcodes.h"
32 #include "llvm/CodeGen/MachineMemOperand.h"
33 #include "llvm/CodeGen/MachineValueType.h"
34 #include "llvm/CodeGen/Register.h"
35 #include "llvm/CodeGen/ValueTypes.h"
36 #include "llvm/IR/Constants.h"
37 #include "llvm/IR/DebugLoc.h"
38 #include "llvm/IR/Instruction.h"
39 #include "llvm/IR/Instructions.h"
40 #include "llvm/IR/Metadata.h"
41 #include "llvm/IR/Operator.h"
42 #include "llvm/Support/AlignOf.h"
43 #include "llvm/Support/AtomicOrdering.h"
44 #include "llvm/Support/Casting.h"
45 #include "llvm/Support/ErrorHandling.h"
46 #include "llvm/Support/TypeSize.h"
47 #include <algorithm>
48 #include <cassert>
49 #include <climits>
50 #include <cstddef>
51 #include <cstdint>
52 #include <cstring>
53 #include <iterator>
54 #include <string>
55 #include <tuple>
56 #include <utility>
57 
58 namespace llvm {
59 
60 class APInt;
61 class Constant;
62 class GlobalValue;
63 class MachineBasicBlock;
64 class MachineConstantPoolValue;
65 class MCSymbol;
66 class raw_ostream;
67 class SDNode;
68 class SelectionDAG;
69 class Type;
70 class Value;
71 
72 void checkForCycles(const SDNode *N, const SelectionDAG *DAG = nullptr,
73                     bool force = false);
74 
75 /// This represents a list of ValueType's that has been intern'd by
76 /// a SelectionDAG.  Instances of this simple value class are returned by
77 /// SelectionDAG::getVTList(...).
78 ///
79 struct SDVTList {
80   const EVT *VTs;
81   unsigned int NumVTs;
82 };
83 
84 namespace ISD {
85 
86   /// Node predicates
87 
88 /// If N is a BUILD_VECTOR or SPLAT_VECTOR node whose elements are all the
89 /// same constant or undefined, return true and return the constant value in
90 /// \p SplatValue.
91 bool isConstantSplatVector(const SDNode *N, APInt &SplatValue);
92 
93 /// Return true if the specified node is a BUILD_VECTOR or SPLAT_VECTOR where
94 /// all of the elements are ~0 or undef. If \p BuildVectorOnly is set to
95 /// true, it only checks BUILD_VECTOR.
96 bool isConstantSplatVectorAllOnes(const SDNode *N,
97                                   bool BuildVectorOnly = false);
98 
99 /// Return true if the specified node is a BUILD_VECTOR or SPLAT_VECTOR where
100 /// all of the elements are 0 or undef. If \p BuildVectorOnly is set to true, it
101 /// only checks BUILD_VECTOR.
102 bool isConstantSplatVectorAllZeros(const SDNode *N,
103                                    bool BuildVectorOnly = false);
104 
105 /// Return true if the specified node is a BUILD_VECTOR where all of the
106 /// elements are ~0 or undef.
107 bool isBuildVectorAllOnes(const SDNode *N);
108 
109 /// Return true if the specified node is a BUILD_VECTOR where all of the
110 /// elements are 0 or undef.
111 bool isBuildVectorAllZeros(const SDNode *N);
112 
113 /// Return true if the specified node is a BUILD_VECTOR node of all
114 /// ConstantSDNode or undef.
115 bool isBuildVectorOfConstantSDNodes(const SDNode *N);
116 
117 /// Return true if the specified node is a BUILD_VECTOR node of all
118 /// ConstantFPSDNode or undef.
119 bool isBuildVectorOfConstantFPSDNodes(const SDNode *N);
120 
121 /// Returns true if the specified node is a vector where all elements can
122 /// be truncated to the specified element size without a loss in meaning.
123 bool isVectorShrinkable(const SDNode *N, unsigned NewEltSize, bool Signed);
124 
125 /// Return true if the node has at least one operand and all operands of the
126 /// specified node are ISD::UNDEF.
127 bool allOperandsUndef(const SDNode *N);
128 
129 /// Return true if the specified node is FREEZE(UNDEF).
130 bool isFreezeUndef(const SDNode *N);
131 
132 } // end namespace ISD
133 
134 //===----------------------------------------------------------------------===//
135 /// Unlike LLVM values, Selection DAG nodes may return multiple
136 /// values as the result of a computation.  Many nodes return multiple values,
137 /// from loads (which define a token and a return value) to ADDC (which returns
138 /// a result and a carry value), to calls (which may return an arbitrary number
139 /// of values).
140 ///
141 /// As such, each use of a SelectionDAG computation must indicate the node that
142 /// computes it as well as which return value to use from that node.  This pair
143 /// of information is represented with the SDValue value type.
144 ///
145 class SDValue {
146   friend struct DenseMapInfo<SDValue>;
147 
148   SDNode *Node = nullptr; // The node defining the value we are using.
149   unsigned ResNo = 0;     // Which return value of the node we are using.
150 
151 public:
152   SDValue() = default;
153   SDValue(SDNode *node, unsigned resno);
154 
155   /// get the index which selects a specific result in the SDNode
156   unsigned getResNo() const { return ResNo; }
157 
158   /// get the SDNode which holds the desired result
159   SDNode *getNode() const { return Node; }
160 
161   /// set the SDNode
162   void setNode(SDNode *N) { Node = N; }
163 
164   inline SDNode *operator->() const { return Node; }
165 
166   bool operator==(const SDValue &O) const {
167     return Node == O.Node && ResNo == O.ResNo;
168   }
169   bool operator!=(const SDValue &O) const {
170     return !operator==(O);
171   }
172   bool operator<(const SDValue &O) const {
173     return std::tie(Node, ResNo) < std::tie(O.Node, O.ResNo);
174   }
175   explicit operator bool() const {
176     return Node != nullptr;
177   }
178 
179   SDValue getValue(unsigned R) const {
180     return SDValue(Node, R);
181   }
182 
183   /// Return true if this node is an operand of N.
184   bool isOperandOf(const SDNode *N) const;
185 
186   /// Return the ValueType of the referenced return value.
187   inline EVT getValueType() const;
188 
189   /// Return the simple ValueType of the referenced return value.
190   MVT getSimpleValueType() const {
191     return getValueType().getSimpleVT();
192   }
193 
194   /// Returns the size of the value in bits.
195   ///
196   /// If the value type is a scalable vector type, the scalable property will
197   /// be set and the runtime size will be a positive integer multiple of the
198   /// base size.
199   TypeSize getValueSizeInBits() const {
200     return getValueType().getSizeInBits();
201   }
202 
203   uint64_t getScalarValueSizeInBits() const {
204     return getValueType().getScalarType().getFixedSizeInBits();
205   }
206 
207   // Forwarding methods - These forward to the corresponding methods in SDNode.
208   inline unsigned getOpcode() const;
209   inline unsigned getNumOperands() const;
210   inline const SDValue &getOperand(unsigned i) const;
211   inline uint64_t getConstantOperandVal(unsigned i) const;
212   inline const APInt &getConstantOperandAPInt(unsigned i) const;
213   inline bool isTargetMemoryOpcode() const;
214   inline bool isTargetOpcode() const;
215   inline bool isMachineOpcode() const;
216   inline bool isUndef() const;
217   inline unsigned getMachineOpcode() const;
218   inline const DebugLoc &getDebugLoc() const;
219   inline void dump() const;
220   inline void dump(const SelectionDAG *G) const;
221   inline void dumpr() const;
222   inline void dumpr(const SelectionDAG *G) const;
223 
224   /// Return true if this operand (which must be a chain) reaches the
225   /// specified operand without crossing any side-effecting instructions.
226   /// In practice, this looks through token factors and non-volatile loads.
227   /// In order to remain efficient, this only
228   /// looks a couple of nodes in, it does not do an exhaustive search.
229   bool reachesChainWithoutSideEffects(SDValue Dest,
230                                       unsigned Depth = 2) const;
231 
232   /// Return true if there are no nodes using value ResNo of Node.
233   inline bool use_empty() const;
234 
235   /// Return true if there is exactly one node using value ResNo of Node.
236   inline bool hasOneUse() const;
237 };
238 
239 template<> struct DenseMapInfo<SDValue> {
240   static inline SDValue getEmptyKey() {
241     SDValue V;
242     V.ResNo = -1U;
243     return V;
244   }
245 
246   static inline SDValue getTombstoneKey() {
247     SDValue V;
248     V.ResNo = -2U;
249     return V;
250   }
251 
252   static unsigned getHashValue(const SDValue &Val) {
253     return ((unsigned)((uintptr_t)Val.getNode() >> 4) ^
254             (unsigned)((uintptr_t)Val.getNode() >> 9)) + Val.getResNo();
255   }
256 
257   static bool isEqual(const SDValue &LHS, const SDValue &RHS) {
258     return LHS == RHS;
259   }
260 };
261 
262 /// Allow casting operators to work directly on
263 /// SDValues as if they were SDNode*'s.
264 template<> struct simplify_type<SDValue> {
265   using SimpleType = SDNode *;
266 
267   static SimpleType getSimplifiedValue(SDValue &Val) {
268     return Val.getNode();
269   }
270 };
271 template<> struct simplify_type<const SDValue> {
272   using SimpleType = /*const*/ SDNode *;
273 
274   static SimpleType getSimplifiedValue(const SDValue &Val) {
275     return Val.getNode();
276   }
277 };
278 
279 /// Represents a use of a SDNode. This class holds an SDValue,
280 /// which records the SDNode being used and the result number, a
281 /// pointer to the SDNode using the value, and Next and Prev pointers,
282 /// which link together all the uses of an SDNode.
283 ///
284 class SDUse {
285   /// Val - The value being used.
286   SDValue Val;
287   /// User - The user of this value.
288   SDNode *User = nullptr;
289   /// Prev, Next - Pointers to the uses list of the SDNode referred by
290   /// this operand.
291   SDUse **Prev = nullptr;
292   SDUse *Next = nullptr;
293 
294 public:
295   SDUse() = default;
296   SDUse(const SDUse &U) = delete;
297   SDUse &operator=(const SDUse &) = delete;
298 
299   /// Normally SDUse will just implicitly convert to an SDValue that it holds.
300   operator const SDValue&() const { return Val; }
301 
302   /// If implicit conversion to SDValue doesn't work, the get() method returns
303   /// the SDValue.
304   const SDValue &get() const { return Val; }
305 
306   /// This returns the SDNode that contains this Use.
307   SDNode *getUser() { return User; }
308   const SDNode *getUser() const { return User; }
309 
310   /// Get the next SDUse in the use list.
311   SDUse *getNext() const { return Next; }
312 
313   /// Convenience function for get().getNode().
314   SDNode *getNode() const { return Val.getNode(); }
315   /// Convenience function for get().getResNo().
316   unsigned getResNo() const { return Val.getResNo(); }
317   /// Convenience function for get().getValueType().
318   EVT getValueType() const { return Val.getValueType(); }
319 
320   /// Convenience function for get().operator==
321   bool operator==(const SDValue &V) const {
322     return Val == V;
323   }
324 
325   /// Convenience function for get().operator!=
326   bool operator!=(const SDValue &V) const {
327     return Val != V;
328   }
329 
330   /// Convenience function for get().operator<
331   bool operator<(const SDValue &V) const {
332     return Val < V;
333   }
334 
335 private:
336   friend class SelectionDAG;
337   friend class SDNode;
338   // TODO: unfriend HandleSDNode once we fix its operand handling.
339   friend class HandleSDNode;
340 
341   void setUser(SDNode *p) { User = p; }
342 
343   /// Remove this use from its existing use list, assign it the
344   /// given value, and add it to the new value's node's use list.
345   inline void set(const SDValue &V);
346   /// Like set, but only supports initializing a newly-allocated
347   /// SDUse with a non-null value.
348   inline void setInitial(const SDValue &V);
349   /// Like set, but only sets the Node portion of the value,
350   /// leaving the ResNo portion unmodified.
351   inline void setNode(SDNode *N);
352 
353   void addToList(SDUse **List) {
354     Next = *List;
355     if (Next) Next->Prev = &Next;
356     Prev = List;
357     *List = this;
358   }
359 
360   void removeFromList() {
361     *Prev = Next;
362     if (Next) Next->Prev = Prev;
363   }
364 };
365 
366 /// simplify_type specializations - Allow casting operators to work directly on
367 /// SDValues as if they were SDNode*'s.
368 template<> struct simplify_type<SDUse> {
369   using SimpleType = SDNode *;
370 
371   static SimpleType getSimplifiedValue(SDUse &Val) {
372     return Val.getNode();
373   }
374 };
375 
376 /// These are IR-level optimization flags that may be propagated to SDNodes.
377 /// TODO: This data structure should be shared by the IR optimizer and the
378 /// the backend.
379 struct SDNodeFlags {
380 private:
381   bool NoUnsignedWrap : 1;
382   bool NoSignedWrap : 1;
383   bool Exact : 1;
384   bool Disjoint : 1;
385   bool NonNeg : 1;
386   bool NoNaNs : 1;
387   bool NoInfs : 1;
388   bool NoSignedZeros : 1;
389   bool AllowReciprocal : 1;
390   bool AllowContract : 1;
391   bool ApproximateFuncs : 1;
392   bool AllowReassociation : 1;
393 
394   // We assume instructions do not raise floating-point exceptions by default,
395   // and only those marked explicitly may do so.  We could choose to represent
396   // this via a positive "FPExcept" flags like on the MI level, but having a
397   // negative "NoFPExcept" flag here makes the flag intersection logic more
398   // straightforward.
399   bool NoFPExcept : 1;
400   // Instructions with attached 'unpredictable' metadata on IR level.
401   bool Unpredictable : 1;
402 
403 public:
404   /// Default constructor turns off all optimization flags.
405   SDNodeFlags()
406       : NoUnsignedWrap(false), NoSignedWrap(false), Exact(false),
407         Disjoint(false), NonNeg(false), NoNaNs(false), NoInfs(false),
408         NoSignedZeros(false), AllowReciprocal(false), AllowContract(false),
409         ApproximateFuncs(false), AllowReassociation(false), NoFPExcept(false),
410         Unpredictable(false) {}
411 
412   /// Propagate the fast-math-flags from an IR FPMathOperator.
413   void copyFMF(const FPMathOperator &FPMO) {
414     setNoNaNs(FPMO.hasNoNaNs());
415     setNoInfs(FPMO.hasNoInfs());
416     setNoSignedZeros(FPMO.hasNoSignedZeros());
417     setAllowReciprocal(FPMO.hasAllowReciprocal());
418     setAllowContract(FPMO.hasAllowContract());
419     setApproximateFuncs(FPMO.hasApproxFunc());
420     setAllowReassociation(FPMO.hasAllowReassoc());
421   }
422 
423   // These are mutators for each flag.
424   void setNoUnsignedWrap(bool b) { NoUnsignedWrap = b; }
425   void setNoSignedWrap(bool b) { NoSignedWrap = b; }
426   void setExact(bool b) { Exact = b; }
427   void setDisjoint(bool b) { Disjoint = b; }
428   void setNonNeg(bool b) { NonNeg = b; }
429   void setNoNaNs(bool b) { NoNaNs = b; }
430   void setNoInfs(bool b) { NoInfs = b; }
431   void setNoSignedZeros(bool b) { NoSignedZeros = b; }
432   void setAllowReciprocal(bool b) { AllowReciprocal = b; }
433   void setAllowContract(bool b) { AllowContract = b; }
434   void setApproximateFuncs(bool b) { ApproximateFuncs = b; }
435   void setAllowReassociation(bool b) { AllowReassociation = b; }
436   void setNoFPExcept(bool b) { NoFPExcept = b; }
437   void setUnpredictable(bool b) { Unpredictable = b; }
438 
439   // These are accessors for each flag.
440   bool hasNoUnsignedWrap() const { return NoUnsignedWrap; }
441   bool hasNoSignedWrap() const { return NoSignedWrap; }
442   bool hasExact() const { return Exact; }
443   bool hasDisjoint() const { return Disjoint; }
444   bool hasNonNeg() const { return NonNeg; }
445   bool hasNoNaNs() const { return NoNaNs; }
446   bool hasNoInfs() const { return NoInfs; }
447   bool hasNoSignedZeros() const { return NoSignedZeros; }
448   bool hasAllowReciprocal() const { return AllowReciprocal; }
449   bool hasAllowContract() const { return AllowContract; }
450   bool hasApproximateFuncs() const { return ApproximateFuncs; }
451   bool hasAllowReassociation() const { return AllowReassociation; }
452   bool hasNoFPExcept() const { return NoFPExcept; }
453   bool hasUnpredictable() const { return Unpredictable; }
454 
455   /// Clear any flags in this flag set that aren't also set in Flags. All
456   /// flags will be cleared if Flags are undefined.
457   void intersectWith(const SDNodeFlags Flags) {
458     NoUnsignedWrap &= Flags.NoUnsignedWrap;
459     NoSignedWrap &= Flags.NoSignedWrap;
460     Exact &= Flags.Exact;
461     Disjoint &= Flags.Disjoint;
462     NonNeg &= Flags.NonNeg;
463     NoNaNs &= Flags.NoNaNs;
464     NoInfs &= Flags.NoInfs;
465     NoSignedZeros &= Flags.NoSignedZeros;
466     AllowReciprocal &= Flags.AllowReciprocal;
467     AllowContract &= Flags.AllowContract;
468     ApproximateFuncs &= Flags.ApproximateFuncs;
469     AllowReassociation &= Flags.AllowReassociation;
470     NoFPExcept &= Flags.NoFPExcept;
471     Unpredictable &= Flags.Unpredictable;
472   }
473 };
474 
475 /// Represents one node in the SelectionDAG.
476 ///
477 class SDNode : public FoldingSetNode, public ilist_node<SDNode> {
478 private:
479   /// The operation that this node performs.
480   int32_t NodeType;
481 
482 public:
483   /// Unique and persistent id per SDNode in the DAG. Used for debug printing.
484   /// We do not place that under `#if LLVM_ENABLE_ABI_BREAKING_CHECKS`
485   /// intentionally because it adds unneeded complexity without noticeable
486   /// benefits (see discussion with @thakis in D120714).
487   uint16_t PersistentId = 0xffff;
488 
489 protected:
490   // We define a set of mini-helper classes to help us interpret the bits in our
491   // SubclassData.  These are designed to fit within a uint16_t so they pack
492   // with PersistentId.
493 
494 #if defined(_AIX) && (!defined(__GNUC__) || defined(__clang__))
495 // Except for GCC; by default, AIX compilers store bit-fields in 4-byte words
496 // and give the `pack` pragma push semantics.
497 #define BEGIN_TWO_BYTE_PACK() _Pragma("pack(2)")
498 #define END_TWO_BYTE_PACK() _Pragma("pack(pop)")
499 #else
500 #define BEGIN_TWO_BYTE_PACK()
501 #define END_TWO_BYTE_PACK()
502 #endif
503 
504 BEGIN_TWO_BYTE_PACK()
505   class SDNodeBitfields {
506     friend class SDNode;
507     friend class MemIntrinsicSDNode;
508     friend class MemSDNode;
509     friend class SelectionDAG;
510 
511     uint16_t HasDebugValue : 1;
512     uint16_t IsMemIntrinsic : 1;
513     uint16_t IsDivergent : 1;
514   };
515   enum { NumSDNodeBits = 3 };
516 
517   class ConstantSDNodeBitfields {
518     friend class ConstantSDNode;
519 
520     uint16_t : NumSDNodeBits;
521 
522     uint16_t IsOpaque : 1;
523   };
524 
525   class MemSDNodeBitfields {
526     friend class MemSDNode;
527     friend class MemIntrinsicSDNode;
528     friend class AtomicSDNode;
529 
530     uint16_t : NumSDNodeBits;
531 
532     uint16_t IsVolatile : 1;
533     uint16_t IsNonTemporal : 1;
534     uint16_t IsDereferenceable : 1;
535     uint16_t IsInvariant : 1;
536   };
537   enum { NumMemSDNodeBits = NumSDNodeBits + 4 };
538 
539   class LSBaseSDNodeBitfields {
540     friend class LSBaseSDNode;
541     friend class VPBaseLoadStoreSDNode;
542     friend class MaskedLoadStoreSDNode;
543     friend class MaskedGatherScatterSDNode;
544     friend class VPGatherScatterSDNode;
545 
546     uint16_t : NumMemSDNodeBits;
547 
548     // This storage is shared between disparate class hierarchies to hold an
549     // enumeration specific to the class hierarchy in use.
550     //   LSBaseSDNode => enum ISD::MemIndexedMode
551     //   VPLoadStoreBaseSDNode => enum ISD::MemIndexedMode
552     //   MaskedLoadStoreBaseSDNode => enum ISD::MemIndexedMode
553     //   VPGatherScatterSDNode => enum ISD::MemIndexType
554     //   MaskedGatherScatterSDNode => enum ISD::MemIndexType
555     uint16_t AddressingMode : 3;
556   };
557   enum { NumLSBaseSDNodeBits = NumMemSDNodeBits + 3 };
558 
559   class LoadSDNodeBitfields {
560     friend class LoadSDNode;
561     friend class VPLoadSDNode;
562     friend class VPStridedLoadSDNode;
563     friend class MaskedLoadSDNode;
564     friend class MaskedGatherSDNode;
565     friend class VPGatherSDNode;
566 
567     uint16_t : NumLSBaseSDNodeBits;
568 
569     uint16_t ExtTy : 2; // enum ISD::LoadExtType
570     uint16_t IsExpanding : 1;
571   };
572 
573   class StoreSDNodeBitfields {
574     friend class StoreSDNode;
575     friend class VPStoreSDNode;
576     friend class VPStridedStoreSDNode;
577     friend class MaskedStoreSDNode;
578     friend class MaskedScatterSDNode;
579     friend class VPScatterSDNode;
580 
581     uint16_t : NumLSBaseSDNodeBits;
582 
583     uint16_t IsTruncating : 1;
584     uint16_t IsCompressing : 1;
585   };
586 
587   union {
588     char RawSDNodeBits[sizeof(uint16_t)];
589     SDNodeBitfields SDNodeBits;
590     ConstantSDNodeBitfields ConstantSDNodeBits;
591     MemSDNodeBitfields MemSDNodeBits;
592     LSBaseSDNodeBitfields LSBaseSDNodeBits;
593     LoadSDNodeBitfields LoadSDNodeBits;
594     StoreSDNodeBitfields StoreSDNodeBits;
595   };
596 END_TWO_BYTE_PACK()
597 #undef BEGIN_TWO_BYTE_PACK
598 #undef END_TWO_BYTE_PACK
599 
600   // RawSDNodeBits must cover the entirety of the union.  This means that all of
601   // the union's members must have size <= RawSDNodeBits.  We write the RHS as
602   // "2" instead of sizeof(RawSDNodeBits) because MSVC can't handle the latter.
603   static_assert(sizeof(SDNodeBitfields) <= 2, "field too wide");
604   static_assert(sizeof(ConstantSDNodeBitfields) <= 2, "field too wide");
605   static_assert(sizeof(MemSDNodeBitfields) <= 2, "field too wide");
606   static_assert(sizeof(LSBaseSDNodeBitfields) <= 2, "field too wide");
607   static_assert(sizeof(LoadSDNodeBitfields) <= 2, "field too wide");
608   static_assert(sizeof(StoreSDNodeBitfields) <= 2, "field too wide");
609 
610 private:
611   friend class SelectionDAG;
612   // TODO: unfriend HandleSDNode once we fix its operand handling.
613   friend class HandleSDNode;
614 
615   /// Unique id per SDNode in the DAG.
616   int NodeId = -1;
617 
618   /// The values that are used by this operation.
619   SDUse *OperandList = nullptr;
620 
621   /// The types of the values this node defines.  SDNode's may
622   /// define multiple values simultaneously.
623   const EVT *ValueList;
624 
625   /// List of uses for this SDNode.
626   SDUse *UseList = nullptr;
627 
628   /// The number of entries in the Operand/Value list.
629   unsigned short NumOperands = 0;
630   unsigned short NumValues;
631 
632   // The ordering of the SDNodes. It roughly corresponds to the ordering of the
633   // original LLVM instructions.
634   // This is used for turning off scheduling, because we'll forgo
635   // the normal scheduling algorithms and output the instructions according to
636   // this ordering.
637   unsigned IROrder;
638 
639   /// Source line information.
640   DebugLoc debugLoc;
641 
642   /// Return a pointer to the specified value type.
643   static const EVT *getValueTypeList(EVT VT);
644 
645   SDNodeFlags Flags;
646 
647   uint32_t CFIType = 0;
648 
649 public:
650   //===--------------------------------------------------------------------===//
651   //  Accessors
652   //
653 
654   /// Return the SelectionDAG opcode value for this node. For
655   /// pre-isel nodes (those for which isMachineOpcode returns false), these
656   /// are the opcode values in the ISD and <target>ISD namespaces. For
657   /// post-isel opcodes, see getMachineOpcode.
658   unsigned getOpcode()  const { return (unsigned)NodeType; }
659 
660   /// Test if this node has a target-specific opcode (in the
661   /// \<target\>ISD namespace).
662   bool isTargetOpcode() const { return NodeType >= ISD::BUILTIN_OP_END; }
663 
664   /// Test if this node has a target-specific opcode that may raise
665   /// FP exceptions (in the \<target\>ISD namespace and greater than
666   /// FIRST_TARGET_STRICTFP_OPCODE).  Note that all target memory
667   /// opcode are currently automatically considered to possibly raise
668   /// FP exceptions as well.
669   bool isTargetStrictFPOpcode() const {
670     return NodeType >= ISD::FIRST_TARGET_STRICTFP_OPCODE;
671   }
672 
673   /// Test if this node has a target-specific
674   /// memory-referencing opcode (in the \<target\>ISD namespace and
675   /// greater than FIRST_TARGET_MEMORY_OPCODE).
676   bool isTargetMemoryOpcode() const {
677     return NodeType >= ISD::FIRST_TARGET_MEMORY_OPCODE;
678   }
679 
680   /// Return true if the type of the node type undefined.
681   bool isUndef() const { return NodeType == ISD::UNDEF; }
682 
683   /// Test if this node is a memory intrinsic (with valid pointer information).
684   /// INTRINSIC_W_CHAIN and INTRINSIC_VOID nodes are sometimes created for
685   /// non-memory intrinsics (with chains) that are not really instances of
686   /// MemSDNode. For such nodes, we need some extra state to determine the
687   /// proper classof relationship.
688   bool isMemIntrinsic() const {
689     return (NodeType == ISD::INTRINSIC_W_CHAIN ||
690             NodeType == ISD::INTRINSIC_VOID) &&
691            SDNodeBits.IsMemIntrinsic;
692   }
693 
694   /// Test if this node is a strict floating point pseudo-op.
695   bool isStrictFPOpcode() {
696     switch (NodeType) {
697       default:
698         return false;
699       case ISD::STRICT_FP16_TO_FP:
700       case ISD::STRICT_FP_TO_FP16:
701 #define DAG_INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC, DAGN)               \
702       case ISD::STRICT_##DAGN:
703 #include "llvm/IR/ConstrainedOps.def"
704         return true;
705     }
706   }
707 
708   /// Test if this node is a vector predication operation.
709   bool isVPOpcode() const { return ISD::isVPOpcode(getOpcode()); }
710 
711   /// Test if this node has a post-isel opcode, directly
712   /// corresponding to a MachineInstr opcode.
713   bool isMachineOpcode() const { return NodeType < 0; }
714 
715   /// This may only be called if isMachineOpcode returns
716   /// true. It returns the MachineInstr opcode value that the node's opcode
717   /// corresponds to.
718   unsigned getMachineOpcode() const {
719     assert(isMachineOpcode() && "Not a MachineInstr opcode!");
720     return ~NodeType;
721   }
722 
723   bool getHasDebugValue() const { return SDNodeBits.HasDebugValue; }
724   void setHasDebugValue(bool b) { SDNodeBits.HasDebugValue = b; }
725 
726   bool isDivergent() const { return SDNodeBits.IsDivergent; }
727 
728   /// Return true if there are no uses of this node.
729   bool use_empty() const { return UseList == nullptr; }
730 
731   /// Return true if there is exactly one use of this node.
732   bool hasOneUse() const { return hasSingleElement(uses()); }
733 
734   /// Return the number of uses of this node. This method takes
735   /// time proportional to the number of uses.
736   size_t use_size() const { return std::distance(use_begin(), use_end()); }
737 
738   /// Return the unique node id.
739   int getNodeId() const { return NodeId; }
740 
741   /// Set unique node id.
742   void setNodeId(int Id) { NodeId = Id; }
743 
744   /// Return the node ordering.
745   unsigned getIROrder() const { return IROrder; }
746 
747   /// Set the node ordering.
748   void setIROrder(unsigned Order) { IROrder = Order; }
749 
750   /// Return the source location info.
751   const DebugLoc &getDebugLoc() const { return debugLoc; }
752 
753   /// Set source location info.  Try to avoid this, putting
754   /// it in the constructor is preferable.
755   void setDebugLoc(DebugLoc dl) { debugLoc = std::move(dl); }
756 
757   /// This class provides iterator support for SDUse
758   /// operands that use a specific SDNode.
759   class use_iterator {
760     friend class SDNode;
761 
762     SDUse *Op = nullptr;
763 
764     explicit use_iterator(SDUse *op) : Op(op) {}
765 
766   public:
767     using iterator_category = std::forward_iterator_tag;
768     using value_type = SDUse;
769     using difference_type = std::ptrdiff_t;
770     using pointer = value_type *;
771     using reference = value_type &;
772 
773     use_iterator() = default;
774     use_iterator(const use_iterator &I) = default;
775     use_iterator &operator=(const use_iterator &) = default;
776 
777     bool operator==(const use_iterator &x) const { return Op == x.Op; }
778     bool operator!=(const use_iterator &x) const {
779       return !operator==(x);
780     }
781 
782     /// Return true if this iterator is at the end of uses list.
783     bool atEnd() const { return Op == nullptr; }
784 
785     // Iterator traversal: forward iteration only.
786     use_iterator &operator++() {          // Preincrement
787       assert(Op && "Cannot increment end iterator!");
788       Op = Op->getNext();
789       return *this;
790     }
791 
792     use_iterator operator++(int) {        // Postincrement
793       use_iterator tmp = *this; ++*this; return tmp;
794     }
795 
796     /// Retrieve a pointer to the current user node.
797     SDNode *operator*() const {
798       assert(Op && "Cannot dereference end iterator!");
799       return Op->getUser();
800     }
801 
802     SDNode *operator->() const { return operator*(); }
803 
804     SDUse &getUse() const { return *Op; }
805 
806     /// Retrieve the operand # of this use in its user.
807     unsigned getOperandNo() const {
808       assert(Op && "Cannot dereference end iterator!");
809       return (unsigned)(Op - Op->getUser()->OperandList);
810     }
811   };
812 
813   /// Provide iteration support to walk over all uses of an SDNode.
814   use_iterator use_begin() const {
815     return use_iterator(UseList);
816   }
817 
818   static use_iterator use_end() { return use_iterator(nullptr); }
819 
820   inline iterator_range<use_iterator> uses() {
821     return make_range(use_begin(), use_end());
822   }
823   inline iterator_range<use_iterator> uses() const {
824     return make_range(use_begin(), use_end());
825   }
826 
827   /// Return true if there are exactly NUSES uses of the indicated value.
828   /// This method ignores uses of other values defined by this operation.
829   bool hasNUsesOfValue(unsigned NUses, unsigned Value) const;
830 
831   /// Return true if there are any use of the indicated value.
832   /// This method ignores uses of other values defined by this operation.
833   bool hasAnyUseOfValue(unsigned Value) const;
834 
835   /// Return true if this node is the only use of N.
836   bool isOnlyUserOf(const SDNode *N) const;
837 
838   /// Return true if this node is an operand of N.
839   bool isOperandOf(const SDNode *N) const;
840 
841   /// Return true if this node is a predecessor of N.
842   /// NOTE: Implemented on top of hasPredecessor and every bit as
843   /// expensive. Use carefully.
844   bool isPredecessorOf(const SDNode *N) const {
845     return N->hasPredecessor(this);
846   }
847 
848   /// Return true if N is a predecessor of this node.
849   /// N is either an operand of this node, or can be reached by recursively
850   /// traversing up the operands.
851   /// NOTE: This is an expensive method. Use it carefully.
852   bool hasPredecessor(const SDNode *N) const;
853 
854   /// Returns true if N is a predecessor of any node in Worklist. This
855   /// helper keeps Visited and Worklist sets externally to allow unions
856   /// searches to be performed in parallel, caching of results across
857   /// queries and incremental addition to Worklist. Stops early if N is
858   /// found but will resume. Remember to clear Visited and Worklists
859   /// if DAG changes. MaxSteps gives a maximum number of nodes to visit before
860   /// giving up. The TopologicalPrune flag signals that positive NodeIds are
861   /// topologically ordered (Operands have strictly smaller node id) and search
862   /// can be pruned leveraging this.
863   static bool hasPredecessorHelper(const SDNode *N,
864                                    SmallPtrSetImpl<const SDNode *> &Visited,
865                                    SmallVectorImpl<const SDNode *> &Worklist,
866                                    unsigned int MaxSteps = 0,
867                                    bool TopologicalPrune = false) {
868     SmallVector<const SDNode *, 8> DeferredNodes;
869     if (Visited.count(N))
870       return true;
871 
872     // Node Id's are assigned in three places: As a topological
873     // ordering (> 0), during legalization (results in values set to
874     // 0), new nodes (set to -1). If N has a topolgical id then we
875     // know that all nodes with ids smaller than it cannot be
876     // successors and we need not check them. Filter out all node
877     // that can't be matches. We add them to the worklist before exit
878     // in case of multiple calls. Note that during selection the topological id
879     // may be violated if a node's predecessor is selected before it. We mark
880     // this at selection negating the id of unselected successors and
881     // restricting topological pruning to positive ids.
882 
883     int NId = N->getNodeId();
884     // If we Invalidated the Id, reconstruct original NId.
885     if (NId < -1)
886       NId = -(NId + 1);
887 
888     bool Found = false;
889     while (!Worklist.empty()) {
890       const SDNode *M = Worklist.pop_back_val();
891       int MId = M->getNodeId();
892       if (TopologicalPrune && M->getOpcode() != ISD::TokenFactor && (NId > 0) &&
893           (MId > 0) && (MId < NId)) {
894         DeferredNodes.push_back(M);
895         continue;
896       }
897       for (const SDValue &OpV : M->op_values()) {
898         SDNode *Op = OpV.getNode();
899         if (Visited.insert(Op).second)
900           Worklist.push_back(Op);
901         if (Op == N)
902           Found = true;
903       }
904       if (Found)
905         break;
906       if (MaxSteps != 0 && Visited.size() >= MaxSteps)
907         break;
908     }
909     // Push deferred nodes back on worklist.
910     Worklist.append(DeferredNodes.begin(), DeferredNodes.end());
911     // If we bailed early, conservatively return found.
912     if (MaxSteps != 0 && Visited.size() >= MaxSteps)
913       return true;
914     return Found;
915   }
916 
917   /// Return true if all the users of N are contained in Nodes.
918   /// NOTE: Requires at least one match, but doesn't require them all.
919   static bool areOnlyUsersOf(ArrayRef<const SDNode *> Nodes, const SDNode *N);
920 
921   /// Return the number of values used by this operation.
922   unsigned getNumOperands() const { return NumOperands; }
923 
924   /// Return the maximum number of operands that a SDNode can hold.
925   static constexpr size_t getMaxNumOperands() {
926     return std::numeric_limits<decltype(SDNode::NumOperands)>::max();
927   }
928 
929   /// Helper method returns the integer value of a ConstantSDNode operand.
930   inline uint64_t getConstantOperandVal(unsigned Num) const;
931 
932   /// Helper method returns the zero-extended integer value of a ConstantSDNode.
933   inline uint64_t getAsZExtVal() const;
934 
935   /// Helper method returns the APInt of a ConstantSDNode operand.
936   inline const APInt &getConstantOperandAPInt(unsigned Num) const;
937 
938   const SDValue &getOperand(unsigned Num) const {
939     assert(Num < NumOperands && "Invalid child # of SDNode!");
940     return OperandList[Num];
941   }
942 
943   using op_iterator = SDUse *;
944 
945   op_iterator op_begin() const { return OperandList; }
946   op_iterator op_end() const { return OperandList+NumOperands; }
947   ArrayRef<SDUse> ops() const { return ArrayRef(op_begin(), op_end()); }
948 
949   /// Iterator for directly iterating over the operand SDValue's.
950   struct value_op_iterator
951       : iterator_adaptor_base<value_op_iterator, op_iterator,
952                               std::random_access_iterator_tag, SDValue,
953                               ptrdiff_t, value_op_iterator *,
954                               value_op_iterator *> {
955     explicit value_op_iterator(SDUse *U = nullptr)
956       : iterator_adaptor_base(U) {}
957 
958     const SDValue &operator*() const { return I->get(); }
959   };
960 
961   iterator_range<value_op_iterator> op_values() const {
962     return make_range(value_op_iterator(op_begin()),
963                       value_op_iterator(op_end()));
964   }
965 
966   SDVTList getVTList() const {
967     SDVTList X = { ValueList, NumValues };
968     return X;
969   }
970 
971   /// If this node has a glue operand, return the node
972   /// to which the glue operand points. Otherwise return NULL.
973   SDNode *getGluedNode() const {
974     if (getNumOperands() != 0 &&
975         getOperand(getNumOperands()-1).getValueType() == MVT::Glue)
976       return getOperand(getNumOperands()-1).getNode();
977     return nullptr;
978   }
979 
980   /// If this node has a glue value with a user, return
981   /// the user (there is at most one). Otherwise return NULL.
982   SDNode *getGluedUser() const {
983     for (use_iterator UI = use_begin(), UE = use_end(); UI != UE; ++UI)
984       if (UI.getUse().get().getValueType() == MVT::Glue)
985         return *UI;
986     return nullptr;
987   }
988 
989   SDNodeFlags getFlags() const { return Flags; }
990   void setFlags(SDNodeFlags NewFlags) { Flags = NewFlags; }
991 
992   /// Clear any flags in this node that aren't also set in Flags.
993   /// If Flags is not in a defined state then this has no effect.
994   void intersectFlagsWith(const SDNodeFlags Flags);
995 
996   void setCFIType(uint32_t Type) { CFIType = Type; }
997   uint32_t getCFIType() const { return CFIType; }
998 
999   /// Return the number of values defined/returned by this operator.
1000   unsigned getNumValues() const { return NumValues; }
1001 
1002   /// Return the type of a specified result.
1003   EVT getValueType(unsigned ResNo) const {
1004     assert(ResNo < NumValues && "Illegal result number!");
1005     return ValueList[ResNo];
1006   }
1007 
1008   /// Return the type of a specified result as a simple type.
1009   MVT getSimpleValueType(unsigned ResNo) const {
1010     return getValueType(ResNo).getSimpleVT();
1011   }
1012 
1013   /// Returns MVT::getSizeInBits(getValueType(ResNo)).
1014   ///
1015   /// If the value type is a scalable vector type, the scalable property will
1016   /// be set and the runtime size will be a positive integer multiple of the
1017   /// base size.
1018   TypeSize getValueSizeInBits(unsigned ResNo) const {
1019     return getValueType(ResNo).getSizeInBits();
1020   }
1021 
1022   using value_iterator = const EVT *;
1023 
1024   value_iterator value_begin() const { return ValueList; }
1025   value_iterator value_end() const { return ValueList+NumValues; }
1026   iterator_range<value_iterator> values() const {
1027     return llvm::make_range(value_begin(), value_end());
1028   }
1029 
1030   /// Return the opcode of this operation for printing.
1031   std::string getOperationName(const SelectionDAG *G = nullptr) const;
1032   static const char* getIndexedModeName(ISD::MemIndexedMode AM);
1033   void print_types(raw_ostream &OS, const SelectionDAG *G) const;
1034   void print_details(raw_ostream &OS, const SelectionDAG *G) const;
1035   void print(raw_ostream &OS, const SelectionDAG *G = nullptr) const;
1036   void printr(raw_ostream &OS, const SelectionDAG *G = nullptr) const;
1037 
1038   /// Print a SelectionDAG node and all children down to
1039   /// the leaves.  The given SelectionDAG allows target-specific nodes
1040   /// to be printed in human-readable form.  Unlike printr, this will
1041   /// print the whole DAG, including children that appear multiple
1042   /// times.
1043   ///
1044   void printrFull(raw_ostream &O, const SelectionDAG *G = nullptr) const;
1045 
1046   /// Print a SelectionDAG node and children up to
1047   /// depth "depth."  The given SelectionDAG allows target-specific
1048   /// nodes to be printed in human-readable form.  Unlike printr, this
1049   /// will print children that appear multiple times wherever they are
1050   /// used.
1051   ///
1052   void printrWithDepth(raw_ostream &O, const SelectionDAG *G = nullptr,
1053                        unsigned depth = 100) const;
1054 
1055   /// Dump this node, for debugging.
1056   void dump() const;
1057 
1058   /// Dump (recursively) this node and its use-def subgraph.
1059   void dumpr() const;
1060 
1061   /// Dump this node, for debugging.
1062   /// The given SelectionDAG allows target-specific nodes to be printed
1063   /// in human-readable form.
1064   void dump(const SelectionDAG *G) const;
1065 
1066   /// Dump (recursively) this node and its use-def subgraph.
1067   /// The given SelectionDAG allows target-specific nodes to be printed
1068   /// in human-readable form.
1069   void dumpr(const SelectionDAG *G) const;
1070 
1071   /// printrFull to dbgs().  The given SelectionDAG allows
1072   /// target-specific nodes to be printed in human-readable form.
1073   /// Unlike dumpr, this will print the whole DAG, including children
1074   /// that appear multiple times.
1075   void dumprFull(const SelectionDAG *G = nullptr) const;
1076 
1077   /// printrWithDepth to dbgs().  The given
1078   /// SelectionDAG allows target-specific nodes to be printed in
1079   /// human-readable form.  Unlike dumpr, this will print children
1080   /// that appear multiple times wherever they are used.
1081   ///
1082   void dumprWithDepth(const SelectionDAG *G = nullptr,
1083                       unsigned depth = 100) const;
1084 
1085   /// Gather unique data for the node.
1086   void Profile(FoldingSetNodeID &ID) const;
1087 
1088   /// This method should only be used by the SDUse class.
1089   void addUse(SDUse &U) { U.addToList(&UseList); }
1090 
1091 protected:
1092   static SDVTList getSDVTList(EVT VT) {
1093     SDVTList Ret = { getValueTypeList(VT), 1 };
1094     return Ret;
1095   }
1096 
1097   /// Create an SDNode.
1098   ///
1099   /// SDNodes are created without any operands, and never own the operand
1100   /// storage. To add operands, see SelectionDAG::createOperands.
1101   SDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs)
1102       : NodeType(Opc), ValueList(VTs.VTs), NumValues(VTs.NumVTs),
1103         IROrder(Order), debugLoc(std::move(dl)) {
1104     memset(&RawSDNodeBits, 0, sizeof(RawSDNodeBits));
1105     assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor");
1106     assert(NumValues == VTs.NumVTs &&
1107            "NumValues wasn't wide enough for its operands!");
1108   }
1109 
1110   /// Release the operands and set this node to have zero operands.
1111   void DropOperands();
1112 };
1113 
1114 /// Wrapper class for IR location info (IR ordering and DebugLoc) to be passed
1115 /// into SDNode creation functions.
1116 /// When an SDNode is created from the DAGBuilder, the DebugLoc is extracted
1117 /// from the original Instruction, and IROrder is the ordinal position of
1118 /// the instruction.
1119 /// When an SDNode is created after the DAG is being built, both DebugLoc and
1120 /// the IROrder are propagated from the original SDNode.
1121 /// So SDLoc class provides two constructors besides the default one, one to
1122 /// be used by the DAGBuilder, the other to be used by others.
1123 class SDLoc {
1124 private:
1125   DebugLoc DL;
1126   int IROrder = 0;
1127 
1128 public:
1129   SDLoc() = default;
1130   SDLoc(const SDNode *N) : DL(N->getDebugLoc()), IROrder(N->getIROrder()) {}
1131   SDLoc(const SDValue V) : SDLoc(V.getNode()) {}
1132   SDLoc(const Instruction *I, int Order) : IROrder(Order) {
1133     assert(Order >= 0 && "bad IROrder");
1134     if (I)
1135       DL = I->getDebugLoc();
1136   }
1137 
1138   unsigned getIROrder() const { return IROrder; }
1139   const DebugLoc &getDebugLoc() const { return DL; }
1140 };
1141 
1142 // Define inline functions from the SDValue class.
1143 
1144 inline SDValue::SDValue(SDNode *node, unsigned resno)
1145     : Node(node), ResNo(resno) {
1146   // Explicitly check for !ResNo to avoid use-after-free, because there are
1147   // callers that use SDValue(N, 0) with a deleted N to indicate successful
1148   // combines.
1149   assert((!Node || !ResNo || ResNo < Node->getNumValues()) &&
1150          "Invalid result number for the given node!");
1151   assert(ResNo < -2U && "Cannot use result numbers reserved for DenseMaps.");
1152 }
1153 
1154 inline unsigned SDValue::getOpcode() const {
1155   return Node->getOpcode();
1156 }
1157 
1158 inline EVT SDValue::getValueType() const {
1159   return Node->getValueType(ResNo);
1160 }
1161 
1162 inline unsigned SDValue::getNumOperands() const {
1163   return Node->getNumOperands();
1164 }
1165 
1166 inline const SDValue &SDValue::getOperand(unsigned i) const {
1167   return Node->getOperand(i);
1168 }
1169 
1170 inline uint64_t SDValue::getConstantOperandVal(unsigned i) const {
1171   return Node->getConstantOperandVal(i);
1172 }
1173 
1174 inline const APInt &SDValue::getConstantOperandAPInt(unsigned i) const {
1175   return Node->getConstantOperandAPInt(i);
1176 }
1177 
1178 inline bool SDValue::isTargetOpcode() const {
1179   return Node->isTargetOpcode();
1180 }
1181 
1182 inline bool SDValue::isTargetMemoryOpcode() const {
1183   return Node->isTargetMemoryOpcode();
1184 }
1185 
1186 inline bool SDValue::isMachineOpcode() const {
1187   return Node->isMachineOpcode();
1188 }
1189 
1190 inline unsigned SDValue::getMachineOpcode() const {
1191   return Node->getMachineOpcode();
1192 }
1193 
1194 inline bool SDValue::isUndef() const {
1195   return Node->isUndef();
1196 }
1197 
1198 inline bool SDValue::use_empty() const {
1199   return !Node->hasAnyUseOfValue(ResNo);
1200 }
1201 
1202 inline bool SDValue::hasOneUse() const {
1203   return Node->hasNUsesOfValue(1, ResNo);
1204 }
1205 
1206 inline const DebugLoc &SDValue::getDebugLoc() const {
1207   return Node->getDebugLoc();
1208 }
1209 
1210 inline void SDValue::dump() const {
1211   return Node->dump();
1212 }
1213 
1214 inline void SDValue::dump(const SelectionDAG *G) const {
1215   return Node->dump(G);
1216 }
1217 
1218 inline void SDValue::dumpr() const {
1219   return Node->dumpr();
1220 }
1221 
1222 inline void SDValue::dumpr(const SelectionDAG *G) const {
1223   return Node->dumpr(G);
1224 }
1225 
1226 // Define inline functions from the SDUse class.
1227 
1228 inline void SDUse::set(const SDValue &V) {
1229   if (Val.getNode()) removeFromList();
1230   Val = V;
1231   if (V.getNode())
1232     V->addUse(*this);
1233 }
1234 
1235 inline void SDUse::setInitial(const SDValue &V) {
1236   Val = V;
1237   V->addUse(*this);
1238 }
1239 
1240 inline void SDUse::setNode(SDNode *N) {
1241   if (Val.getNode()) removeFromList();
1242   Val.setNode(N);
1243   if (N) N->addUse(*this);
1244 }
1245 
1246 /// This class is used to form a handle around another node that
1247 /// is persistent and is updated across invocations of replaceAllUsesWith on its
1248 /// operand.  This node should be directly created by end-users and not added to
1249 /// the AllNodes list.
1250 class HandleSDNode : public SDNode {
1251   SDUse Op;
1252 
1253 public:
1254   explicit HandleSDNode(SDValue X)
1255     : SDNode(ISD::HANDLENODE, 0, DebugLoc(), getSDVTList(MVT::Other)) {
1256     // HandleSDNodes are never inserted into the DAG, so they won't be
1257     // auto-numbered. Use ID 65535 as a sentinel.
1258     PersistentId = 0xffff;
1259 
1260     // Manually set up the operand list. This node type is special in that it's
1261     // always stack allocated and SelectionDAG does not manage its operands.
1262     // TODO: This should either (a) not be in the SDNode hierarchy, or (b) not
1263     // be so special.
1264     Op.setUser(this);
1265     Op.setInitial(X);
1266     NumOperands = 1;
1267     OperandList = &Op;
1268   }
1269   ~HandleSDNode();
1270 
1271   const SDValue &getValue() const { return Op; }
1272 };
1273 
1274 class AddrSpaceCastSDNode : public SDNode {
1275 private:
1276   unsigned SrcAddrSpace;
1277   unsigned DestAddrSpace;
1278 
1279 public:
1280   AddrSpaceCastSDNode(unsigned Order, const DebugLoc &dl, EVT VT,
1281                       unsigned SrcAS, unsigned DestAS);
1282 
1283   unsigned getSrcAddressSpace() const { return SrcAddrSpace; }
1284   unsigned getDestAddressSpace() const { return DestAddrSpace; }
1285 
1286   static bool classof(const SDNode *N) {
1287     return N->getOpcode() == ISD::ADDRSPACECAST;
1288   }
1289 };
1290 
1291 /// This is an abstract virtual class for memory operations.
1292 class MemSDNode : public SDNode {
1293 private:
1294   // VT of in-memory value.
1295   EVT MemoryVT;
1296 
1297 protected:
1298   /// Memory reference information.
1299   MachineMemOperand *MMO;
1300 
1301 public:
1302   MemSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTs,
1303             EVT memvt, MachineMemOperand *MMO);
1304 
1305   bool readMem() const { return MMO->isLoad(); }
1306   bool writeMem() const { return MMO->isStore(); }
1307 
1308   /// Returns alignment and volatility of the memory access
1309   Align getOriginalAlign() const { return MMO->getBaseAlign(); }
1310   Align getAlign() const { return MMO->getAlign(); }
1311 
1312   /// Return the SubclassData value, without HasDebugValue. This contains an
1313   /// encoding of the volatile flag, as well as bits used by subclasses. This
1314   /// function should only be used to compute a FoldingSetNodeID value.
1315   /// The HasDebugValue bit is masked out because CSE map needs to match
1316   /// nodes with debug info with nodes without debug info. Same is about
1317   /// isDivergent bit.
1318   unsigned getRawSubclassData() const {
1319     uint16_t Data;
1320     union {
1321       char RawSDNodeBits[sizeof(uint16_t)];
1322       SDNodeBitfields SDNodeBits;
1323     };
1324     memcpy(&RawSDNodeBits, &this->RawSDNodeBits, sizeof(this->RawSDNodeBits));
1325     SDNodeBits.HasDebugValue = 0;
1326     SDNodeBits.IsDivergent = false;
1327     memcpy(&Data, &RawSDNodeBits, sizeof(RawSDNodeBits));
1328     return Data;
1329   }
1330 
1331   bool isVolatile() const { return MemSDNodeBits.IsVolatile; }
1332   bool isNonTemporal() const { return MemSDNodeBits.IsNonTemporal; }
1333   bool isDereferenceable() const { return MemSDNodeBits.IsDereferenceable; }
1334   bool isInvariant() const { return MemSDNodeBits.IsInvariant; }
1335 
1336   // Returns the offset from the location of the access.
1337   int64_t getSrcValueOffset() const { return MMO->getOffset(); }
1338 
1339   /// Returns the AA info that describes the dereference.
1340   AAMDNodes getAAInfo() const { return MMO->getAAInfo(); }
1341 
1342   /// Returns the Ranges that describes the dereference.
1343   const MDNode *getRanges() const { return MMO->getRanges(); }
1344 
1345   /// Returns the synchronization scope ID for this memory operation.
1346   SyncScope::ID getSyncScopeID() const { return MMO->getSyncScopeID(); }
1347 
1348   /// Return the atomic ordering requirements for this memory operation. For
1349   /// cmpxchg atomic operations, return the atomic ordering requirements when
1350   /// store occurs.
1351   AtomicOrdering getSuccessOrdering() const {
1352     return MMO->getSuccessOrdering();
1353   }
1354 
1355   /// Return a single atomic ordering that is at least as strong as both the
1356   /// success and failure orderings for an atomic operation.  (For operations
1357   /// other than cmpxchg, this is equivalent to getSuccessOrdering().)
1358   AtomicOrdering getMergedOrdering() const { return MMO->getMergedOrdering(); }
1359 
1360   /// Return true if the memory operation ordering is Unordered or higher.
1361   bool isAtomic() const { return MMO->isAtomic(); }
1362 
1363   /// Returns true if the memory operation doesn't imply any ordering
1364   /// constraints on surrounding memory operations beyond the normal memory
1365   /// aliasing rules.
1366   bool isUnordered() const { return MMO->isUnordered(); }
1367 
1368   /// Returns true if the memory operation is neither atomic or volatile.
1369   bool isSimple() const { return !isAtomic() && !isVolatile(); }
1370 
1371   /// Return the type of the in-memory value.
1372   EVT getMemoryVT() const { return MemoryVT; }
1373 
1374   /// Return a MachineMemOperand object describing the memory
1375   /// reference performed by operation.
1376   MachineMemOperand *getMemOperand() const { return MMO; }
1377 
1378   const MachinePointerInfo &getPointerInfo() const {
1379     return MMO->getPointerInfo();
1380   }
1381 
1382   /// Return the address space for the associated pointer
1383   unsigned getAddressSpace() const {
1384     return getPointerInfo().getAddrSpace();
1385   }
1386 
1387   /// Update this MemSDNode's MachineMemOperand information
1388   /// to reflect the alignment of NewMMO, if it has a greater alignment.
1389   /// This must only be used when the new alignment applies to all users of
1390   /// this MachineMemOperand.
1391   void refineAlignment(const MachineMemOperand *NewMMO) {
1392     MMO->refineAlignment(NewMMO);
1393   }
1394 
1395   const SDValue &getChain() const { return getOperand(0); }
1396 
1397   const SDValue &getBasePtr() const {
1398     switch (getOpcode()) {
1399     case ISD::STORE:
1400     case ISD::ATOMIC_STORE:
1401     case ISD::VP_STORE:
1402     case ISD::MSTORE:
1403     case ISD::VP_SCATTER:
1404     case ISD::EXPERIMENTAL_VP_STRIDED_STORE:
1405       return getOperand(2);
1406     case ISD::MGATHER:
1407     case ISD::MSCATTER:
1408       return getOperand(3);
1409     default:
1410       return getOperand(1);
1411     }
1412   }
1413 
1414   // Methods to support isa and dyn_cast
1415   static bool classof(const SDNode *N) {
1416     // For some targets, we lower some target intrinsics to a MemIntrinsicNode
1417     // with either an intrinsic or a target opcode.
1418     switch (N->getOpcode()) {
1419     case ISD::LOAD:
1420     case ISD::STORE:
1421     case ISD::PREFETCH:
1422     case ISD::ATOMIC_CMP_SWAP:
1423     case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
1424     case ISD::ATOMIC_SWAP:
1425     case ISD::ATOMIC_LOAD_ADD:
1426     case ISD::ATOMIC_LOAD_SUB:
1427     case ISD::ATOMIC_LOAD_AND:
1428     case ISD::ATOMIC_LOAD_CLR:
1429     case ISD::ATOMIC_LOAD_OR:
1430     case ISD::ATOMIC_LOAD_XOR:
1431     case ISD::ATOMIC_LOAD_NAND:
1432     case ISD::ATOMIC_LOAD_MIN:
1433     case ISD::ATOMIC_LOAD_MAX:
1434     case ISD::ATOMIC_LOAD_UMIN:
1435     case ISD::ATOMIC_LOAD_UMAX:
1436     case ISD::ATOMIC_LOAD_FADD:
1437     case ISD::ATOMIC_LOAD_FSUB:
1438     case ISD::ATOMIC_LOAD_FMAX:
1439     case ISD::ATOMIC_LOAD_FMIN:
1440     case ISD::ATOMIC_LOAD_UINC_WRAP:
1441     case ISD::ATOMIC_LOAD_UDEC_WRAP:
1442     case ISD::ATOMIC_LOAD:
1443     case ISD::ATOMIC_STORE:
1444     case ISD::MLOAD:
1445     case ISD::MSTORE:
1446     case ISD::MGATHER:
1447     case ISD::MSCATTER:
1448     case ISD::VP_LOAD:
1449     case ISD::VP_STORE:
1450     case ISD::VP_GATHER:
1451     case ISD::VP_SCATTER:
1452     case ISD::EXPERIMENTAL_VP_STRIDED_LOAD:
1453     case ISD::EXPERIMENTAL_VP_STRIDED_STORE:
1454     case ISD::GET_FPENV_MEM:
1455     case ISD::SET_FPENV_MEM:
1456       return true;
1457     default:
1458       return N->isMemIntrinsic() || N->isTargetMemoryOpcode();
1459     }
1460   }
1461 };
1462 
1463 /// This is an SDNode representing atomic operations.
1464 class AtomicSDNode : public MemSDNode {
1465 public:
1466   AtomicSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTL,
1467                EVT MemVT, MachineMemOperand *MMO)
1468     : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
1469     assert(((Opc != ISD::ATOMIC_LOAD && Opc != ISD::ATOMIC_STORE) ||
1470             MMO->isAtomic()) && "then why are we using an AtomicSDNode?");
1471   }
1472 
1473   const SDValue &getBasePtr() const {
1474     return getOpcode() == ISD::ATOMIC_STORE ? getOperand(2) : getOperand(1);
1475   }
1476   const SDValue &getVal() const {
1477     return getOpcode() == ISD::ATOMIC_STORE ? getOperand(1) : getOperand(2);
1478   }
1479 
1480   /// Returns true if this SDNode represents cmpxchg atomic operation, false
1481   /// otherwise.
1482   bool isCompareAndSwap() const {
1483     unsigned Op = getOpcode();
1484     return Op == ISD::ATOMIC_CMP_SWAP ||
1485            Op == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS;
1486   }
1487 
1488   /// For cmpxchg atomic operations, return the atomic ordering requirements
1489   /// when store does not occur.
1490   AtomicOrdering getFailureOrdering() const {
1491     assert(isCompareAndSwap() && "Must be cmpxchg operation");
1492     return MMO->getFailureOrdering();
1493   }
1494 
1495   // Methods to support isa and dyn_cast
1496   static bool classof(const SDNode *N) {
1497     return N->getOpcode() == ISD::ATOMIC_CMP_SWAP     ||
1498            N->getOpcode() == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS ||
1499            N->getOpcode() == ISD::ATOMIC_SWAP         ||
1500            N->getOpcode() == ISD::ATOMIC_LOAD_ADD     ||
1501            N->getOpcode() == ISD::ATOMIC_LOAD_SUB     ||
1502            N->getOpcode() == ISD::ATOMIC_LOAD_AND     ||
1503            N->getOpcode() == ISD::ATOMIC_LOAD_CLR     ||
1504            N->getOpcode() == ISD::ATOMIC_LOAD_OR      ||
1505            N->getOpcode() == ISD::ATOMIC_LOAD_XOR     ||
1506            N->getOpcode() == ISD::ATOMIC_LOAD_NAND    ||
1507            N->getOpcode() == ISD::ATOMIC_LOAD_MIN     ||
1508            N->getOpcode() == ISD::ATOMIC_LOAD_MAX     ||
1509            N->getOpcode() == ISD::ATOMIC_LOAD_UMIN    ||
1510            N->getOpcode() == ISD::ATOMIC_LOAD_UMAX    ||
1511            N->getOpcode() == ISD::ATOMIC_LOAD_FADD    ||
1512            N->getOpcode() == ISD::ATOMIC_LOAD_FSUB    ||
1513            N->getOpcode() == ISD::ATOMIC_LOAD_FMAX    ||
1514            N->getOpcode() == ISD::ATOMIC_LOAD_FMIN    ||
1515            N->getOpcode() == ISD::ATOMIC_LOAD_UINC_WRAP ||
1516            N->getOpcode() == ISD::ATOMIC_LOAD_UDEC_WRAP ||
1517            N->getOpcode() == ISD::ATOMIC_LOAD         ||
1518            N->getOpcode() == ISD::ATOMIC_STORE;
1519   }
1520 };
1521 
1522 /// This SDNode is used for target intrinsics that touch
1523 /// memory and need an associated MachineMemOperand. Its opcode may be
1524 /// INTRINSIC_VOID, INTRINSIC_W_CHAIN, PREFETCH, or a target-specific opcode
1525 /// with a value not less than FIRST_TARGET_MEMORY_OPCODE.
1526 class MemIntrinsicSDNode : public MemSDNode {
1527 public:
1528   MemIntrinsicSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl,
1529                      SDVTList VTs, EVT MemoryVT, MachineMemOperand *MMO)
1530       : MemSDNode(Opc, Order, dl, VTs, MemoryVT, MMO) {
1531     SDNodeBits.IsMemIntrinsic = true;
1532   }
1533 
1534   // Methods to support isa and dyn_cast
1535   static bool classof(const SDNode *N) {
1536     // We lower some target intrinsics to their target opcode
1537     // early a node with a target opcode can be of this class
1538     return N->isMemIntrinsic()             ||
1539            N->getOpcode() == ISD::PREFETCH ||
1540            N->isTargetMemoryOpcode();
1541   }
1542 };
1543 
1544 /// This SDNode is used to implement the code generator
1545 /// support for the llvm IR shufflevector instruction.  It combines elements
1546 /// from two input vectors into a new input vector, with the selection and
1547 /// ordering of elements determined by an array of integers, referred to as
1548 /// the shuffle mask.  For input vectors of width N, mask indices of 0..N-1
1549 /// refer to elements from the LHS input, and indices from N to 2N-1 the RHS.
1550 /// An index of -1 is treated as undef, such that the code generator may put
1551 /// any value in the corresponding element of the result.
1552 class ShuffleVectorSDNode : public SDNode {
1553   // The memory for Mask is owned by the SelectionDAG's OperandAllocator, and
1554   // is freed when the SelectionDAG object is destroyed.
1555   const int *Mask;
1556 
1557 protected:
1558   friend class SelectionDAG;
1559 
1560   ShuffleVectorSDNode(EVT VT, unsigned Order, const DebugLoc &dl, const int *M)
1561       : SDNode(ISD::VECTOR_SHUFFLE, Order, dl, getSDVTList(VT)), Mask(M) {}
1562 
1563 public:
1564   ArrayRef<int> getMask() const {
1565     EVT VT = getValueType(0);
1566     return ArrayRef(Mask, VT.getVectorNumElements());
1567   }
1568 
1569   int getMaskElt(unsigned Idx) const {
1570     assert(Idx < getValueType(0).getVectorNumElements() && "Idx out of range!");
1571     return Mask[Idx];
1572   }
1573 
1574   bool isSplat() const { return isSplatMask(Mask, getValueType(0)); }
1575 
1576   int getSplatIndex() const {
1577     assert(isSplat() && "Cannot get splat index for non-splat!");
1578     EVT VT = getValueType(0);
1579     for (unsigned i = 0, e = VT.getVectorNumElements(); i != e; ++i)
1580       if (Mask[i] >= 0)
1581         return Mask[i];
1582 
1583     // We can choose any index value here and be correct because all elements
1584     // are undefined. Return 0 for better potential for callers to simplify.
1585     return 0;
1586   }
1587 
1588   static bool isSplatMask(const int *Mask, EVT VT);
1589 
1590   /// Change values in a shuffle permute mask assuming
1591   /// the two vector operands have swapped position.
1592   static void commuteMask(MutableArrayRef<int> Mask) {
1593     unsigned NumElems = Mask.size();
1594     for (unsigned i = 0; i != NumElems; ++i) {
1595       int idx = Mask[i];
1596       if (idx < 0)
1597         continue;
1598       else if (idx < (int)NumElems)
1599         Mask[i] = idx + NumElems;
1600       else
1601         Mask[i] = idx - NumElems;
1602     }
1603   }
1604 
1605   static bool classof(const SDNode *N) {
1606     return N->getOpcode() == ISD::VECTOR_SHUFFLE;
1607   }
1608 };
1609 
1610 class ConstantSDNode : public SDNode {
1611   friend class SelectionDAG;
1612 
1613   const ConstantInt *Value;
1614 
1615   ConstantSDNode(bool isTarget, bool isOpaque, const ConstantInt *val, EVT VT)
1616       : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, 0, DebugLoc(),
1617                getSDVTList(VT)),
1618         Value(val) {
1619     ConstantSDNodeBits.IsOpaque = isOpaque;
1620   }
1621 
1622 public:
1623   const ConstantInt *getConstantIntValue() const { return Value; }
1624   const APInt &getAPIntValue() const { return Value->getValue(); }
1625   uint64_t getZExtValue() const { return Value->getZExtValue(); }
1626   int64_t getSExtValue() const { return Value->getSExtValue(); }
1627   uint64_t getLimitedValue(uint64_t Limit = UINT64_MAX) {
1628     return Value->getLimitedValue(Limit);
1629   }
1630   MaybeAlign getMaybeAlignValue() const { return Value->getMaybeAlignValue(); }
1631   Align getAlignValue() const { return Value->getAlignValue(); }
1632 
1633   bool isOne() const { return Value->isOne(); }
1634   bool isZero() const { return Value->isZero(); }
1635   bool isAllOnes() const { return Value->isMinusOne(); }
1636   bool isMaxSignedValue() const { return Value->isMaxValue(true); }
1637   bool isMinSignedValue() const { return Value->isMinValue(true); }
1638 
1639   bool isOpaque() const { return ConstantSDNodeBits.IsOpaque; }
1640 
1641   static bool classof(const SDNode *N) {
1642     return N->getOpcode() == ISD::Constant ||
1643            N->getOpcode() == ISD::TargetConstant;
1644   }
1645 };
1646 
1647 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
1648   return cast<ConstantSDNode>(getOperand(Num))->getZExtValue();
1649 }
1650 
1651 uint64_t SDNode::getAsZExtVal() const {
1652   return cast<ConstantSDNode>(this)->getZExtValue();
1653 }
1654 
1655 const APInt &SDNode::getConstantOperandAPInt(unsigned Num) const {
1656   return cast<ConstantSDNode>(getOperand(Num))->getAPIntValue();
1657 }
1658 
1659 class ConstantFPSDNode : public SDNode {
1660   friend class SelectionDAG;
1661 
1662   const ConstantFP *Value;
1663 
1664   ConstantFPSDNode(bool isTarget, const ConstantFP *val, EVT VT)
1665       : SDNode(isTarget ? ISD::TargetConstantFP : ISD::ConstantFP, 0,
1666                DebugLoc(), getSDVTList(VT)),
1667         Value(val) {}
1668 
1669 public:
1670   const APFloat& getValueAPF() const { return Value->getValueAPF(); }
1671   const ConstantFP *getConstantFPValue() const { return Value; }
1672 
1673   /// Return true if the value is positive or negative zero.
1674   bool isZero() const { return Value->isZero(); }
1675 
1676   /// Return true if the value is a NaN.
1677   bool isNaN() const { return Value->isNaN(); }
1678 
1679   /// Return true if the value is an infinity
1680   bool isInfinity() const { return Value->isInfinity(); }
1681 
1682   /// Return true if the value is negative.
1683   bool isNegative() const { return Value->isNegative(); }
1684 
1685   /// We don't rely on operator== working on double values, as
1686   /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
1687   /// As such, this method can be used to do an exact bit-for-bit comparison of
1688   /// two floating point values.
1689 
1690   /// We leave the version with the double argument here because it's just so
1691   /// convenient to write "2.0" and the like.  Without this function we'd
1692   /// have to duplicate its logic everywhere it's called.
1693   bool isExactlyValue(double V) const {
1694     return Value->getValueAPF().isExactlyValue(V);
1695   }
1696   bool isExactlyValue(const APFloat& V) const;
1697 
1698   static bool isValueValidForType(EVT VT, const APFloat& Val);
1699 
1700   static bool classof(const SDNode *N) {
1701     return N->getOpcode() == ISD::ConstantFP ||
1702            N->getOpcode() == ISD::TargetConstantFP;
1703   }
1704 };
1705 
1706 /// Returns true if \p V is a constant integer zero.
1707 bool isNullConstant(SDValue V);
1708 
1709 /// Returns true if \p V is an FP constant with a value of positive zero.
1710 bool isNullFPConstant(SDValue V);
1711 
1712 /// Returns true if \p V is an integer constant with all bits set.
1713 bool isAllOnesConstant(SDValue V);
1714 
1715 /// Returns true if \p V is a constant integer one.
1716 bool isOneConstant(SDValue V);
1717 
1718 /// Returns true if \p V is a constant min signed integer value.
1719 bool isMinSignedConstant(SDValue V);
1720 
1721 /// Returns true if \p V is a neutral element of Opc with Flags.
1722 /// When OperandNo is 0, it checks that V is a left identity. Otherwise, it
1723 /// checks that V is a right identity.
1724 bool isNeutralConstant(unsigned Opc, SDNodeFlags Flags, SDValue V,
1725                        unsigned OperandNo);
1726 
1727 /// Return the non-bitcasted source operand of \p V if it exists.
1728 /// If \p V is not a bitcasted value, it is returned as-is.
1729 SDValue peekThroughBitcasts(SDValue V);
1730 
1731 /// Return the non-bitcasted and one-use source operand of \p V if it exists.
1732 /// If \p V is not a bitcasted one-use value, it is returned as-is.
1733 SDValue peekThroughOneUseBitcasts(SDValue V);
1734 
1735 /// Return the non-extracted vector source operand of \p V if it exists.
1736 /// If \p V is not an extracted subvector, it is returned as-is.
1737 SDValue peekThroughExtractSubvectors(SDValue V);
1738 
1739 /// Return the non-truncated source operand of \p V if it exists.
1740 /// If \p V is not a truncation, it is returned as-is.
1741 SDValue peekThroughTruncates(SDValue V);
1742 
1743 /// Returns true if \p V is a bitwise not operation. Assumes that an all ones
1744 /// constant is canonicalized to be operand 1.
1745 bool isBitwiseNot(SDValue V, bool AllowUndefs = false);
1746 
1747 /// If \p V is a bitwise not, returns the inverted operand. Otherwise returns
1748 /// an empty SDValue. Only bits set in \p Mask are required to be inverted,
1749 /// other bits may be arbitrary.
1750 SDValue getBitwiseNotOperand(SDValue V, SDValue Mask, bool AllowUndefs);
1751 
1752 /// Returns the SDNode if it is a constant splat BuildVector or constant int.
1753 ConstantSDNode *isConstOrConstSplat(SDValue N, bool AllowUndefs = false,
1754                                     bool AllowTruncation = false);
1755 
1756 /// Returns the SDNode if it is a demanded constant splat BuildVector or
1757 /// constant int.
1758 ConstantSDNode *isConstOrConstSplat(SDValue N, const APInt &DemandedElts,
1759                                     bool AllowUndefs = false,
1760                                     bool AllowTruncation = false);
1761 
1762 /// Returns the SDNode if it is a constant splat BuildVector or constant float.
1763 ConstantFPSDNode *isConstOrConstSplatFP(SDValue N, bool AllowUndefs = false);
1764 
1765 /// Returns the SDNode if it is a demanded constant splat BuildVector or
1766 /// constant float.
1767 ConstantFPSDNode *isConstOrConstSplatFP(SDValue N, const APInt &DemandedElts,
1768                                         bool AllowUndefs = false);
1769 
1770 /// Return true if the value is a constant 0 integer or a splatted vector of
1771 /// a constant 0 integer (with no undefs by default).
1772 /// Build vector implicit truncation is not an issue for null values.
1773 bool isNullOrNullSplat(SDValue V, bool AllowUndefs = false);
1774 
1775 /// Return true if the value is a constant 1 integer or a splatted vector of a
1776 /// constant 1 integer (with no undefs).
1777 /// Build vector implicit truncation is allowed, but the truncated bits need to
1778 /// be zero.
1779 bool isOneOrOneSplat(SDValue V, bool AllowUndefs = false);
1780 
1781 /// Return true if the value is a constant -1 integer or a splatted vector of a
1782 /// constant -1 integer (with no undefs).
1783 /// Does not permit build vector implicit truncation.
1784 bool isAllOnesOrAllOnesSplat(SDValue V, bool AllowUndefs = false);
1785 
1786 /// Return true if \p V is either a integer or FP constant.
1787 inline bool isIntOrFPConstant(SDValue V) {
1788   return isa<ConstantSDNode>(V) || isa<ConstantFPSDNode>(V);
1789 }
1790 
1791 class GlobalAddressSDNode : public SDNode {
1792   friend class SelectionDAG;
1793 
1794   const GlobalValue *TheGlobal;
1795   int64_t Offset;
1796   unsigned TargetFlags;
1797 
1798   GlobalAddressSDNode(unsigned Opc, unsigned Order, const DebugLoc &DL,
1799                       const GlobalValue *GA, EVT VT, int64_t o,
1800                       unsigned TF);
1801 
1802 public:
1803   const GlobalValue *getGlobal() const { return TheGlobal; }
1804   int64_t getOffset() const { return Offset; }
1805   unsigned getTargetFlags() const { return TargetFlags; }
1806   // Return the address space this GlobalAddress belongs to.
1807   unsigned getAddressSpace() const;
1808 
1809   static bool classof(const SDNode *N) {
1810     return N->getOpcode() == ISD::GlobalAddress ||
1811            N->getOpcode() == ISD::TargetGlobalAddress ||
1812            N->getOpcode() == ISD::GlobalTLSAddress ||
1813            N->getOpcode() == ISD::TargetGlobalTLSAddress;
1814   }
1815 };
1816 
1817 class FrameIndexSDNode : public SDNode {
1818   friend class SelectionDAG;
1819 
1820   int FI;
1821 
1822   FrameIndexSDNode(int fi, EVT VT, bool isTarg)
1823     : SDNode(isTarg ? ISD::TargetFrameIndex : ISD::FrameIndex,
1824       0, DebugLoc(), getSDVTList(VT)), FI(fi) {
1825   }
1826 
1827 public:
1828   int getIndex() const { return FI; }
1829 
1830   static bool classof(const SDNode *N) {
1831     return N->getOpcode() == ISD::FrameIndex ||
1832            N->getOpcode() == ISD::TargetFrameIndex;
1833   }
1834 };
1835 
1836 /// This SDNode is used for LIFETIME_START/LIFETIME_END values, which indicate
1837 /// the offet and size that are started/ended in the underlying FrameIndex.
1838 class LifetimeSDNode : public SDNode {
1839   friend class SelectionDAG;
1840   int64_t Size;
1841   int64_t Offset; // -1 if offset is unknown.
1842 
1843   LifetimeSDNode(unsigned Opcode, unsigned Order, const DebugLoc &dl,
1844                  SDVTList VTs, int64_t Size, int64_t Offset)
1845       : SDNode(Opcode, Order, dl, VTs), Size(Size), Offset(Offset) {}
1846 public:
1847   int64_t getFrameIndex() const {
1848     return cast<FrameIndexSDNode>(getOperand(1))->getIndex();
1849   }
1850 
1851   bool hasOffset() const { return Offset >= 0; }
1852   int64_t getOffset() const {
1853     assert(hasOffset() && "offset is unknown");
1854     return Offset;
1855   }
1856   int64_t getSize() const {
1857     assert(hasOffset() && "offset is unknown");
1858     return Size;
1859   }
1860 
1861   // Methods to support isa and dyn_cast
1862   static bool classof(const SDNode *N) {
1863     return N->getOpcode() == ISD::LIFETIME_START ||
1864            N->getOpcode() == ISD::LIFETIME_END;
1865   }
1866 };
1867 
1868 /// This SDNode is used for PSEUDO_PROBE values, which are the function guid and
1869 /// the index of the basic block being probed. A pseudo probe serves as a place
1870 /// holder and will be removed at the end of compilation. It does not have any
1871 /// operand because we do not want the instruction selection to deal with any.
1872 class PseudoProbeSDNode : public SDNode {
1873   friend class SelectionDAG;
1874   uint64_t Guid;
1875   uint64_t Index;
1876   uint32_t Attributes;
1877 
1878   PseudoProbeSDNode(unsigned Opcode, unsigned Order, const DebugLoc &Dl,
1879                     SDVTList VTs, uint64_t Guid, uint64_t Index, uint32_t Attr)
1880       : SDNode(Opcode, Order, Dl, VTs), Guid(Guid), Index(Index),
1881         Attributes(Attr) {}
1882 
1883 public:
1884   uint64_t getGuid() const { return Guid; }
1885   uint64_t getIndex() const { return Index; }
1886   uint32_t getAttributes() const { return Attributes; }
1887 
1888   // Methods to support isa and dyn_cast
1889   static bool classof(const SDNode *N) {
1890     return N->getOpcode() == ISD::PSEUDO_PROBE;
1891   }
1892 };
1893 
1894 class JumpTableSDNode : public SDNode {
1895   friend class SelectionDAG;
1896 
1897   int JTI;
1898   unsigned TargetFlags;
1899 
1900   JumpTableSDNode(int jti, EVT VT, bool isTarg, unsigned TF)
1901     : SDNode(isTarg ? ISD::TargetJumpTable : ISD::JumpTable,
1902       0, DebugLoc(), getSDVTList(VT)), JTI(jti), TargetFlags(TF) {
1903   }
1904 
1905 public:
1906   int getIndex() const { return JTI; }
1907   unsigned getTargetFlags() const { return TargetFlags; }
1908 
1909   static bool classof(const SDNode *N) {
1910     return N->getOpcode() == ISD::JumpTable ||
1911            N->getOpcode() == ISD::TargetJumpTable;
1912   }
1913 };
1914 
1915 class ConstantPoolSDNode : public SDNode {
1916   friend class SelectionDAG;
1917 
1918   union {
1919     const Constant *ConstVal;
1920     MachineConstantPoolValue *MachineCPVal;
1921   } Val;
1922   int Offset;  // It's a MachineConstantPoolValue if top bit is set.
1923   Align Alignment; // Minimum alignment requirement of CP.
1924   unsigned TargetFlags;
1925 
1926   ConstantPoolSDNode(bool isTarget, const Constant *c, EVT VT, int o,
1927                      Align Alignment, unsigned TF)
1928       : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, 0,
1929                DebugLoc(), getSDVTList(VT)),
1930         Offset(o), Alignment(Alignment), TargetFlags(TF) {
1931     assert(Offset >= 0 && "Offset is too large");
1932     Val.ConstVal = c;
1933   }
1934 
1935   ConstantPoolSDNode(bool isTarget, MachineConstantPoolValue *v, EVT VT, int o,
1936                      Align Alignment, unsigned TF)
1937       : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, 0,
1938                DebugLoc(), getSDVTList(VT)),
1939         Offset(o), Alignment(Alignment), TargetFlags(TF) {
1940     assert(Offset >= 0 && "Offset is too large");
1941     Val.MachineCPVal = v;
1942     Offset |= 1 << (sizeof(unsigned)*CHAR_BIT-1);
1943   }
1944 
1945 public:
1946   bool isMachineConstantPoolEntry() const {
1947     return Offset < 0;
1948   }
1949 
1950   const Constant *getConstVal() const {
1951     assert(!isMachineConstantPoolEntry() && "Wrong constantpool type");
1952     return Val.ConstVal;
1953   }
1954 
1955   MachineConstantPoolValue *getMachineCPVal() const {
1956     assert(isMachineConstantPoolEntry() && "Wrong constantpool type");
1957     return Val.MachineCPVal;
1958   }
1959 
1960   int getOffset() const {
1961     return Offset & ~(1 << (sizeof(unsigned)*CHAR_BIT-1));
1962   }
1963 
1964   // Return the alignment of this constant pool object, which is either 0 (for
1965   // default alignment) or the desired value.
1966   Align getAlign() const { return Alignment; }
1967   unsigned getTargetFlags() const { return TargetFlags; }
1968 
1969   Type *getType() const;
1970 
1971   static bool classof(const SDNode *N) {
1972     return N->getOpcode() == ISD::ConstantPool ||
1973            N->getOpcode() == ISD::TargetConstantPool;
1974   }
1975 };
1976 
1977 /// Completely target-dependent object reference.
1978 class TargetIndexSDNode : public SDNode {
1979   friend class SelectionDAG;
1980 
1981   unsigned TargetFlags;
1982   int Index;
1983   int64_t Offset;
1984 
1985 public:
1986   TargetIndexSDNode(int Idx, EVT VT, int64_t Ofs, unsigned TF)
1987       : SDNode(ISD::TargetIndex, 0, DebugLoc(), getSDVTList(VT)),
1988         TargetFlags(TF), Index(Idx), Offset(Ofs) {}
1989 
1990   unsigned getTargetFlags() const { return TargetFlags; }
1991   int getIndex() const { return Index; }
1992   int64_t getOffset() const { return Offset; }
1993 
1994   static bool classof(const SDNode *N) {
1995     return N->getOpcode() == ISD::TargetIndex;
1996   }
1997 };
1998 
1999 class BasicBlockSDNode : public SDNode {
2000   friend class SelectionDAG;
2001 
2002   MachineBasicBlock *MBB;
2003 
2004   /// Debug info is meaningful and potentially useful here, but we create
2005   /// blocks out of order when they're jumped to, which makes it a bit
2006   /// harder.  Let's see if we need it first.
2007   explicit BasicBlockSDNode(MachineBasicBlock *mbb)
2008     : SDNode(ISD::BasicBlock, 0, DebugLoc(), getSDVTList(MVT::Other)), MBB(mbb)
2009   {}
2010 
2011 public:
2012   MachineBasicBlock *getBasicBlock() const { return MBB; }
2013 
2014   static bool classof(const SDNode *N) {
2015     return N->getOpcode() == ISD::BasicBlock;
2016   }
2017 };
2018 
2019 /// A "pseudo-class" with methods for operating on BUILD_VECTORs.
2020 class BuildVectorSDNode : public SDNode {
2021 public:
2022   // These are constructed as SDNodes and then cast to BuildVectorSDNodes.
2023   explicit BuildVectorSDNode() = delete;
2024 
2025   /// Check if this is a constant splat, and if so, find the
2026   /// smallest element size that splats the vector.  If MinSplatBits is
2027   /// nonzero, the element size must be at least that large.  Note that the
2028   /// splat element may be the entire vector (i.e., a one element vector).
2029   /// Returns the splat element value in SplatValue.  Any undefined bits in
2030   /// that value are zero, and the corresponding bits in the SplatUndef mask
2031   /// are set.  The SplatBitSize value is set to the splat element size in
2032   /// bits.  HasAnyUndefs is set to true if any bits in the vector are
2033   /// undefined.  isBigEndian describes the endianness of the target.
2034   bool isConstantSplat(APInt &SplatValue, APInt &SplatUndef,
2035                        unsigned &SplatBitSize, bool &HasAnyUndefs,
2036                        unsigned MinSplatBits = 0,
2037                        bool isBigEndian = false) const;
2038 
2039   /// Returns the demanded splatted value or a null value if this is not a
2040   /// splat.
2041   ///
2042   /// The DemandedElts mask indicates the elements that must be in the splat.
2043   /// If passed a non-null UndefElements bitvector, it will resize it to match
2044   /// the vector width and set the bits where elements are undef.
2045   SDValue getSplatValue(const APInt &DemandedElts,
2046                         BitVector *UndefElements = nullptr) const;
2047 
2048   /// Returns the splatted value or a null value if this is not a splat.
2049   ///
2050   /// If passed a non-null UndefElements bitvector, it will resize it to match
2051   /// the vector width and set the bits where elements are undef.
2052   SDValue getSplatValue(BitVector *UndefElements = nullptr) const;
2053 
2054   /// Find the shortest repeating sequence of values in the build vector.
2055   ///
2056   /// e.g. { u, X, u, X, u, u, X, u } -> { X }
2057   ///      { X, Y, u, Y, u, u, X, u } -> { X, Y }
2058   ///
2059   /// Currently this must be a power-of-2 build vector.
2060   /// The DemandedElts mask indicates the elements that must be present,
2061   /// undemanded elements in Sequence may be null (SDValue()). If passed a
2062   /// non-null UndefElements bitvector, it will resize it to match the original
2063   /// vector width and set the bits where elements are undef. If result is
2064   /// false, Sequence will be empty.
2065   bool getRepeatedSequence(const APInt &DemandedElts,
2066                            SmallVectorImpl<SDValue> &Sequence,
2067                            BitVector *UndefElements = nullptr) const;
2068 
2069   /// Find the shortest repeating sequence of values in the build vector.
2070   ///
2071   /// e.g. { u, X, u, X, u, u, X, u } -> { X }
2072   ///      { X, Y, u, Y, u, u, X, u } -> { X, Y }
2073   ///
2074   /// Currently this must be a power-of-2 build vector.
2075   /// If passed a non-null UndefElements bitvector, it will resize it to match
2076   /// the original vector width and set the bits where elements are undef.
2077   /// If result is false, Sequence will be empty.
2078   bool getRepeatedSequence(SmallVectorImpl<SDValue> &Sequence,
2079                            BitVector *UndefElements = nullptr) const;
2080 
2081   /// Returns the demanded splatted constant or null if this is not a constant
2082   /// splat.
2083   ///
2084   /// The DemandedElts mask indicates the elements that must be in the splat.
2085   /// If passed a non-null UndefElements bitvector, it will resize it to match
2086   /// the vector width and set the bits where elements are undef.
2087   ConstantSDNode *
2088   getConstantSplatNode(const APInt &DemandedElts,
2089                        BitVector *UndefElements = nullptr) const;
2090 
2091   /// Returns the splatted constant or null if this is not a constant
2092   /// splat.
2093   ///
2094   /// If passed a non-null UndefElements bitvector, it will resize it to match
2095   /// the vector width and set the bits where elements are undef.
2096   ConstantSDNode *
2097   getConstantSplatNode(BitVector *UndefElements = nullptr) const;
2098 
2099   /// Returns the demanded splatted constant FP or null if this is not a
2100   /// constant FP splat.
2101   ///
2102   /// The DemandedElts mask indicates the elements that must be in the splat.
2103   /// If passed a non-null UndefElements bitvector, it will resize it to match
2104   /// the vector width and set the bits where elements are undef.
2105   ConstantFPSDNode *
2106   getConstantFPSplatNode(const APInt &DemandedElts,
2107                          BitVector *UndefElements = nullptr) const;
2108 
2109   /// Returns the splatted constant FP or null if this is not a constant
2110   /// FP splat.
2111   ///
2112   /// If passed a non-null UndefElements bitvector, it will resize it to match
2113   /// the vector width and set the bits where elements are undef.
2114   ConstantFPSDNode *
2115   getConstantFPSplatNode(BitVector *UndefElements = nullptr) const;
2116 
2117   /// If this is a constant FP splat and the splatted constant FP is an
2118   /// exact power or 2, return the log base 2 integer value.  Otherwise,
2119   /// return -1.
2120   ///
2121   /// The BitWidth specifies the necessary bit precision.
2122   int32_t getConstantFPSplatPow2ToLog2Int(BitVector *UndefElements,
2123                                           uint32_t BitWidth) const;
2124 
2125   /// Extract the raw bit data from a build vector of Undef, Constant or
2126   /// ConstantFP node elements. Each raw bit element will be \p
2127   /// DstEltSizeInBits wide, undef elements are treated as zero, and entirely
2128   /// undefined elements are flagged in \p UndefElements.
2129   bool getConstantRawBits(bool IsLittleEndian, unsigned DstEltSizeInBits,
2130                           SmallVectorImpl<APInt> &RawBitElements,
2131                           BitVector &UndefElements) const;
2132 
2133   bool isConstant() const;
2134 
2135   /// If this BuildVector is constant and represents the numerical series
2136   /// "<a, a+n, a+2n, a+3n, ...>" where a is integer and n is a non-zero integer,
2137   /// the value "<a,n>" is returned.
2138   std::optional<std::pair<APInt, APInt>> isConstantSequence() const;
2139 
2140   /// Recast bit data \p SrcBitElements to \p DstEltSizeInBits wide elements.
2141   /// Undef elements are treated as zero, and entirely undefined elements are
2142   /// flagged in \p DstUndefElements.
2143   static void recastRawBits(bool IsLittleEndian, unsigned DstEltSizeInBits,
2144                             SmallVectorImpl<APInt> &DstBitElements,
2145                             ArrayRef<APInt> SrcBitElements,
2146                             BitVector &DstUndefElements,
2147                             const BitVector &SrcUndefElements);
2148 
2149   static bool classof(const SDNode *N) {
2150     return N->getOpcode() == ISD::BUILD_VECTOR;
2151   }
2152 };
2153 
2154 /// An SDNode that holds an arbitrary LLVM IR Value. This is
2155 /// used when the SelectionDAG needs to make a simple reference to something
2156 /// in the LLVM IR representation.
2157 ///
2158 class SrcValueSDNode : public SDNode {
2159   friend class SelectionDAG;
2160 
2161   const Value *V;
2162 
2163   /// Create a SrcValue for a general value.
2164   explicit SrcValueSDNode(const Value *v)
2165     : SDNode(ISD::SRCVALUE, 0, DebugLoc(), getSDVTList(MVT::Other)), V(v) {}
2166 
2167 public:
2168   /// Return the contained Value.
2169   const Value *getValue() const { return V; }
2170 
2171   static bool classof(const SDNode *N) {
2172     return N->getOpcode() == ISD::SRCVALUE;
2173   }
2174 };
2175 
2176 class MDNodeSDNode : public SDNode {
2177   friend class SelectionDAG;
2178 
2179   const MDNode *MD;
2180 
2181   explicit MDNodeSDNode(const MDNode *md)
2182   : SDNode(ISD::MDNODE_SDNODE, 0, DebugLoc(), getSDVTList(MVT::Other)), MD(md)
2183   {}
2184 
2185 public:
2186   const MDNode *getMD() const { return MD; }
2187 
2188   static bool classof(const SDNode *N) {
2189     return N->getOpcode() == ISD::MDNODE_SDNODE;
2190   }
2191 };
2192 
2193 class RegisterSDNode : public SDNode {
2194   friend class SelectionDAG;
2195 
2196   Register Reg;
2197 
2198   RegisterSDNode(Register reg, EVT VT)
2199     : SDNode(ISD::Register, 0, DebugLoc(), getSDVTList(VT)), Reg(reg) {}
2200 
2201 public:
2202   Register getReg() const { return Reg; }
2203 
2204   static bool classof(const SDNode *N) {
2205     return N->getOpcode() == ISD::Register;
2206   }
2207 };
2208 
2209 class RegisterMaskSDNode : public SDNode {
2210   friend class SelectionDAG;
2211 
2212   // The memory for RegMask is not owned by the node.
2213   const uint32_t *RegMask;
2214 
2215   RegisterMaskSDNode(const uint32_t *mask)
2216     : SDNode(ISD::RegisterMask, 0, DebugLoc(), getSDVTList(MVT::Untyped)),
2217       RegMask(mask) {}
2218 
2219 public:
2220   const uint32_t *getRegMask() const { return RegMask; }
2221 
2222   static bool classof(const SDNode *N) {
2223     return N->getOpcode() == ISD::RegisterMask;
2224   }
2225 };
2226 
2227 class BlockAddressSDNode : public SDNode {
2228   friend class SelectionDAG;
2229 
2230   const BlockAddress *BA;
2231   int64_t Offset;
2232   unsigned TargetFlags;
2233 
2234   BlockAddressSDNode(unsigned NodeTy, EVT VT, const BlockAddress *ba,
2235                      int64_t o, unsigned Flags)
2236     : SDNode(NodeTy, 0, DebugLoc(), getSDVTList(VT)),
2237              BA(ba), Offset(o), TargetFlags(Flags) {}
2238 
2239 public:
2240   const BlockAddress *getBlockAddress() const { return BA; }
2241   int64_t getOffset() const { return Offset; }
2242   unsigned getTargetFlags() const { return TargetFlags; }
2243 
2244   static bool classof(const SDNode *N) {
2245     return N->getOpcode() == ISD::BlockAddress ||
2246            N->getOpcode() == ISD::TargetBlockAddress;
2247   }
2248 };
2249 
2250 class LabelSDNode : public SDNode {
2251   friend class SelectionDAG;
2252 
2253   MCSymbol *Label;
2254 
2255   LabelSDNode(unsigned Opcode, unsigned Order, const DebugLoc &dl, MCSymbol *L)
2256       : SDNode(Opcode, Order, dl, getSDVTList(MVT::Other)), Label(L) {
2257     assert(LabelSDNode::classof(this) && "not a label opcode");
2258   }
2259 
2260 public:
2261   MCSymbol *getLabel() const { return Label; }
2262 
2263   static bool classof(const SDNode *N) {
2264     return N->getOpcode() == ISD::EH_LABEL ||
2265            N->getOpcode() == ISD::ANNOTATION_LABEL;
2266   }
2267 };
2268 
2269 class ExternalSymbolSDNode : public SDNode {
2270   friend class SelectionDAG;
2271 
2272   const char *Symbol;
2273   unsigned TargetFlags;
2274 
2275   ExternalSymbolSDNode(bool isTarget, const char *Sym, unsigned TF, EVT VT)
2276       : SDNode(isTarget ? ISD::TargetExternalSymbol : ISD::ExternalSymbol, 0,
2277                DebugLoc(), getSDVTList(VT)),
2278         Symbol(Sym), TargetFlags(TF) {}
2279 
2280 public:
2281   const char *getSymbol() const { return Symbol; }
2282   unsigned getTargetFlags() const { return TargetFlags; }
2283 
2284   static bool classof(const SDNode *N) {
2285     return N->getOpcode() == ISD::ExternalSymbol ||
2286            N->getOpcode() == ISD::TargetExternalSymbol;
2287   }
2288 };
2289 
2290 class MCSymbolSDNode : public SDNode {
2291   friend class SelectionDAG;
2292 
2293   MCSymbol *Symbol;
2294 
2295   MCSymbolSDNode(MCSymbol *Symbol, EVT VT)
2296       : SDNode(ISD::MCSymbol, 0, DebugLoc(), getSDVTList(VT)), Symbol(Symbol) {}
2297 
2298 public:
2299   MCSymbol *getMCSymbol() const { return Symbol; }
2300 
2301   static bool classof(const SDNode *N) {
2302     return N->getOpcode() == ISD::MCSymbol;
2303   }
2304 };
2305 
2306 class CondCodeSDNode : public SDNode {
2307   friend class SelectionDAG;
2308 
2309   ISD::CondCode Condition;
2310 
2311   explicit CondCodeSDNode(ISD::CondCode Cond)
2312     : SDNode(ISD::CONDCODE, 0, DebugLoc(), getSDVTList(MVT::Other)),
2313       Condition(Cond) {}
2314 
2315 public:
2316   ISD::CondCode get() const { return Condition; }
2317 
2318   static bool classof(const SDNode *N) {
2319     return N->getOpcode() == ISD::CONDCODE;
2320   }
2321 };
2322 
2323 /// This class is used to represent EVT's, which are used
2324 /// to parameterize some operations.
2325 class VTSDNode : public SDNode {
2326   friend class SelectionDAG;
2327 
2328   EVT ValueType;
2329 
2330   explicit VTSDNode(EVT VT)
2331     : SDNode(ISD::VALUETYPE, 0, DebugLoc(), getSDVTList(MVT::Other)),
2332       ValueType(VT) {}
2333 
2334 public:
2335   EVT getVT() const { return ValueType; }
2336 
2337   static bool classof(const SDNode *N) {
2338     return N->getOpcode() == ISD::VALUETYPE;
2339   }
2340 };
2341 
2342 /// Base class for LoadSDNode and StoreSDNode
2343 class LSBaseSDNode : public MemSDNode {
2344 public:
2345   LSBaseSDNode(ISD::NodeType NodeTy, unsigned Order, const DebugLoc &dl,
2346                SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT,
2347                MachineMemOperand *MMO)
2348       : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
2349     LSBaseSDNodeBits.AddressingMode = AM;
2350     assert(getAddressingMode() == AM && "Value truncated");
2351   }
2352 
2353   const SDValue &getOffset() const {
2354     return getOperand(getOpcode() == ISD::LOAD ? 2 : 3);
2355   }
2356 
2357   /// Return the addressing mode for this load or store:
2358   /// unindexed, pre-inc, pre-dec, post-inc, or post-dec.
2359   ISD::MemIndexedMode getAddressingMode() const {
2360     return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode);
2361   }
2362 
2363   /// Return true if this is a pre/post inc/dec load/store.
2364   bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
2365 
2366   /// Return true if this is NOT a pre/post inc/dec load/store.
2367   bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
2368 
2369   static bool classof(const SDNode *N) {
2370     return N->getOpcode() == ISD::LOAD ||
2371            N->getOpcode() == ISD::STORE;
2372   }
2373 };
2374 
2375 /// This class is used to represent ISD::LOAD nodes.
2376 class LoadSDNode : public LSBaseSDNode {
2377   friend class SelectionDAG;
2378 
2379   LoadSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
2380              ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
2381              MachineMemOperand *MMO)
2382       : LSBaseSDNode(ISD::LOAD, Order, dl, VTs, AM, MemVT, MMO) {
2383     LoadSDNodeBits.ExtTy = ETy;
2384     assert(readMem() && "Load MachineMemOperand is not a load!");
2385     assert(!writeMem() && "Load MachineMemOperand is a store!");
2386   }
2387 
2388 public:
2389   /// Return whether this is a plain node,
2390   /// or one of the varieties of value-extending loads.
2391   ISD::LoadExtType getExtensionType() const {
2392     return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy);
2393   }
2394 
2395   const SDValue &getBasePtr() const { return getOperand(1); }
2396   const SDValue &getOffset() const { return getOperand(2); }
2397 
2398   static bool classof(const SDNode *N) {
2399     return N->getOpcode() == ISD::LOAD;
2400   }
2401 };
2402 
2403 /// This class is used to represent ISD::STORE nodes.
2404 class StoreSDNode : public LSBaseSDNode {
2405   friend class SelectionDAG;
2406 
2407   StoreSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
2408               ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT,
2409               MachineMemOperand *MMO)
2410       : LSBaseSDNode(ISD::STORE, Order, dl, VTs, AM, MemVT, MMO) {
2411     StoreSDNodeBits.IsTruncating = isTrunc;
2412     assert(!readMem() && "Store MachineMemOperand is a load!");
2413     assert(writeMem() && "Store MachineMemOperand is not a store!");
2414   }
2415 
2416 public:
2417   /// Return true if the op does a truncation before store.
2418   /// For integers this is the same as doing a TRUNCATE and storing the result.
2419   /// For floats, it is the same as doing an FP_ROUND and storing the result.
2420   bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; }
2421   void setTruncatingStore(bool Truncating) {
2422     StoreSDNodeBits.IsTruncating = Truncating;
2423   }
2424 
2425   const SDValue &getValue() const { return getOperand(1); }
2426   const SDValue &getBasePtr() const { return getOperand(2); }
2427   const SDValue &getOffset() const { return getOperand(3); }
2428 
2429   static bool classof(const SDNode *N) {
2430     return N->getOpcode() == ISD::STORE;
2431   }
2432 };
2433 
2434 /// This base class is used to represent VP_LOAD, VP_STORE,
2435 /// EXPERIMENTAL_VP_STRIDED_LOAD and EXPERIMENTAL_VP_STRIDED_STORE nodes
2436 class VPBaseLoadStoreSDNode : public MemSDNode {
2437 public:
2438   friend class SelectionDAG;
2439 
2440   VPBaseLoadStoreSDNode(ISD::NodeType NodeTy, unsigned Order,
2441                         const DebugLoc &DL, SDVTList VTs,
2442                         ISD::MemIndexedMode AM, EVT MemVT,
2443                         MachineMemOperand *MMO)
2444       : MemSDNode(NodeTy, Order, DL, VTs, MemVT, MMO) {
2445     LSBaseSDNodeBits.AddressingMode = AM;
2446     assert(getAddressingMode() == AM && "Value truncated");
2447   }
2448 
2449   // VPStridedStoreSDNode (Chain, Data, Ptr,    Offset, Stride, Mask, EVL)
2450   // VPStoreSDNode        (Chain, Data, Ptr,    Offset, Mask,   EVL)
2451   // VPStridedLoadSDNode  (Chain, Ptr,  Offset, Stride, Mask,   EVL)
2452   // VPLoadSDNode         (Chain, Ptr,  Offset, Mask,   EVL)
2453   // Mask is a vector of i1 elements;
2454   // the type of EVL is TLI.getVPExplicitVectorLengthTy().
2455   const SDValue &getOffset() const {
2456     return getOperand((getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_LOAD ||
2457                        getOpcode() == ISD::VP_LOAD)
2458                           ? 2
2459                           : 3);
2460   }
2461   const SDValue &getBasePtr() const {
2462     return getOperand((getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_LOAD ||
2463                        getOpcode() == ISD::VP_LOAD)
2464                           ? 1
2465                           : 2);
2466   }
2467   const SDValue &getMask() const {
2468     switch (getOpcode()) {
2469     default:
2470       llvm_unreachable("Invalid opcode");
2471     case ISD::VP_LOAD:
2472       return getOperand(3);
2473     case ISD::VP_STORE:
2474     case ISD::EXPERIMENTAL_VP_STRIDED_LOAD:
2475       return getOperand(4);
2476     case ISD::EXPERIMENTAL_VP_STRIDED_STORE:
2477       return getOperand(5);
2478     }
2479   }
2480   const SDValue &getVectorLength() const {
2481     switch (getOpcode()) {
2482     default:
2483       llvm_unreachable("Invalid opcode");
2484     case ISD::VP_LOAD:
2485       return getOperand(4);
2486     case ISD::VP_STORE:
2487     case ISD::EXPERIMENTAL_VP_STRIDED_LOAD:
2488       return getOperand(5);
2489     case ISD::EXPERIMENTAL_VP_STRIDED_STORE:
2490       return getOperand(6);
2491     }
2492   }
2493 
2494   /// Return the addressing mode for this load or store:
2495   /// unindexed, pre-inc, pre-dec, post-inc, or post-dec.
2496   ISD::MemIndexedMode getAddressingMode() const {
2497     return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode);
2498   }
2499 
2500   /// Return true if this is a pre/post inc/dec load/store.
2501   bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
2502 
2503   /// Return true if this is NOT a pre/post inc/dec load/store.
2504   bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
2505 
2506   static bool classof(const SDNode *N) {
2507     return N->getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_LOAD ||
2508            N->getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_STORE ||
2509            N->getOpcode() == ISD::VP_LOAD || N->getOpcode() == ISD::VP_STORE;
2510   }
2511 };
2512 
2513 /// This class is used to represent a VP_LOAD node
2514 class VPLoadSDNode : public VPBaseLoadStoreSDNode {
2515 public:
2516   friend class SelectionDAG;
2517 
2518   VPLoadSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
2519                ISD::MemIndexedMode AM, ISD::LoadExtType ETy, bool isExpanding,
2520                EVT MemVT, MachineMemOperand *MMO)
2521       : VPBaseLoadStoreSDNode(ISD::VP_LOAD, Order, dl, VTs, AM, MemVT, MMO) {
2522     LoadSDNodeBits.ExtTy = ETy;
2523     LoadSDNodeBits.IsExpanding = isExpanding;
2524   }
2525 
2526   ISD::LoadExtType getExtensionType() const {
2527     return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy);
2528   }
2529 
2530   const SDValue &getBasePtr() const { return getOperand(1); }
2531   const SDValue &getOffset() const { return getOperand(2); }
2532   const SDValue &getMask() const { return getOperand(3); }
2533   const SDValue &getVectorLength() const { return getOperand(4); }
2534 
2535   static bool classof(const SDNode *N) {
2536     return N->getOpcode() == ISD::VP_LOAD;
2537   }
2538   bool isExpandingLoad() const { return LoadSDNodeBits.IsExpanding; }
2539 };
2540 
2541 /// This class is used to represent an EXPERIMENTAL_VP_STRIDED_LOAD node.
2542 class VPStridedLoadSDNode : public VPBaseLoadStoreSDNode {
2543 public:
2544   friend class SelectionDAG;
2545 
2546   VPStridedLoadSDNode(unsigned Order, const DebugLoc &DL, SDVTList VTs,
2547                       ISD::MemIndexedMode AM, ISD::LoadExtType ETy,
2548                       bool IsExpanding, EVT MemVT, MachineMemOperand *MMO)
2549       : VPBaseLoadStoreSDNode(ISD::EXPERIMENTAL_VP_STRIDED_LOAD, Order, DL, VTs,
2550                               AM, MemVT, MMO) {
2551     LoadSDNodeBits.ExtTy = ETy;
2552     LoadSDNodeBits.IsExpanding = IsExpanding;
2553   }
2554 
2555   ISD::LoadExtType getExtensionType() const {
2556     return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy);
2557   }
2558 
2559   const SDValue &getBasePtr() const { return getOperand(1); }
2560   const SDValue &getOffset() const { return getOperand(2); }
2561   const SDValue &getStride() const { return getOperand(3); }
2562   const SDValue &getMask() const { return getOperand(4); }
2563   const SDValue &getVectorLength() const { return getOperand(5); }
2564 
2565   static bool classof(const SDNode *N) {
2566     return N->getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_LOAD;
2567   }
2568   bool isExpandingLoad() const { return LoadSDNodeBits.IsExpanding; }
2569 };
2570 
2571 /// This class is used to represent a VP_STORE node
2572 class VPStoreSDNode : public VPBaseLoadStoreSDNode {
2573 public:
2574   friend class SelectionDAG;
2575 
2576   VPStoreSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
2577                 ISD::MemIndexedMode AM, bool isTrunc, bool isCompressing,
2578                 EVT MemVT, MachineMemOperand *MMO)
2579       : VPBaseLoadStoreSDNode(ISD::VP_STORE, Order, dl, VTs, AM, MemVT, MMO) {
2580     StoreSDNodeBits.IsTruncating = isTrunc;
2581     StoreSDNodeBits.IsCompressing = isCompressing;
2582   }
2583 
2584   /// Return true if this is a truncating store.
2585   /// For integers this is the same as doing a TRUNCATE and storing the result.
2586   /// For floats, it is the same as doing an FP_ROUND and storing the result.
2587   bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; }
2588 
2589   /// Returns true if the op does a compression to the vector before storing.
2590   /// The node contiguously stores the active elements (integers or floats)
2591   /// in src (those with their respective bit set in writemask k) to unaligned
2592   /// memory at base_addr.
2593   bool isCompressingStore() const { return StoreSDNodeBits.IsCompressing; }
2594 
2595   const SDValue &getValue() const { return getOperand(1); }
2596   const SDValue &getBasePtr() const { return getOperand(2); }
2597   const SDValue &getOffset() const { return getOperand(3); }
2598   const SDValue &getMask() const { return getOperand(4); }
2599   const SDValue &getVectorLength() const { return getOperand(5); }
2600 
2601   static bool classof(const SDNode *N) {
2602     return N->getOpcode() == ISD::VP_STORE;
2603   }
2604 };
2605 
2606 /// This class is used to represent an EXPERIMENTAL_VP_STRIDED_STORE node.
2607 class VPStridedStoreSDNode : public VPBaseLoadStoreSDNode {
2608 public:
2609   friend class SelectionDAG;
2610 
2611   VPStridedStoreSDNode(unsigned Order, const DebugLoc &DL, SDVTList VTs,
2612                        ISD::MemIndexedMode AM, bool IsTrunc, bool IsCompressing,
2613                        EVT MemVT, MachineMemOperand *MMO)
2614       : VPBaseLoadStoreSDNode(ISD::EXPERIMENTAL_VP_STRIDED_STORE, Order, DL,
2615                               VTs, AM, MemVT, MMO) {
2616     StoreSDNodeBits.IsTruncating = IsTrunc;
2617     StoreSDNodeBits.IsCompressing = IsCompressing;
2618   }
2619 
2620   /// Return true if this is a truncating store.
2621   /// For integers this is the same as doing a TRUNCATE and storing the result.
2622   /// For floats, it is the same as doing an FP_ROUND and storing the result.
2623   bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; }
2624 
2625   /// Returns true if the op does a compression to the vector before storing.
2626   /// The node contiguously stores the active elements (integers or floats)
2627   /// in src (those with their respective bit set in writemask k) to unaligned
2628   /// memory at base_addr.
2629   bool isCompressingStore() const { return StoreSDNodeBits.IsCompressing; }
2630 
2631   const SDValue &getValue() const { return getOperand(1); }
2632   const SDValue &getBasePtr() const { return getOperand(2); }
2633   const SDValue &getOffset() const { return getOperand(3); }
2634   const SDValue &getStride() const { return getOperand(4); }
2635   const SDValue &getMask() const { return getOperand(5); }
2636   const SDValue &getVectorLength() const { return getOperand(6); }
2637 
2638   static bool classof(const SDNode *N) {
2639     return N->getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_STORE;
2640   }
2641 };
2642 
2643 /// This base class is used to represent MLOAD and MSTORE nodes
2644 class MaskedLoadStoreSDNode : public MemSDNode {
2645 public:
2646   friend class SelectionDAG;
2647 
2648   MaskedLoadStoreSDNode(ISD::NodeType NodeTy, unsigned Order,
2649                         const DebugLoc &dl, SDVTList VTs,
2650                         ISD::MemIndexedMode AM, EVT MemVT,
2651                         MachineMemOperand *MMO)
2652       : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
2653     LSBaseSDNodeBits.AddressingMode = AM;
2654     assert(getAddressingMode() == AM && "Value truncated");
2655   }
2656 
2657   // MaskedLoadSDNode (Chain, ptr, offset, mask, passthru)
2658   // MaskedStoreSDNode (Chain, data, ptr, offset, mask)
2659   // Mask is a vector of i1 elements
2660   const SDValue &getOffset() const {
2661     return getOperand(getOpcode() == ISD::MLOAD ? 2 : 3);
2662   }
2663   const SDValue &getMask() const {
2664     return getOperand(getOpcode() == ISD::MLOAD ? 3 : 4);
2665   }
2666 
2667   /// Return the addressing mode for this load or store:
2668   /// unindexed, pre-inc, pre-dec, post-inc, or post-dec.
2669   ISD::MemIndexedMode getAddressingMode() const {
2670     return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode);
2671   }
2672 
2673   /// Return true if this is a pre/post inc/dec load/store.
2674   bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
2675 
2676   /// Return true if this is NOT a pre/post inc/dec load/store.
2677   bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
2678 
2679   static bool classof(const SDNode *N) {
2680     return N->getOpcode() == ISD::MLOAD ||
2681            N->getOpcode() == ISD::MSTORE;
2682   }
2683 };
2684 
2685 /// This class is used to represent an MLOAD node
2686 class MaskedLoadSDNode : public MaskedLoadStoreSDNode {
2687 public:
2688   friend class SelectionDAG;
2689 
2690   MaskedLoadSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
2691                    ISD::MemIndexedMode AM, ISD::LoadExtType ETy,
2692                    bool IsExpanding, EVT MemVT, MachineMemOperand *MMO)
2693       : MaskedLoadStoreSDNode(ISD::MLOAD, Order, dl, VTs, AM, MemVT, MMO) {
2694     LoadSDNodeBits.ExtTy = ETy;
2695     LoadSDNodeBits.IsExpanding = IsExpanding;
2696   }
2697 
2698   ISD::LoadExtType getExtensionType() const {
2699     return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy);
2700   }
2701 
2702   const SDValue &getBasePtr() const { return getOperand(1); }
2703   const SDValue &getOffset() const { return getOperand(2); }
2704   const SDValue &getMask() const { return getOperand(3); }
2705   const SDValue &getPassThru() const { return getOperand(4); }
2706 
2707   static bool classof(const SDNode *N) {
2708     return N->getOpcode() == ISD::MLOAD;
2709   }
2710 
2711   bool isExpandingLoad() const { return LoadSDNodeBits.IsExpanding; }
2712 };
2713 
2714 /// This class is used to represent an MSTORE node
2715 class MaskedStoreSDNode : public MaskedLoadStoreSDNode {
2716 public:
2717   friend class SelectionDAG;
2718 
2719   MaskedStoreSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
2720                     ISD::MemIndexedMode AM, bool isTrunc, bool isCompressing,
2721                     EVT MemVT, MachineMemOperand *MMO)
2722       : MaskedLoadStoreSDNode(ISD::MSTORE, Order, dl, VTs, AM, MemVT, MMO) {
2723     StoreSDNodeBits.IsTruncating = isTrunc;
2724     StoreSDNodeBits.IsCompressing = isCompressing;
2725   }
2726 
2727   /// Return true if the op does a truncation before store.
2728   /// For integers this is the same as doing a TRUNCATE and storing the result.
2729   /// For floats, it is the same as doing an FP_ROUND and storing the result.
2730   bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; }
2731 
2732   /// Returns true if the op does a compression to the vector before storing.
2733   /// The node contiguously stores the active elements (integers or floats)
2734   /// in src (those with their respective bit set in writemask k) to unaligned
2735   /// memory at base_addr.
2736   bool isCompressingStore() const { return StoreSDNodeBits.IsCompressing; }
2737 
2738   const SDValue &getValue() const { return getOperand(1); }
2739   const SDValue &getBasePtr() const { return getOperand(2); }
2740   const SDValue &getOffset() const { return getOperand(3); }
2741   const SDValue &getMask() const { return getOperand(4); }
2742 
2743   static bool classof(const SDNode *N) {
2744     return N->getOpcode() == ISD::MSTORE;
2745   }
2746 };
2747 
2748 /// This is a base class used to represent
2749 /// VP_GATHER and VP_SCATTER nodes
2750 ///
2751 class VPGatherScatterSDNode : public MemSDNode {
2752 public:
2753   friend class SelectionDAG;
2754 
2755   VPGatherScatterSDNode(ISD::NodeType NodeTy, unsigned Order,
2756                         const DebugLoc &dl, SDVTList VTs, EVT MemVT,
2757                         MachineMemOperand *MMO, ISD::MemIndexType IndexType)
2758       : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
2759     LSBaseSDNodeBits.AddressingMode = IndexType;
2760     assert(getIndexType() == IndexType && "Value truncated");
2761   }
2762 
2763   /// How is Index applied to BasePtr when computing addresses.
2764   ISD::MemIndexType getIndexType() const {
2765     return static_cast<ISD::MemIndexType>(LSBaseSDNodeBits.AddressingMode);
2766   }
2767   bool isIndexScaled() const {
2768     return !cast<ConstantSDNode>(getScale())->isOne();
2769   }
2770   bool isIndexSigned() const { return isIndexTypeSigned(getIndexType()); }
2771 
2772   // In the both nodes address is Op1, mask is Op2:
2773   // VPGatherSDNode  (Chain, base, index, scale, mask, vlen)
2774   // VPScatterSDNode (Chain, value, base, index, scale, mask, vlen)
2775   // Mask is a vector of i1 elements
2776   const SDValue &getBasePtr() const {
2777     return getOperand((getOpcode() == ISD::VP_GATHER) ? 1 : 2);
2778   }
2779   const SDValue &getIndex() const {
2780     return getOperand((getOpcode() == ISD::VP_GATHER) ? 2 : 3);
2781   }
2782   const SDValue &getScale() const {
2783     return getOperand((getOpcode() == ISD::VP_GATHER) ? 3 : 4);
2784   }
2785   const SDValue &getMask() const {
2786     return getOperand((getOpcode() == ISD::VP_GATHER) ? 4 : 5);
2787   }
2788   const SDValue &getVectorLength() const {
2789     return getOperand((getOpcode() == ISD::VP_GATHER) ? 5 : 6);
2790   }
2791 
2792   static bool classof(const SDNode *N) {
2793     return N->getOpcode() == ISD::VP_GATHER ||
2794            N->getOpcode() == ISD::VP_SCATTER;
2795   }
2796 };
2797 
2798 /// This class is used to represent an VP_GATHER node
2799 ///
2800 class VPGatherSDNode : public VPGatherScatterSDNode {
2801 public:
2802   friend class SelectionDAG;
2803 
2804   VPGatherSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT,
2805                  MachineMemOperand *MMO, ISD::MemIndexType IndexType)
2806       : VPGatherScatterSDNode(ISD::VP_GATHER, Order, dl, VTs, MemVT, MMO,
2807                               IndexType) {}
2808 
2809   static bool classof(const SDNode *N) {
2810     return N->getOpcode() == ISD::VP_GATHER;
2811   }
2812 };
2813 
2814 /// This class is used to represent an VP_SCATTER node
2815 ///
2816 class VPScatterSDNode : public VPGatherScatterSDNode {
2817 public:
2818   friend class SelectionDAG;
2819 
2820   VPScatterSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT,
2821                   MachineMemOperand *MMO, ISD::MemIndexType IndexType)
2822       : VPGatherScatterSDNode(ISD::VP_SCATTER, Order, dl, VTs, MemVT, MMO,
2823                               IndexType) {}
2824 
2825   const SDValue &getValue() const { return getOperand(1); }
2826 
2827   static bool classof(const SDNode *N) {
2828     return N->getOpcode() == ISD::VP_SCATTER;
2829   }
2830 };
2831 
2832 /// This is a base class used to represent
2833 /// MGATHER and MSCATTER nodes
2834 ///
2835 class MaskedGatherScatterSDNode : public MemSDNode {
2836 public:
2837   friend class SelectionDAG;
2838 
2839   MaskedGatherScatterSDNode(ISD::NodeType NodeTy, unsigned Order,
2840                             const DebugLoc &dl, SDVTList VTs, EVT MemVT,
2841                             MachineMemOperand *MMO, ISD::MemIndexType IndexType)
2842       : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
2843     LSBaseSDNodeBits.AddressingMode = IndexType;
2844     assert(getIndexType() == IndexType && "Value truncated");
2845   }
2846 
2847   /// How is Index applied to BasePtr when computing addresses.
2848   ISD::MemIndexType getIndexType() const {
2849     return static_cast<ISD::MemIndexType>(LSBaseSDNodeBits.AddressingMode);
2850   }
2851   bool isIndexScaled() const {
2852     return !cast<ConstantSDNode>(getScale())->isOne();
2853   }
2854   bool isIndexSigned() const { return isIndexTypeSigned(getIndexType()); }
2855 
2856   // In the both nodes address is Op1, mask is Op2:
2857   // MaskedGatherSDNode  (Chain, passthru, mask, base, index, scale)
2858   // MaskedScatterSDNode (Chain, value, mask, base, index, scale)
2859   // Mask is a vector of i1 elements
2860   const SDValue &getBasePtr() const { return getOperand(3); }
2861   const SDValue &getIndex()   const { return getOperand(4); }
2862   const SDValue &getMask()    const { return getOperand(2); }
2863   const SDValue &getScale()   const { return getOperand(5); }
2864 
2865   static bool classof(const SDNode *N) {
2866     return N->getOpcode() == ISD::MGATHER ||
2867            N->getOpcode() == ISD::MSCATTER;
2868   }
2869 };
2870 
2871 /// This class is used to represent an MGATHER node
2872 ///
2873 class MaskedGatherSDNode : public MaskedGatherScatterSDNode {
2874 public:
2875   friend class SelectionDAG;
2876 
2877   MaskedGatherSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
2878                      EVT MemVT, MachineMemOperand *MMO,
2879                      ISD::MemIndexType IndexType, ISD::LoadExtType ETy)
2880       : MaskedGatherScatterSDNode(ISD::MGATHER, Order, dl, VTs, MemVT, MMO,
2881                                   IndexType) {
2882     LoadSDNodeBits.ExtTy = ETy;
2883   }
2884 
2885   const SDValue &getPassThru() const { return getOperand(1); }
2886 
2887   ISD::LoadExtType getExtensionType() const {
2888     return ISD::LoadExtType(LoadSDNodeBits.ExtTy);
2889   }
2890 
2891   static bool classof(const SDNode *N) {
2892     return N->getOpcode() == ISD::MGATHER;
2893   }
2894 };
2895 
2896 /// This class is used to represent an MSCATTER node
2897 ///
2898 class MaskedScatterSDNode : public MaskedGatherScatterSDNode {
2899 public:
2900   friend class SelectionDAG;
2901 
2902   MaskedScatterSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
2903                       EVT MemVT, MachineMemOperand *MMO,
2904                       ISD::MemIndexType IndexType, bool IsTrunc)
2905       : MaskedGatherScatterSDNode(ISD::MSCATTER, Order, dl, VTs, MemVT, MMO,
2906                                   IndexType) {
2907     StoreSDNodeBits.IsTruncating = IsTrunc;
2908   }
2909 
2910   /// Return true if the op does a truncation before store.
2911   /// For integers this is the same as doing a TRUNCATE and storing the result.
2912   /// For floats, it is the same as doing an FP_ROUND and storing the result.
2913   bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; }
2914 
2915   const SDValue &getValue() const { return getOperand(1); }
2916 
2917   static bool classof(const SDNode *N) {
2918     return N->getOpcode() == ISD::MSCATTER;
2919   }
2920 };
2921 
2922 class FPStateAccessSDNode : public MemSDNode {
2923 public:
2924   friend class SelectionDAG;
2925 
2926   FPStateAccessSDNode(unsigned NodeTy, unsigned Order, const DebugLoc &dl,
2927                       SDVTList VTs, EVT MemVT, MachineMemOperand *MMO)
2928       : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
2929     assert((NodeTy == ISD::GET_FPENV_MEM || NodeTy == ISD::SET_FPENV_MEM) &&
2930            "Expected FP state access node");
2931   }
2932 
2933   static bool classof(const SDNode *N) {
2934     return N->getOpcode() == ISD::GET_FPENV_MEM ||
2935            N->getOpcode() == ISD::SET_FPENV_MEM;
2936   }
2937 };
2938 
2939 /// An SDNode that represents everything that will be needed
2940 /// to construct a MachineInstr. These nodes are created during the
2941 /// instruction selection proper phase.
2942 ///
2943 /// Note that the only supported way to set the `memoperands` is by calling the
2944 /// `SelectionDAG::setNodeMemRefs` function as the memory management happens
2945 /// inside the DAG rather than in the node.
2946 class MachineSDNode : public SDNode {
2947 private:
2948   friend class SelectionDAG;
2949 
2950   MachineSDNode(unsigned Opc, unsigned Order, const DebugLoc &DL, SDVTList VTs)
2951       : SDNode(Opc, Order, DL, VTs) {}
2952 
2953   // We use a pointer union between a single `MachineMemOperand` pointer and
2954   // a pointer to an array of `MachineMemOperand` pointers. This is null when
2955   // the number of these is zero, the single pointer variant used when the
2956   // number is one, and the array is used for larger numbers.
2957   //
2958   // The array is allocated via the `SelectionDAG`'s allocator and so will
2959   // always live until the DAG is cleaned up and doesn't require ownership here.
2960   //
2961   // We can't use something simpler like `TinyPtrVector` here because `SDNode`
2962   // subclasses aren't managed in a conforming C++ manner. See the comments on
2963   // `SelectionDAG::MorphNodeTo` which details what all goes on, but the
2964   // constraint here is that these don't manage memory with their constructor or
2965   // destructor and can be initialized to a good state even if they start off
2966   // uninitialized.
2967   PointerUnion<MachineMemOperand *, MachineMemOperand **> MemRefs = {};
2968 
2969   // Note that this could be folded into the above `MemRefs` member if doing so
2970   // is advantageous at some point. We don't need to store this in most cases.
2971   // However, at the moment this doesn't appear to make the allocation any
2972   // smaller and makes the code somewhat simpler to read.
2973   int NumMemRefs = 0;
2974 
2975 public:
2976   using mmo_iterator = ArrayRef<MachineMemOperand *>::const_iterator;
2977 
2978   ArrayRef<MachineMemOperand *> memoperands() const {
2979     // Special case the common cases.
2980     if (NumMemRefs == 0)
2981       return {};
2982     if (NumMemRefs == 1)
2983       return ArrayRef(MemRefs.getAddrOfPtr1(), 1);
2984 
2985     // Otherwise we have an actual array.
2986     return ArrayRef(cast<MachineMemOperand **>(MemRefs), NumMemRefs);
2987   }
2988   mmo_iterator memoperands_begin() const { return memoperands().begin(); }
2989   mmo_iterator memoperands_end() const { return memoperands().end(); }
2990   bool memoperands_empty() const { return memoperands().empty(); }
2991 
2992   /// Clear out the memory reference descriptor list.
2993   void clearMemRefs() {
2994     MemRefs = nullptr;
2995     NumMemRefs = 0;
2996   }
2997 
2998   static bool classof(const SDNode *N) {
2999     return N->isMachineOpcode();
3000   }
3001 };
3002 
3003 /// An SDNode that records if a register contains a value that is guaranteed to
3004 /// be aligned accordingly.
3005 class AssertAlignSDNode : public SDNode {
3006   Align Alignment;
3007 
3008 public:
3009   AssertAlignSDNode(unsigned Order, const DebugLoc &DL, EVT VT, Align A)
3010       : SDNode(ISD::AssertAlign, Order, DL, getSDVTList(VT)), Alignment(A) {}
3011 
3012   Align getAlign() const { return Alignment; }
3013 
3014   static bool classof(const SDNode *N) {
3015     return N->getOpcode() == ISD::AssertAlign;
3016   }
3017 };
3018 
3019 class SDNodeIterator {
3020   const SDNode *Node;
3021   unsigned Operand;
3022 
3023   SDNodeIterator(const SDNode *N, unsigned Op) : Node(N), Operand(Op) {}
3024 
3025 public:
3026   using iterator_category = std::forward_iterator_tag;
3027   using value_type = SDNode;
3028   using difference_type = std::ptrdiff_t;
3029   using pointer = value_type *;
3030   using reference = value_type &;
3031 
3032   bool operator==(const SDNodeIterator& x) const {
3033     return Operand == x.Operand;
3034   }
3035   bool operator!=(const SDNodeIterator& x) const { return !operator==(x); }
3036 
3037   pointer operator*() const {
3038     return Node->getOperand(Operand).getNode();
3039   }
3040   pointer operator->() const { return operator*(); }
3041 
3042   SDNodeIterator& operator++() {                // Preincrement
3043     ++Operand;
3044     return *this;
3045   }
3046   SDNodeIterator operator++(int) { // Postincrement
3047     SDNodeIterator tmp = *this; ++*this; return tmp;
3048   }
3049   size_t operator-(SDNodeIterator Other) const {
3050     assert(Node == Other.Node &&
3051            "Cannot compare iterators of two different nodes!");
3052     return Operand - Other.Operand;
3053   }
3054 
3055   static SDNodeIterator begin(const SDNode *N) { return SDNodeIterator(N, 0); }
3056   static SDNodeIterator end  (const SDNode *N) {
3057     return SDNodeIterator(N, N->getNumOperands());
3058   }
3059 
3060   unsigned getOperand() const { return Operand; }
3061   const SDNode *getNode() const { return Node; }
3062 };
3063 
3064 template <> struct GraphTraits<SDNode*> {
3065   using NodeRef = SDNode *;
3066   using ChildIteratorType = SDNodeIterator;
3067 
3068   static NodeRef getEntryNode(SDNode *N) { return N; }
3069 
3070   static ChildIteratorType child_begin(NodeRef N) {
3071     return SDNodeIterator::begin(N);
3072   }
3073 
3074   static ChildIteratorType child_end(NodeRef N) {
3075     return SDNodeIterator::end(N);
3076   }
3077 };
3078 
3079 /// A representation of the largest SDNode, for use in sizeof().
3080 ///
3081 /// This needs to be a union because the largest node differs on 32 bit systems
3082 /// with 4 and 8 byte pointer alignment, respectively.
3083 using LargestSDNode = AlignedCharArrayUnion<AtomicSDNode, TargetIndexSDNode,
3084                                             BlockAddressSDNode,
3085                                             GlobalAddressSDNode,
3086                                             PseudoProbeSDNode>;
3087 
3088 /// The SDNode class with the greatest alignment requirement.
3089 using MostAlignedSDNode = GlobalAddressSDNode;
3090 
3091 namespace ISD {
3092 
3093   /// Returns true if the specified node is a non-extending and unindexed load.
3094   inline bool isNormalLoad(const SDNode *N) {
3095     auto *Ld = dyn_cast<LoadSDNode>(N);
3096     return Ld && Ld->getExtensionType() == ISD::NON_EXTLOAD &&
3097            Ld->getAddressingMode() == ISD::UNINDEXED;
3098   }
3099 
3100   /// Returns true if the specified node is a non-extending load.
3101   inline bool isNON_EXTLoad(const SDNode *N) {
3102     auto *Ld = dyn_cast<LoadSDNode>(N);
3103     return Ld && Ld->getExtensionType() == ISD::NON_EXTLOAD;
3104   }
3105 
3106   /// Returns true if the specified node is a EXTLOAD.
3107   inline bool isEXTLoad(const SDNode *N) {
3108     auto *Ld = dyn_cast<LoadSDNode>(N);
3109     return Ld && Ld->getExtensionType() == ISD::EXTLOAD;
3110   }
3111 
3112   /// Returns true if the specified node is a SEXTLOAD.
3113   inline bool isSEXTLoad(const SDNode *N) {
3114     auto *Ld = dyn_cast<LoadSDNode>(N);
3115     return Ld && Ld->getExtensionType() == ISD::SEXTLOAD;
3116   }
3117 
3118   /// Returns true if the specified node is a ZEXTLOAD.
3119   inline bool isZEXTLoad(const SDNode *N) {
3120     auto *Ld = dyn_cast<LoadSDNode>(N);
3121     return Ld && Ld->getExtensionType() == ISD::ZEXTLOAD;
3122   }
3123 
3124   /// Returns true if the specified node is an unindexed load.
3125   inline bool isUNINDEXEDLoad(const SDNode *N) {
3126     auto *Ld = dyn_cast<LoadSDNode>(N);
3127     return Ld && Ld->getAddressingMode() == ISD::UNINDEXED;
3128   }
3129 
3130   /// Returns true if the specified node is a non-truncating
3131   /// and unindexed store.
3132   inline bool isNormalStore(const SDNode *N) {
3133     auto *St = dyn_cast<StoreSDNode>(N);
3134     return St && !St->isTruncatingStore() &&
3135            St->getAddressingMode() == ISD::UNINDEXED;
3136   }
3137 
3138   /// Returns true if the specified node is an unindexed store.
3139   inline bool isUNINDEXEDStore(const SDNode *N) {
3140     auto *St = dyn_cast<StoreSDNode>(N);
3141     return St && St->getAddressingMode() == ISD::UNINDEXED;
3142   }
3143 
3144   /// Attempt to match a unary predicate against a scalar/splat constant or
3145   /// every element of a constant BUILD_VECTOR.
3146   /// If AllowUndef is true, then UNDEF elements will pass nullptr to Match.
3147   template <typename ConstNodeType>
3148   bool matchUnaryPredicateImpl(SDValue Op,
3149                                std::function<bool(ConstNodeType *)> Match,
3150                                bool AllowUndefs = false);
3151 
3152   /// Hook for matching ConstantSDNode predicate
3153   inline bool matchUnaryPredicate(SDValue Op,
3154                                   std::function<bool(ConstantSDNode *)> Match,
3155                                   bool AllowUndefs = false) {
3156     return matchUnaryPredicateImpl<ConstantSDNode>(Op, Match, AllowUndefs);
3157   }
3158 
3159   /// Hook for matching ConstantFPSDNode predicate
3160   inline bool
3161   matchUnaryFpPredicate(SDValue Op,
3162                         std::function<bool(ConstantFPSDNode *)> Match,
3163                         bool AllowUndefs = false) {
3164     return matchUnaryPredicateImpl<ConstantFPSDNode>(Op, Match, AllowUndefs);
3165   }
3166 
3167   /// Attempt to match a binary predicate against a pair of scalar/splat
3168   /// constants or every element of a pair of constant BUILD_VECTORs.
3169   /// If AllowUndef is true, then UNDEF elements will pass nullptr to Match.
3170   /// If AllowTypeMismatch is true then RetType + ArgTypes don't need to match.
3171   bool matchBinaryPredicate(
3172       SDValue LHS, SDValue RHS,
3173       std::function<bool(ConstantSDNode *, ConstantSDNode *)> Match,
3174       bool AllowUndefs = false, bool AllowTypeMismatch = false);
3175 
3176   /// Returns true if the specified value is the overflow result from one
3177   /// of the overflow intrinsic nodes.
3178   inline bool isOverflowIntrOpRes(SDValue Op) {
3179     unsigned Opc = Op.getOpcode();
3180     return (Op.getResNo() == 1 &&
3181             (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO ||
3182              Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO));
3183   }
3184 
3185 } // end namespace ISD
3186 
3187 } // end namespace llvm
3188 
3189 #endif // LLVM_CODEGEN_SELECTIONDAGNODES_H
3190