181ad6265SDimitry Andric //==-- llvm/CodeGen/RegisterBank.h - Register Bank ---------------*- C++ -*-==// 281ad6265SDimitry Andric // 381ad6265SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 481ad6265SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 581ad6265SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 681ad6265SDimitry Andric // 781ad6265SDimitry Andric //===----------------------------------------------------------------------===// 881ad6265SDimitry Andric // 981ad6265SDimitry Andric /// \file This file declares the API of register banks. 1081ad6265SDimitry Andric // 1181ad6265SDimitry Andric //===----------------------------------------------------------------------===// 1281ad6265SDimitry Andric 1381ad6265SDimitry Andric #ifndef LLVM_CODEGEN_REGISTERBANK_H 1481ad6265SDimitry Andric #define LLVM_CODEGEN_REGISTERBANK_H 1581ad6265SDimitry Andric 1681ad6265SDimitry Andric #include "llvm/ADT/BitVector.h" 1781ad6265SDimitry Andric 1881ad6265SDimitry Andric namespace llvm { 1981ad6265SDimitry Andric // Forward declarations. 2081ad6265SDimitry Andric class RegisterBankInfo; 2181ad6265SDimitry Andric class raw_ostream; 2281ad6265SDimitry Andric class TargetRegisterClass; 2381ad6265SDimitry Andric class TargetRegisterInfo; 2481ad6265SDimitry Andric 2581ad6265SDimitry Andric /// This class implements the register bank concept. 2681ad6265SDimitry Andric /// Two instances of RegisterBank must have different ID. 2781ad6265SDimitry Andric /// This property is enforced by the RegisterBankInfo class. 2881ad6265SDimitry Andric class RegisterBank { 2981ad6265SDimitry Andric private: 3081ad6265SDimitry Andric unsigned ID; 3181ad6265SDimitry Andric const char *Name; 3281ad6265SDimitry Andric BitVector ContainedRegClasses; 3381ad6265SDimitry Andric 3481ad6265SDimitry Andric /// Sentinel value used to recognize register bank not properly 3581ad6265SDimitry Andric /// initialized yet. 3681ad6265SDimitry Andric static const unsigned InvalidID; 3781ad6265SDimitry Andric 3881ad6265SDimitry Andric /// Only the RegisterBankInfo can initialize RegisterBank properly. 3981ad6265SDimitry Andric friend RegisterBankInfo; 4081ad6265SDimitry Andric 4181ad6265SDimitry Andric public: 42*06c3fb27SDimitry Andric RegisterBank(unsigned ID, const char *Name, const uint32_t *CoveredClasses, 43*06c3fb27SDimitry Andric unsigned NumRegClasses); 4481ad6265SDimitry Andric 4581ad6265SDimitry Andric /// Get the identifier of this register bank. 4681ad6265SDimitry Andric unsigned getID() const { return ID; } 4781ad6265SDimitry Andric 4881ad6265SDimitry Andric /// Get a user friendly name of this register bank. 4981ad6265SDimitry Andric /// Should be used only for debugging purposes. 5081ad6265SDimitry Andric const char *getName() const { return Name; } 5181ad6265SDimitry Andric 5281ad6265SDimitry Andric /// Check whether this instance is ready to be used. 5381ad6265SDimitry Andric bool isValid() const; 5481ad6265SDimitry Andric 5581ad6265SDimitry Andric /// Check if this register bank is valid. In other words, 5681ad6265SDimitry Andric /// if it has been properly constructed. 5781ad6265SDimitry Andric /// 5881ad6265SDimitry Andric /// \note This method does not check anything when assertions are disabled. 5981ad6265SDimitry Andric /// 6081ad6265SDimitry Andric /// \return True is the check was successful. 61*06c3fb27SDimitry Andric bool verify(const RegisterBankInfo &RBI, const TargetRegisterInfo &TRI) const; 6281ad6265SDimitry Andric 6381ad6265SDimitry Andric /// Check whether this register bank covers \p RC. 6481ad6265SDimitry Andric /// In other words, check if this register bank fully covers 6581ad6265SDimitry Andric /// the registers that \p RC contains. 6681ad6265SDimitry Andric /// \pre isValid() 6781ad6265SDimitry Andric bool covers(const TargetRegisterClass &RC) const; 6881ad6265SDimitry Andric 6981ad6265SDimitry Andric /// Check whether \p OtherRB is the same as this. 7081ad6265SDimitry Andric bool operator==(const RegisterBank &OtherRB) const; 7181ad6265SDimitry Andric bool operator!=(const RegisterBank &OtherRB) const { 7281ad6265SDimitry Andric return !this->operator==(OtherRB); 7381ad6265SDimitry Andric } 7481ad6265SDimitry Andric 7581ad6265SDimitry Andric /// Dump the register mask on dbgs() stream. 7681ad6265SDimitry Andric /// The dump is verbose. 7781ad6265SDimitry Andric void dump(const TargetRegisterInfo *TRI = nullptr) const; 7881ad6265SDimitry Andric 7981ad6265SDimitry Andric /// Print the register mask on OS. 8081ad6265SDimitry Andric /// If IsForDebug is false, then only the name of the register bank 8181ad6265SDimitry Andric /// is printed. Otherwise, all the fields are printing. 8281ad6265SDimitry Andric /// TRI is then used to print the name of the register classes that 8381ad6265SDimitry Andric /// this register bank covers. 8481ad6265SDimitry Andric void print(raw_ostream &OS, bool IsForDebug = false, 8581ad6265SDimitry Andric const TargetRegisterInfo *TRI = nullptr) const; 8681ad6265SDimitry Andric }; 8781ad6265SDimitry Andric 8881ad6265SDimitry Andric inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) { 8981ad6265SDimitry Andric RegBank.print(OS); 9081ad6265SDimitry Andric return OS; 9181ad6265SDimitry Andric } 9281ad6265SDimitry Andric } // End namespace llvm. 9381ad6265SDimitry Andric 9481ad6265SDimitry Andric #endif 95