1 //===- Target.h -------------------------------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef LLD_ELF_TARGET_H 10 #define LLD_ELF_TARGET_H 11 12 #include "InputSection.h" 13 #include "lld/Common/ErrorHandler.h" 14 #include "llvm/Object/ELF.h" 15 #include "llvm/Support/MathExtras.h" 16 #include <array> 17 18 namespace lld { 19 std::string toString(elf::RelType type); 20 21 namespace elf { 22 class Defined; 23 class InputFile; 24 class Symbol; 25 26 class TargetInfo { 27 public: 28 virtual uint32_t calcEFlags() const { return 0; } 29 virtual RelExpr getRelExpr(RelType type, const Symbol &s, 30 const uint8_t *loc) const = 0; 31 virtual RelType getDynRel(RelType type) const { return 0; } 32 virtual void writeGotPltHeader(uint8_t *buf) const {} 33 virtual void writeGotHeader(uint8_t *buf) const {} 34 virtual void writeGotPlt(uint8_t *buf, const Symbol &s) const {}; 35 virtual void writeIgotPlt(uint8_t *buf, const Symbol &s) const {} 36 virtual int64_t getImplicitAddend(const uint8_t *buf, RelType type) const; 37 virtual int getTlsGdRelaxSkip(RelType type) const { return 1; } 38 39 // If lazy binding is supported, the first entry of the PLT has code 40 // to call the dynamic linker to resolve PLT entries the first time 41 // they are called. This function writes that code. 42 virtual void writePltHeader(uint8_t *buf) const {} 43 44 virtual void writePlt(uint8_t *buf, const Symbol &sym, 45 uint64_t pltEntryAddr) const {} 46 virtual void writeIplt(uint8_t *buf, const Symbol &sym, 47 uint64_t pltEntryAddr) const { 48 // All but PPC32 and PPC64 use the same format for .plt and .iplt entries. 49 writePlt(buf, sym, pltEntryAddr); 50 } 51 virtual void writeIBTPlt(uint8_t *buf, size_t numEntries) const {} 52 virtual void addPltHeaderSymbols(InputSection &isec) const {} 53 virtual void addPltSymbols(InputSection &isec, uint64_t off) const {} 54 55 // Returns true if a relocation only uses the low bits of a value such that 56 // all those bits are in the same page. For example, if the relocation 57 // only uses the low 12 bits in a system with 4k pages. If this is true, the 58 // bits will always have the same value at runtime and we don't have to emit 59 // a dynamic relocation. 60 virtual bool usesOnlyLowPageBits(RelType type) const; 61 62 // Decide whether a Thunk is needed for the relocation from File 63 // targeting S. 64 virtual bool needsThunk(RelExpr expr, RelType relocType, 65 const InputFile *file, uint64_t branchAddr, 66 const Symbol &s, int64_t a) const; 67 68 // On systems with range extensions we place collections of Thunks at 69 // regular spacings that enable the majority of branches reach the Thunks. 70 // a value of 0 means range extension thunks are not supported. 71 virtual uint32_t getThunkSectionSpacing() const { return 0; } 72 73 // The function with a prologue starting at Loc was compiled with 74 // -fsplit-stack and it calls a function compiled without. Adjust the prologue 75 // to do the right thing. See https://gcc.gnu.org/wiki/SplitStacks. 76 // The symbols st_other flags are needed on PowerPC64 for determining the 77 // offset to the split-stack prologue. 78 virtual bool adjustPrologueForCrossSplitStack(uint8_t *loc, uint8_t *end, 79 uint8_t stOther) const; 80 81 // Return true if we can reach dst from src with RelType type. 82 virtual bool inBranchRange(RelType type, uint64_t src, 83 uint64_t dst) const; 84 85 virtual void relocateOne(uint8_t *loc, RelType type, uint64_t val) const = 0; 86 87 virtual ~TargetInfo(); 88 89 unsigned defaultCommonPageSize = 4096; 90 unsigned defaultMaxPageSize = 4096; 91 92 uint64_t getImageBase() const; 93 94 // True if _GLOBAL_OFFSET_TABLE_ is relative to .got.plt, false if .got. 95 bool gotBaseSymInGotPlt = true; 96 97 RelType copyRel; 98 RelType gotRel; 99 RelType noneRel; 100 RelType pltRel; 101 RelType relativeRel; 102 RelType iRelativeRel; 103 RelType symbolicRel; 104 RelType tlsDescRel; 105 RelType tlsGotRel; 106 RelType tlsModuleIndexRel; 107 RelType tlsOffsetRel; 108 unsigned pltEntrySize; 109 unsigned pltHeaderSize; 110 unsigned ipltEntrySize; 111 112 // At least on x86_64 positions 1 and 2 are used by the first plt entry 113 // to support lazy loading. 114 unsigned gotPltHeaderEntriesNum = 3; 115 116 // On PPC ELF V2 abi, the first entry in the .got is the .TOC. 117 unsigned gotHeaderEntriesNum = 0; 118 119 bool needsThunks = false; 120 121 // A 4-byte field corresponding to one or more trap instructions, used to pad 122 // executable OutputSections. 123 std::array<uint8_t, 4> trapInstr; 124 125 // If a target needs to rewrite calls to __morestack to instead call 126 // __morestack_non_split when a split-stack enabled caller calls a 127 // non-split-stack callee this will return true. Otherwise returns false. 128 bool needsMoreStackNonSplit = true; 129 130 virtual RelExpr adjustRelaxExpr(RelType type, const uint8_t *data, 131 RelExpr expr) const; 132 virtual void relaxGot(uint8_t *loc, RelType type, uint64_t val) const; 133 virtual void relaxTlsGdToIe(uint8_t *loc, RelType type, uint64_t val) const; 134 virtual void relaxTlsGdToLe(uint8_t *loc, RelType type, uint64_t val) const; 135 virtual void relaxTlsIeToLe(uint8_t *loc, RelType type, uint64_t val) const; 136 virtual void relaxTlsLdToLe(uint8_t *loc, RelType type, uint64_t val) const; 137 138 protected: 139 // On FreeBSD x86_64 the first page cannot be mmaped. 140 // On Linux this is controlled by vm.mmap_min_addr. At least on some x86_64 141 // installs this is set to 65536, so the first 15 pages cannot be used. 142 // Given that, the smallest value that can be used in here is 0x10000. 143 uint64_t defaultImageBase = 0x10000; 144 }; 145 146 TargetInfo *getAArch64TargetInfo(); 147 TargetInfo *getAMDGPUTargetInfo(); 148 TargetInfo *getARMTargetInfo(); 149 TargetInfo *getAVRTargetInfo(); 150 TargetInfo *getHexagonTargetInfo(); 151 TargetInfo *getMSP430TargetInfo(); 152 TargetInfo *getPPC64TargetInfo(); 153 TargetInfo *getPPCTargetInfo(); 154 TargetInfo *getRISCVTargetInfo(); 155 TargetInfo *getSPARCV9TargetInfo(); 156 TargetInfo *getX86TargetInfo(); 157 TargetInfo *getX86_64TargetInfo(); 158 template <class ELFT> TargetInfo *getMipsTargetInfo(); 159 160 struct ErrorPlace { 161 InputSectionBase *isec; 162 std::string loc; 163 }; 164 165 // Returns input section and corresponding source string for the given location. 166 ErrorPlace getErrorPlace(const uint8_t *loc); 167 168 static inline std::string getErrorLocation(const uint8_t *loc) { 169 return getErrorPlace(loc).loc; 170 } 171 172 void writePPC32GlinkSection(uint8_t *buf, size_t numEntries); 173 174 bool tryRelaxPPC64TocIndirection(RelType type, const Relocation &rel, 175 uint8_t *bufLoc); 176 unsigned getPPCDFormOp(unsigned secondaryOp); 177 178 // In the PowerPC64 Elf V2 abi a function can have 2 entry points. The first 179 // is a global entry point (GEP) which typically is used to initialize the TOC 180 // pointer in general purpose register 2. The second is a local entry 181 // point (LEP) which bypasses the TOC pointer initialization code. The 182 // offset between GEP and LEP is encoded in a function's st_other flags. 183 // This function will return the offset (in bytes) from the global entry-point 184 // to the local entry-point. 185 unsigned getPPC64GlobalEntryToLocalEntryOffset(uint8_t stOther); 186 187 // Returns true if a relocation is a small code model relocation that accesses 188 // the .toc section. 189 bool isPPC64SmallCodeModelTocReloc(RelType type); 190 191 uint64_t getPPC64TocBase(); 192 uint64_t getAArch64Page(uint64_t expr); 193 194 extern const TargetInfo *target; 195 TargetInfo *getTarget(); 196 197 template <class ELFT> bool isMipsPIC(const Defined *sym); 198 199 static inline void reportRangeError(uint8_t *loc, RelType type, const Twine &v, 200 int64_t min, uint64_t max) { 201 ErrorPlace errPlace = getErrorPlace(loc); 202 StringRef hint; 203 if (errPlace.isec && errPlace.isec->name.startswith(".debug")) 204 hint = "; consider recompiling with -fdebug-types-section to reduce size " 205 "of debug sections"; 206 207 errorOrWarn(errPlace.loc + "relocation " + lld::toString(type) + 208 " out of range: " + v.str() + " is not in [" + Twine(min).str() + 209 ", " + Twine(max).str() + "]" + hint); 210 } 211 212 // Make sure that V can be represented as an N bit signed integer. 213 inline void checkInt(uint8_t *loc, int64_t v, int n, RelType type) { 214 if (v != llvm::SignExtend64(v, n)) 215 reportRangeError(loc, type, Twine(v), llvm::minIntN(n), llvm::maxIntN(n)); 216 } 217 218 // Make sure that V can be represented as an N bit unsigned integer. 219 inline void checkUInt(uint8_t *loc, uint64_t v, int n, RelType type) { 220 if ((v >> n) != 0) 221 reportRangeError(loc, type, Twine(v), 0, llvm::maxUIntN(n)); 222 } 223 224 // Make sure that V can be represented as an N bit signed or unsigned integer. 225 inline void checkIntUInt(uint8_t *loc, uint64_t v, int n, RelType type) { 226 // For the error message we should cast V to a signed integer so that error 227 // messages show a small negative value rather than an extremely large one 228 if (v != (uint64_t)llvm::SignExtend64(v, n) && (v >> n) != 0) 229 reportRangeError(loc, type, Twine((int64_t)v), llvm::minIntN(n), 230 llvm::maxUIntN(n)); 231 } 232 233 inline void checkAlignment(uint8_t *loc, uint64_t v, int n, RelType type) { 234 if ((v & (n - 1)) != 0) 235 error(getErrorLocation(loc) + "improper alignment for relocation " + 236 lld::toString(type) + ": 0x" + llvm::utohexstr(v) + 237 " is not aligned to " + Twine(n) + " bytes"); 238 } 239 240 // Endianness-aware read/write. 241 inline uint16_t read16(const void *p) { 242 return llvm::support::endian::read16(p, config->endianness); 243 } 244 245 inline uint32_t read32(const void *p) { 246 return llvm::support::endian::read32(p, config->endianness); 247 } 248 249 inline uint64_t read64(const void *p) { 250 return llvm::support::endian::read64(p, config->endianness); 251 } 252 253 inline void write16(void *p, uint16_t v) { 254 llvm::support::endian::write16(p, v, config->endianness); 255 } 256 257 inline void write32(void *p, uint32_t v) { 258 llvm::support::endian::write32(p, v, config->endianness); 259 } 260 261 inline void write64(void *p, uint64_t v) { 262 llvm::support::endian::write64(p, v, config->endianness); 263 } 264 } // namespace elf 265 } // namespace lld 266 267 #endif 268