xref: /freebsd/contrib/arm-optimized-routines/pl/math/sv_log10f_3u5.c (revision 9247238cc4b8835892a47701136b0fd073f8d67c)
1 /*
2  * Single-precision SVE log10 function.
3  *
4  * Copyright (c) 2022-2023, Arm Limited.
5  * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6  */
7 
8 #include "sv_math.h"
9 #include "pl_sig.h"
10 #include "pl_test.h"
11 
12 #if SV_SUPPORTED
13 
14 #define SpecialCaseMin 0x00800000
15 #define SpecialCaseMax 0x7f800000
16 #define Offset 0x3f2aaaab /* 0.666667.  */
17 #define Mask 0x007fffff
18 #define Ln2 0x1.62e43p-1f /* 0x3f317218.  */
19 #define InvLn10 0x1.bcb7b2p-2f
20 
21 #define P(i) __v_log10f_poly[i]
22 
23 static NOINLINE sv_f32_t
24 special_case (sv_f32_t x, sv_f32_t y, svbool_t special)
25 {
26   return sv_call_f32 (log10f, x, y, special);
27 }
28 
29 /* Optimised implementation of SVE log10f using the same algorithm and
30    polynomial as v_log10f. Maximum error is 3.31ulps:
31    __sv_log10f(0x1.555c16p+0) got 0x1.ffe2fap-4
32 			     want 0x1.ffe2f4p-4.  */
33 sv_f32_t
34 __sv_log10f_x (sv_f32_t x, const svbool_t pg)
35 {
36   sv_u32_t ix = sv_as_u32_f32 (x);
37   svbool_t special_cases
38     = svcmpge_n_u32 (pg, svsub_n_u32_x (pg, ix, SpecialCaseMin),
39 		     SpecialCaseMax - SpecialCaseMin);
40 
41   /* x = 2^n * (1+r), where 2/3 < 1+r < 4/3.  */
42   ix = svsub_n_u32_x (pg, ix, Offset);
43   sv_f32_t n = sv_to_f32_s32_x (pg, svasr_n_s32_x (pg, sv_as_s32_u32 (ix),
44 						   23)); /* signextend.  */
45   ix = svand_n_u32_x (pg, ix, Mask);
46   ix = svadd_n_u32_x (pg, ix, Offset);
47   sv_f32_t r = svsub_n_f32_x (pg, sv_as_f32_u32 (ix), 1.0f);
48 
49   /* y = log10(1+r) + n*log10(2)
50      log10(1+r) ~ r * InvLn(10) + P(r)
51      where P(r) is a polynomial. Use order 9 for log10(1+x), i.e. order 8 for
52      log10(1+x)/x, with x in [-1/3, 1/3] (offset=2/3)
53 
54      P(r) = r2 * (Q01 + r2 * (Q23 + r2 * (Q45 + r2 * Q67)))
55      and Qij  = Pi + r * Pj.  */
56   sv_f32_t q12 = sv_fma_n_f32_x (pg, P (1), r, sv_f32 (P (0)));
57   sv_f32_t q34 = sv_fma_n_f32_x (pg, P (3), r, sv_f32 (P (2)));
58   sv_f32_t q56 = sv_fma_n_f32_x (pg, P (5), r, sv_f32 (P (4)));
59   sv_f32_t q78 = sv_fma_n_f32_x (pg, P (7), r, sv_f32 (P (6)));
60 
61   sv_f32_t r2 = svmul_f32_x (pg, r, r);
62   sv_f32_t y = sv_fma_f32_x (pg, q78, r2, q56);
63   y = sv_fma_f32_x (pg, y, r2, q34);
64   y = sv_fma_f32_x (pg, y, r2, q12);
65 
66   /* Using p = Log10(2)*n + r*InvLn(10) is slightly faster but less
67      accurate.  */
68   sv_f32_t p = sv_fma_n_f32_x (pg, Ln2, n, r);
69   y = sv_fma_f32_x (pg, y, r2, svmul_n_f32_x (pg, p, InvLn10));
70 
71   if (unlikely (svptest_any (pg, special_cases)))
72     {
73       return special_case (x, y, special_cases);
74     }
75   return y;
76 }
77 
78 PL_ALIAS (__sv_log10f_x, _ZGVsMxv_log10f)
79 
80 PL_SIG (SV, F, 1, log10, 0.01, 11.1)
81 PL_TEST_ULP (__sv_log10f, 2.82)
82 PL_TEST_INTERVAL (__sv_log10f, -0.0, -0x1p126, 100)
83 PL_TEST_INTERVAL (__sv_log10f, 0x1p-149, 0x1p-126, 4000)
84 PL_TEST_INTERVAL (__sv_log10f, 0x1p-126, 0x1p-23, 50000)
85 PL_TEST_INTERVAL (__sv_log10f, 0x1p-23, 1.0, 50000)
86 PL_TEST_INTERVAL (__sv_log10f, 1.0, 100, 50000)
87 PL_TEST_INTERVAL (__sv_log10f, 100, inf, 50000)
88 #endif
89