Searched refs:PCH_DP_AUX_CH_CTL (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_dp_aux_regs.h | 33 #define PCH_DP_AUX_CH_CTL(aux_ch) _MMIO_PORT((aux_ch) - AUX_CH_B, _PCH_DPB_AUX_CH_CTL, _PCH_DPC_AUX… macro
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| H A D | intel_dp_aux.c | 618 return PCH_DP_AUX_CH_CTL(aux_ch); in ilk_aux_ctl_reg()
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| /linux/drivers/gpu/drm/i915/gvt/ |
| H A D | handlers.c | 1088 else if (reg == i915_mmio_reg_offset(PCH_DP_AUX_CH_CTL(AUX_CH_B)) || in trigger_aux_channel_interrupt()
1091 else if (reg == i915_mmio_reg_offset(PCH_DP_AUX_CH_CTL(AUX_CH_C)) || in trigger_aux_channel_interrupt()
1094 else if (reg == i915_mmio_reg_offset(PCH_DP_AUX_CH_CTL(AUX_CH_D)) || in trigger_aux_channel_interrupt()
1187 PCH_DP_AUX_CH_CTL(port_index) : in dp_aux_ch_ctl_mmio_write()
2305 MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_B), 6 * 4, 0, 0, 0, D_PRE_SKL, NULL, in init_generic_mmio_info()
2307 MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_C), 6 * 4, 0, 0, 0, D_PRE_SKL, NULL, in init_generic_mmio_info()
2309 MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_D), 6 * 4, 0, 0, 0, D_PRE_SKL, NULL, in init_generic_mmio_info()
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| /linux/drivers/gpu/drm/i915/ |
| H A D | intel_gvt_mmio_table.c | 891 MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_B), 6 * 4); in iterate_pre_skl_mmio()
892 MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_C), 6 * 4); in iterate_pre_skl_mmio()
893 MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_D), 6 * 4); in iterate_pre_skl_mmio()
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