Searched refs:HC_RISC_PAUSE (Results 1 – 3 of 3) sorted by relevance
294 if ((RD16_IO_REG(ha, hccr) & HC_RISC_PAUSE) != in ql_pci_sbus_config()316 if ((RD16_IO_REG(ha, hccr) & HC_RISC_PAUSE) == in ql_pci_sbus_config()3776 if ((RD16_IO_REG(ha, hccr) & HC_RISC_PAUSE) != 0) { in ql_reset_chip()3885 if ((RD16_IO_REG(ha, hccr) & HC_RISC_PAUSE) != 0) { in ql_reset_chip()
14216 while ((RD16_IO_REG(ha, hccr) & HC_RISC_PAUSE) == 0) { in ql_2200_binary_fw_dump()14328 while ((RD16_IO_REG(ha, hccr) & HC_RISC_PAUSE) == 0) { in ql_2200_binary_fw_dump()14420 while ((RD16_IO_REG(ha, hccr) & HC_RISC_PAUSE) == 0) { in ql_2300_binary_fw_dump()
808 #define HC_RISC_PAUSE BIT_5 /* Pause mode bit */ macro