Searched refs:Ext1SrcReg (Results 1 – 1 of 1) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PreLegalizerCombiner.cpp | 302 Register Ext1SrcReg = std::get<0>(MatchInfo); in applyExtAddvToUdotAddv() local
308 Ext2SrcReg = Builder.buildConstant(MRI.getType(Ext1SrcReg), 1) in applyExtAddvToUdotAddv()
315 LLT SrcTy = MRI.getType(Ext1SrcReg); in applyExtAddvToUdotAddv()
332 {Zeroes, Ext1SrcReg, Ext2SrcReg}); in applyExtAddvToUdotAddv()
345 if ((!extractParts(Ext1SrcReg, MRI.getType(Ext1SrcReg), MainTy, in applyExtAddvToUdotAddv()
373 extractParts(Ext1SrcReg, LLT::fixed_vector(16, 8), SrcNumElts / 16, in applyExtAddvToUdotAddv()
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