Searched +full:smmu +full:- +full:secure +full:- +full:config +full:- +full:access (Results 1 – 6 of 6) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/iommu/ |
| H A D | arm,smmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iommu/arm,smmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <will@kernel.org>
11 - Robin Murphy <Robin.Murphy@arm.com>
18 The SMMU may also raise interrupts in response to various fault
23 pattern: "^iommu@[0-9a-f]*"
26 - description: Qcom SoCs implementing "arm,smmu-v2"
28 - enum:
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| /freebsd/sys/contrib/device-tree/src/arm64/xilinx/ |
| H A D | zynqmp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2014 - 2021, Xilinx, Inc.
15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-bindings/power/xlnx-zynqmp-power.h>
20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
24 #address-cells = <2>;
25 #size-cells = <2>;
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| /freebsd/sys/contrib/alpine-hal/ |
| H A D | al_hal_nb_regs.h | 1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
101 /* [0x6c] Read-only that reflects CPU Cluster Local GIC base high address */
103 /* [0x70] Read-only that reflects CPU Cluster Local GIC base low address */
105 /* [0x74] Read-only that reflects the device's IOGIC base high address. */
107 /* [0x78] Read-only that reflects IOGIC base low address */
299 uint32_t config; member
480 /* Value read in the Cluster ID Affinity Level-1 field, bits[15:8], of the Multiprocessor Affinity
485 /* Value read in the Cluster ID Affinity Level-2 field, bits[23:16], of the Multiprocessor Affinity
504 /* Disable write access to some secure GIC registers */
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| /freebsd/sys/contrib/device-tree/src/arm64/arm/ |
| H A D | juno-base.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cells = <1>;
19 frame-number = <1>;
31 #mbox-cells = <1>;
33 clock-names = "apb_pclk";
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| /freebsd/sys/contrib/dev/acpica/include/ |
| H A D | actbl2.h | 3 * Name: actbl2.h - ACPI Table Definitions
11 * Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
108 * any of its subsidiaries will export/re-export any technical data, process,
130 * 3. Neither the names of the above-listed copyright holders nor the names
198 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */
199 #define ACPI_SIG_RIMT "RIMT" /* RISC-V IO Mapping Table */
202 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
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| /freebsd/sys/contrib/dev/acpica/ |
| H A D | changes.txt | 1 ----------------------------------------
6 Added option to skip the global lock for SMM - Huacai Chen
8 Fixed non-NUL terminated string implementations - Ahmed Salem
10 Fixed CCEL and CDAT templates - Ahmed Salem
12 …ethod parameters (definition) vs arguments (invocation) in different places - Peter Williams, Hans…
14 Define distinct D3 states (D3Hot and D3Cold) that help clarify the device behavior support - Aymeri…
19 ----------------------------------------
26 Add complete support for 3 new ACPI tables - MRRM,ERDT and RIMT (Tony Luck & V L Sunil)
32 A few fixes including local cache allocation, FFixedHW Region, attribute packing, string vs. non-st…
35 ----------------------------------------
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