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/linux/drivers/usb/serial/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
14 Please read <file:Documentation/usb/usb-serial.rst> for more
28 converter port as the system console (the system console is the
30 allows logins in single user mode). This could be useful if some
31 terminal or printer is connected to that serial port.
42 port, /dev/ttyUSB0, as system console.
50 read <file:Documentation/usb/usb-serial.rst> for more information on
61 - Suunto ANT+ USB device.
62 - Medtronic CareLink USB device
63 - Fundamental Software dongle.
[all …]
/linux/Documentation/devicetree/bindings/display/bridge/
H A Dthine,thc63lvd1024.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo+renesas@jmondi.org>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
15 streams to parallel data outputs. The chip supports single/dual input/output
19 Single or dual operation mode, output data mapping and DDR output modes are
30 The device can operate in single or dual input and output modes.
32 When operating in single input mode, all pixels are received on port@0,
33 and port@1 shall not contain any endpoint. In dual input mode,
[all …]
H A Dlontium,lt9211.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
13 The LT9211 are bridge devices which convert Single/Dual-Link DSI/LVDS
14 or Single DPI to Single/Dual-Link DSI/LVDS or Single DPI.
19 - lontium,lt9211
27 reset-gpios:
31 vccio-supply:
38 port@0:
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H A Dti,sn65dsi83.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
13 Texas Instruments SN65DSI83 1x Single-link MIPI DSI
14 to 1x Single-link LVDS
16 Texas Instruments SN65DSI84 1x Single-link MIPI DSI
17 to 1x Dual-link or 2x Single-link LVDS
23 - ti,sn65dsi83
24 - ti,sn65dsi84
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/linux/Documentation/usb/
H A Dusb-serial.rst44 ConnectTech WhiteHEAT 4 port converter
45 --------------------------------------
58 -----------------------------------------------
65 properly enumerated, assigned a port, and then communication _should_ be
72 This goes against the current documentation for pilot-xfer and other
76 When the device is connected, try talking to it on the second port
77 (this is usually /dev/ttyUSB1 if you do not have any other usb-serial
78 devices in the system.) The system log should tell you which port is
79 the port to use for the HotSync transfer. The "Generic" port can be used
85 kernel system log for information on which is the correct port to use.
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/linux/Documentation/scsi/
H A Dbfa.rst1 .. SPDX-License-Identifier: GPL-2.0
8 ------------------
16 1657:0013:1657:0014 425 4Gbps dual port FC HBA
17 1657:0013:1657:0014 825 8Gbps PCIe dual port FC HBA
18 1657:0013:103c:1742 HP 82B 8Gbps PCIedual port FC HBA
19 1657:0013:103c:1744 HP 42B 4Gbps dual port FC HBA
20 1657:0017:1657:0014 415 4Gbps single port FC HBA
21 1657:0017:1657:0014 815 8Gbps single port FC HBA
22 1657:0017:103c:1741 HP 41B 4Gbps single port FC HBA
23 1657:0017:103c 1743 HP 81B 8Gbps single port FC HBA
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Drenesas,rza1-ports.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rza1-ports.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo+renesas@jmondi.org>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
16 Pin multiplexing and GPIO configuration is performed on a per-pin basis
17 writing configuration values to per-port register sets.
18 Each "port" features up to 16 pins, each of them configurable for GPIO
19 function (port mode) or in alternate function mode.
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/linux/Documentation/ABI/stable/
H A Dsysfs-driver-ib_srp1 What: /sys/class/infiniband_srp/srp-<hca>-<port_number>/add_target
4 Contact: linux-rdma@vger.kernel.org
7 a comma-separated list of login parameters to this sysfs
10 * id_ext, a 16-digit hexadecimal number specifying the eight
11 byte identifier extension in the 16-byte SRP target port
12 identifier. The target port identifier is sent by ib_srp
14 * ioc_guid, a 16-digit hexadecimal number specifying the eight
15 byte I/O controller GUID portion of the 16-byte target port
17 * dgid, a 32-digit hexadecimal number specifying the
19 * pkey, a four-digit hexadecimal number specifying the
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/linux/arch/arm64/boot/dts/renesas/
H A Ddraak.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Renesas Electronics Corp.
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
21 audio_clkout: audio-clkout {
24 * but needed to avoid cs2000/rcar_sound probe dead-lock
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <12288000>;
32 compatible = "pwm-backlight";
[all …]
H A Debisu.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Ebisu/Ebisu-4D board
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
33 stdout-path = "serial0:115200n8";
36 audio_clkout: audio-clkout {
39 * but needed to avoid cs2000/rcar_sound probe dead-lock
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <11289600>;
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap4-panda-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-2013 Texas Instruments Incorporated - https://www.ti.com/
5 #include <dt-bindings/input/input.h>
7 #include "omap4-mcpdm.dtsi"
15 reserved-memory {
16 #address-cells = <1>;
17 #size-cells = <1>;
20 dsp_memory_region: dsp-memory@98000000 {
21 compatible = "shared-dma-pool";
27 ipu_memory_region: ipu-memory@98800000 {
[all …]
H A Domap3-beagle-xm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
11 compatible = "ti,omap3-beagle-xm", "ti,omap3630", "ti,omap3";
15 cpu0-supply = <&vcc>;
32 #clock-cells = <0>;
33 compatible = "fixed-clock";
34 clock-frequency = <26000000>;
37 led-controller-1 {
38 compatible = "gpio-leds";
[all …]
H A Domap3-igep0020-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #include "omap3-igep.dtsi"
10 #include "omap-gpmc-smsc9221.dtsi"
15 pinctrl-names = "default";
16 pinctrl-0 = <&leds_pins>;
17 compatible = "gpio-leds";
22 default-state = "on";
28 default-state = "off";
34 default-state = "off";
43 /* HS USB Port 1 Power */
[all …]
/linux/Documentation/devicetree/bindings/media/
H A Dmicrochip,csi2dc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eugen Hristev <eugen.hristev@microchip.com>
13 CSI2DC - Camera Serial Interface 2 Demux Controller
27 accessible as a DMA slave port to a DMA controller.
29 CSI2DC supports a single 'port' node as a sink port with either Synopsys
30 32-bit IDI interface or a parallel interface.
32 CSI2DC supports one 'port' node as source port with parallel interface.
34 This port has an 'endpoint' that can be connected to a sink port of another
[all …]
/linux/Documentation/driver-api/cxl/linux/example-configurations/
H A Dsingle-device.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Single Device
6 This cxl-cli configuration dump shows the following host configuration:
8 * A single socket system with one CXL root
10 * One CXL Host Bridges has a single CXL Memory Expander Attached
13 This output is generated by :code:`cxl list -v` and describes the relationships
47 Host Bridges. The `Root` can be considered the singular upstream port attached
48 to the platform's memory controller - which routes memory requests to it.
51 configured. If a port is not configured (id's 0, 1, and 4), they are omitted.
57 "port":"port1",
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/linux/tools/perf/pmu-events/arch/x86/pantherlake/
H A Dfloating-point.json3 …"BriefDescription": "Cycles when floating-point divide unit is busy executing divide or square roo…
8 …it is busy executing divide or square root operations. Accounts for floating-point operations only…
33 …"BriefDescription": "Number of FP-arith-uops dispatched on 1st VEC port (port 0). FP-arith-uops ar…
42 "BriefDescription": "Number of FP-arith-uops dispatched on 2nd VEC port (port 1)",
51 "BriefDescription": "Number of FP-arith-uops dispatched on 3rd VEC port (port 5)",
60 "BriefDescription": "Number of FP-arith-uops dispatched on 4th VEC port",
69 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
73 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
79 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
83 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
[all …]
/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dsrio.txt3 RapidIO port node:
5 - compatible
11 Optionally, a compatible string of "fsl,srio-vX.Y" where X is Major
15 - reg
17 Value type: <prop-encoded-array>
22 - interrupts
24 Value type: <prop_encoded-array>
30 A single IRQ that handles error conditions is specified by this
31 property. (Typically shared with port-write).
33 - fsl,srio-rmu-handle:
[all …]
/linux/drivers/net/wan/
H A Dhd64570.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* SCA HD64570 register definitions - all addresses for mode 0 (8086 MPU)
42 /* MSCI channel (port) 0 registers - offset 0x20
43 MSCI channel (port) 1 registers - offset 0x40 */
77 /* Timer channel 0 (port 0 RX) registers - offset 0x60
78 Timer channel 1 (port 0 TX) registers - offset 0x68
79 Timer channel 2 (port 1 RX) registers - offset 0x70
80 Timer channel 3 (port 1 TX) registers - offset 0x78
88 #define TCNTL 0x00 /* Up-counter L */
89 #define TCNTH 0x01 /* Up-counter H */
[all …]
/linux/Documentation/devicetree/bindings/display/panel/
H A Dpanel-common-dual.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common-dual.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common Properties for Dual-Link Display Panels
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
15 support also single link.
18 - $ref: panel-common.yaml#
26 port@0:
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/linux/Documentation/networking/dsa/
H A Dconfiguration.rst1 .. SPDX-License-Identifier: GPL-2.0
10 .. _dsa-config-showcases:
13 -----------------------
18 *single port*
19 Every switch port acts as a different configurable Ethernet port
22 Every switch port is part of one configurable Ethernet bridge
25 Every switch port except one upstream port is part of a configurable
27 The upstream port acts as different configurable Ethernet port.
32 Through DSA every port of a switch is handled like a normal linux Ethernet
33 interface. The CPU port is the switch port connected to an Ethernet MAC chip.
[all …]
/linux/drivers/infiniband/ulp/srpt/
H A Dib_srpt.h2 * Copyright (c) 2006 - 2009 Mellanox Technology Inc. All rights reserved.
3 * Copyright (C) 2009 - 2010 Bart Van Assche <bvanassche@acm.org>.
15 * - Redistributions of source code must retain the above
19 * - Redistributions in binary form must reproduce the above
78 SRP_MTCH_ACTION = 0x03, /* MULTI-CHANNEL ACTION */
138 * enum srpt_command_state - SCSI command state managed by SRPT
162 * struct srpt_ioctx - shared SRPT I/O context information
178 * struct srpt_recv_ioctx - SRPT receive I/O context
196 * struct srpt_send_ioctx - SRPT send I/O context
201 * @s_rw_ctx: @rw_ctxs points here if only a single rw_ctx is needed.
[all …]
/linux/samples/pktgen/
H A Dpktgen_sample01_simple.sh2 # SPDX-License-Identifier: GPL-2.0
5 # * pktgen sending with single thread and single interface
6 # * flow variation via random UDP source port
13 # - go look in parameters.sh to see which setting are avail
14 # - required param is the interface "-i" stored in $DEV
22 if [ -z "$DEST_IP" ]; then
23 [ -z "$IP6" ] && DEST_IP="198.18.0.42" || DEST_IP="FD00::1"
25 [ -z "$CLONE_SKB" ] && CLONE_SKB="0"
26 # Example enforce param "-m" for dst_mac
27 [ -z "$DST_MAC" ] && usage && err 2 "Must specify -m dst_mac"
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dhisilicon-hns-nic.txt4 - compatible: "hisilicon,hns-nic-v1" or "hisilicon,hns-nic-v2".
5 "hisilicon,hns-nic-v1" is for hip05.
6 "hisilicon,hns-nic-v2" is for Hi1610 and Hi1612.
7 - ae-handle: accelerator engine handle for hns,
9 see Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt
10 - port-id: is the index of port provided by DSAF (the accelerator). DSAF can
11 connect to 8 PHYs. Port 0 to 1 are both used for administration purpose. They
17 port-id can be 2 to 7. Here is the diagram:
18 +-----+---------------+
20 +-+-+-+---+-+-+-+-+-+-+
[all …]
H A Dmarvell-orion-net.txt10 describes up to 3 ethernet port nodes within that controller. The reason for
11 the multiple levels is that the port registers are interleaved within a single
12 set of controller registers. Each port node describes port-specific properties.
16 only one port associated. Multiple ports are implemented as multiple single-port
23 - #address-cells: shall be 1.
24 - #size-cells: shall be 0.
25 - compatible: shall be one of "marvell,orion-eth", "marvell,kirkwood-eth".
26 - reg: address and length of the controller registers.
29 - clocks: phandle reference to the controller clock.
30 - marvell,tx-checksum-limit: max tx packet size for hardware checksum.
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am654-idk.dtso1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include "k3-pinctrl.h"
17 ethernet3 = "/icssg0-eth/ethernet-ports/port@0";
18 ethernet4 = "/icssg0-eth/ethernet-ports/port@1";
19 ethernet5 = "/icssg1-eth/ethernet-ports/port@0";
20 ethernet6 = "/icssg1-eth/ethernet-ports/port@1";
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