| /linux/Documentation/devicetree/bindings/net/ |
| H A D | nxp,tja11xx.yaml | 1 # SPDX-License-Identifier: GPL-2.0+ 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andrew Lunn <andrew@lunn.ch> 11 - Florian Fainelli <f.fainelli@gmail.com> 12 - Heiner Kallweit <hkallweit1@gmail.com> 20 - ethernet-phy-id0180.dc40 21 - ethernet-phy-id0180.dc41 22 - ethernet-phy-id0180.dc48 23 - ethernet-phy-id0180.dd00 [all …]
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| H A D | mediatek-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/mediatek-dwmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Biao Huang <biao.huang@mediatek.com> 21 - mediatek,mt2712-gmac 22 - mediatek,mt8188-gmac 23 - mediatek,mt8195-gmac 25 - compatible 28 - $ref: snps,dwmac.yaml# [all …]
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| H A D | actions,owl-emac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/actions,owl-emac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Cristian Ciocaltea <cristian.ciocaltea@gmail.com> 14 It provides the RMII and SMII interfaces and is compliant with the 15 IEEE 802.3 CSMA/CD standard, supporting both half-duplex and full-duplex 19 - $ref: ethernet-controller.yaml# 24 - const: actions,owl-emac 25 - items: [all …]
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| H A D | faraday,ftgmac100.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Po-Yu Chuang <ratbert@faraday-tech.com> 15 - const: faraday,ftgmac100 16 - items: 17 - enum: 18 - aspeed,ast2400-mac 19 - aspeed,ast2500-mac 20 - aspeed,ast2600-mac [all …]
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| H A D | mediatek,star-emac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/mediatek,star-emac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bartosz Golaszewski <bgolaszewski@baylibre.com> 14 It's compliant with 802.3 standards and supports half- and full-duplex 15 modes with flow-control as well as CRC offloading and VLAN tags. 18 - $ref: ethernet-controller.yaml# 23 - mediatek,mt8516-eth 24 - mediatek,mt8518-eth [all …]
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| H A D | cpsw-phy-sel.txt | 1 TI CPSW Phy mode Selection Device Tree Bindings (DEPRECATED) 2 ----------------------------------------------- 5 - compatible : Should be "ti,am3352-cpsw-phy-sel" for am335x platform and 6 "ti,dra7xx-cpsw-phy-sel" for dra7xx platform 7 "ti,am43xx-cpsw-phy-sel" for am43xx platform 8 - reg : physical base address and size of the cpsw 10 - reg-names : names of the register map given in "reg" node 13 -rmii-clock-ext : If present, the driver will configure the RMII 18 phy_sel: cpsw-phy-sel@44e10650 { 19 compatible = "ti,am3352-cpsw-phy-sel"; [all …]
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| H A D | adi,adin.yaml | 1 # SPDX-License-Identifier: GPL-2.0+ 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marcelo Schmitt <marcelo.schmitt@analog.com> 16 - $ref: ethernet-phy.yaml# 19 adi,rx-internal-delay-ps: 21 RGMII RX Clock Delay used only when PHY operates in RGMII mode with 22 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds. 26 adi,tx-internal-delay-ps: 28 RGMII TX Clock Delay used only when PHY operates in RGMII mode with [all …]
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| H A D | loongson,ls1c-emac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/loongson,ls1c-emac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson-1C Ethernet MAC Controller 10 - Keguang Zhang <keguang.zhang@gmail.com> 13 Loongson-1C Ethernet MAC Controller is based on 17 - 10/100Mbps 18 - Full-duplex operation (IEEE 802.3x flow control automatic transmission) 19 - Half-duplex operation (CSMA/CD Protocol and back-pressure support) [all …]
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| H A D | sunplus,sp7021-emac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/net/sunplus,sp7021-emac.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Wells Lu <wellslutw@gmail.com> 19 const: sunplus,sp7021-emac 33 ethernet-ports: 39 "#address-cells": 42 "#size-cells": 46 "^port@[0-1]$": [all …]
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| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx6ul-var-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Support for Variscite VAR-SOM-MX6UL Module 9 /dts-v1/; 12 #include <dt-bindings/clock/imx6ul-clock.h> 13 #include <dt-bindings/gpio/gpio.h> 16 model = "Variscite VAR-SOM-MX6UL module"; 17 compatible = "variscite,var-som-imx6ul", "fsl,imx6ul"; 24 reg_gpio_dvfs: reg-gpio-dvfs { 25 compatible = "regulator-gpio"; 26 regulator-min-microvolt = <1300000>; [all …]
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| H A D | imx6ul-kontron-sl-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/gpio/gpio.h> 12 stdout-path = &uart4; 22 cs-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; 23 pinctrl-names = "default"; 24 pinctrl-0 = <&pinctrl_ecspi2>; 28 compatible = "mxicy,mx25v8035f", "jedec,spi-nor"; 30 spi-max-frequency = <50000000>; 33 compatible = "fixed-partitions"; 34 #address-cells = <1>; [all …]
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| H A D | imx6ull-seeed-npi-dev-board.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <dt-bindings/gpio/gpio.h> 11 stdout-path = &uart1; 14 gpio_buttons: gpio-keys { 15 compatible = "gpio-keys"; 16 pinctrl-names = "default"; 17 pinctrl-0 = <&pinctrl_button>; 19 button-0 { 23 wakeup-source; 27 gpio-leds { [all …]
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| H A D | imx6qp-prtwd3.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 16 stdout-path = &uart4; 29 clock_ksz8081: clock-ksz8081 { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <50000000>; 35 clock_ksz9031: clock-ksz9031 { 36 compatible = "fixed-clock"; [all …]
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| H A D | imx6ul-imx6ull-opos6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 8 reg = <0x80000000 0>; /* will be filled by U-Boot */ 11 reg_3v3: regulator-3v3 { 12 compatible = "regulator-fixed"; 13 regulator-name = "3V3"; 14 regulator-min-microvolt = <3300000>; 15 regulator-max-microvolt = <3300000>; 18 usdhc3_pwrseq: usdhc3-pwrseq { 19 compatible = "mmc-pwrseq-simple"; 20 reset-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>; [all …]
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| H A D | imx6ul-var-som-concerto.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Support for Variscite MX6 Concerto Carrier board with the VAR-SOM-MX6UL 10 #include "imx6ul-var-som.dtsi" 11 #include <dt-bindings/leds/common.h> 14 model = "Variscite VAR-SOM-MX6UL Concerto Board"; 15 compatible = "variscite,mx6ulconcerto", "variscite,var-som-imx6ul", "fsl,imx6ul"; 18 stdout-path = &uart1; 21 gpio-keys { 22 compatible = "gpio-keys"; 23 pinctrl-names = "default"; [all …]
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| /linux/arch/arm/boot/dts/microchip/ |
| H A D | at91sam9x25ek.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9x25ek.dts - Device Tree file for AT91SAM9X25-EK board 8 /dts-v1/; 13 model = "Atmel AT91SAM9X25-EK"; 22 phy-mode = "rmii"; 27 phy-mode = "rmii"; 32 pinctrl-names = "default"; 33 pinctrl-0 = <&pinctrl_pwm0_pwm0_1>;
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| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | ti,phy-gmii-sel.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/phy/ti,phy-gmii-sel.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: CPSW Port's Interface Mode Selection PHY 11 - Kishon Vijay Abraham I <kishon@ti.com> 15 two 10/100/1000 Ethernet ports with selectable G/MII, RMII, and RGMII interfaces. 16 The interface mode is selected by configuring the MII mode selection register(s) 20 +--------------+ [all …]
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| /linux/Documentation/devicetree/bindings/net/dsa/ |
| H A D | lan9303.txt | 2 ------------------------------------------------- 6 - compatible: should be 7 - "smsc,lan9303-i2c" for I2C managed mode 9 - "smsc,lan9303-mdio" for mdio managed mode 13 - reset-gpios: GPIO to be used to reset the whole device 14 - reset-duration: reset duration in milliseconds, defaults to 200 ms 23 auto-detected and mapped accordingly. 27 I2C managed mode: 31 fixed-link { /* RMII fixed link to LAN9303 */ 33 full-duplex; [all …]
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| /linux/arch/arm/boot/dts/st/ |
| H A D | stm32mp151a-prtt1c.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 /dts-v1/; 8 #include "stm32mp151a-prtt1l.dtsi" 14 clock_ksz9031: clock-ksz9031 { 15 compatible = "fixed-clock"; 16 #clock-cells = <0>; 17 clock-frequency = <25000000>; 20 clock_sja1105: clock-sja1105 { 21 compatible = "fixed-clock"; 22 #clock-cells = <0>; [all …]
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| H A D | stm32mp151c-mect1s.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 /dts-v1/; 10 #include "stm32mp15-pinctrl.dtsi" 11 #include "stm32mp15xxaa-pinctrl.dtsi" 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/leds/common.h> 21 stdout-path = "serial0:1500000n8"; 33 v3v3: regulator-v3v3 { 34 compatible = "regulator-fixed"; [all …]
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| /linux/Documentation/networking/dsa/ |
| H A D | sja1105.rst | 8 The NXP SJA1105 is a family of 10 SPI-managed automotive switches: 10 - SJA1105E: First generation, no TTEthernet 11 - SJA1105T: First generation, TTEthernet 12 - SJA1105P: Second generation, no TTEthernet, no SGMII 13 - SJA1105Q: Second generation, TTEthernet, no SGMII 14 - SJA1105R: Second generation, no TTEthernet, SGMII 15 - SJA1105S: Second generation, TTEthernet, SGMII 16 - SJA1110A: Third generation, TTEthernet, SGMII, integrated 100base-T1 and 17 100base-TX PHYs 18 - SJA1110B: Third generation, TTEthernet, SGMII, 100base-T1, 100base-TX [all …]
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| /linux/drivers/net/ethernet/ti/ |
| H A D | cpsw-phy-sel.c | 1 // SPDX-License-Identifier: GPL-2.0 44 u32 mode = 0; in cpsw_gmii_sel_am3352() local 47 reg = readl(priv->gmii_sel); in cpsw_gmii_sel_am3352() 51 mode = AM33XX_GMII_SEL_MODE_RMII; in cpsw_gmii_sel_am3352() 55 mode = AM33XX_GMII_SEL_MODE_RGMII; in cpsw_gmii_sel_am3352() 61 mode = AM33XX_GMII_SEL_MODE_RGMII; in cpsw_gmii_sel_am3352() 66 dev_warn(priv->dev, in cpsw_gmii_sel_am3352() 67 "Unsupported PHY mode: \"%s\". Defaulting to MII.\n", in cpsw_gmii_sel_am3352() 71 mode = AM33XX_GMII_SEL_MODE_MII; in cpsw_gmii_sel_am3352() 77 mode <<= slave * 2; in cpsw_gmii_sel_am3352() [all …]
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| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | am335x-icev2.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/ 11 /dts-v1/; 16 model = "TI AM3359 ICE-V2"; 17 compatible = "ti,am3359-icev2", "ti,am33xx"; 25 stdout-path = &uart3; 29 compatible = "regulator-fixed"; 30 regulator-name = "vbat"; 31 regulator-min-microvolt = <5000000>; 32 regulator-max-microvolt = <5000000>; [all …]
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| /linux/arch/arm/boot/dts/nxp/vf/ |
| H A D | vf610-bk4.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 15 stdout-path = &uart1; 23 audio_ext: oscillator-audio { 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <24576000>; 29 enet_ext: oscillator-ethernet { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; [all …]
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| /linux/arch/arm/boot/dts/nxp/mxs/ |
| H A D | imx28-sps1.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 /dts-v1/; 11 compatible = "schulercontrol,imx28-sps1", "fsl,imx28"; 18 reg_usb0_vbus: regulator-0 { 19 compatible = "regulator-fixed"; 20 regulator-name = "usb0_vbus"; 21 regulator-min-microvolt = <5000000>; 22 regulator-max-microvolt = <5000000>; 27 compatible = "gpio-leds"; 30 led-1 { [all …]
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