Searched +full:ls1028a +full:- +full:plldig (Results 1 – 2 of 2) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/clock/fsl,plldig.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: NXP QorIQ Layerscape LS1028A Display PIXEL Clock10 - Wen He <wen.he_1@nxp.com>13 NXP LS1028A has a clock domain PXLCLK0 used for the Display output19 const: fsl,ls1028a-plldig27 '#clock-cells':30 fsl,vco-hz:[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 * Device Tree Include file for NXP Layerscape-1028A family SoC.5 * Copyright 2018-2020 NXP11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>12 #include <dt-bindings/interrupt-controller/arm-gi[all...]