| /titanic_53/usr/src/uts/common/io/fibre-channel/fca/emlxs/ |
| H A D | emlxs_hba.c | 157 /* Set max interrupt count if not specified */ in emlxs_msi_init()
167 /* Filter max interrupt count with adapter model specification */ in emlxs_msi_init()
172 /* Get the available interrupt types from the kernel */ in emlxs_msi_init()
197 /* Set interrupt type and interrupt count */ in emlxs_msi_init()
203 /* Get the max interrupt count from the adapter */ in emlxs_msi_init()
219 /* Get the max interrupt count from the adapter */ in emlxs_msi_init()
234 /* Get the max interrupt count from the adapter */ in emlxs_msi_init()
266 /* Validate interrupt count */ in emlxs_msi_init()
279 /* Allocate an array of interrupt handles */ in emlxs_msi_init()
321 /* Allocate a new array of interrupt handles */ in emlxs_msi_init()
[all …]
|
| /titanic_53/usr/src/uts/common/io/aac/ |
| H A D | README | 73 Instead of supporting fixed interrupt only, the driver added the MSI
74 interrupt whenever the HBA card has this feature. In the same time, the
75 driver has replaced all legacy interrupt ddi interfaces callings by
|
| /titanic_53/usr/src/man/man9f/ |
| H A D | usb_pipe_close.9f | 81 handle. This function stops polling if the pipe to be closed is an interrupt-IN
189 Called from interrupt context.
225 called from a callback executing in interrupt context. Please see
|
| H A D | usb_pipe_isoc_xfer.9f | 151 since they are called from interrupt context. They will have
256 Called from interrupt context with the USB_FLAGS_SLEEP flag set.
372 None, but will fail if called with USB_FLAGS_SLEEP specified from interrupt
380 regard to arguments. May be called from interrupt context only when the
|
| /titanic_53/usr/src/uts/sun4u/sys/pci/ |
| H A D | pci_regs.h | 36 * Offsets of registers in the interrupt block:
75 * (psycho and schizo) interrupt mapping register bit definitions:
85 * psycho clear interrupt register bit definitions:
|
| H A D | pci_pbm.h | 106 * pbm Interrupt Mapping Register save area
110 /* To save CDMA interrupt state across CPR */
114 * pbm error interrupt priority:
|
| H A D | pci_var.h | 135 ib_t *pci_ib_p; /* interrupt block */
156 int pci_numproxy; /* upa interrupt proxies */
157 int pci_thermal_interrupt; /* node has thermal interrupt */
165 /* Interrupt support */
|
| /titanic_53/usr/src/boot/sys/x86/include/ |
| H A D | psl.h | 48 #define PSL_I 0x00000200 /* interrupt enable bit */
56 #define PSL_VIF 0x00080000 /* virtual interrupt enable */
57 #define PSL_VIP 0x00100000 /* virtual interrupt pending */
|
| /titanic_53/usr/src/uts/sun4u/serengeti/io/ |
| H A D | sgcn.c | 82 /* interrupt handlers */
366 /* initialize interrupt handler */ in sgcn_open()
738 * Interrupt handlers
739 * All handlers register with SBBC driver and must follow SBBC interrupt
743 * SC sends an interrupt when new data comes in
754 * change interrupt state so that SBBC won't trigger in sgcn_data_in_handler()
821 * SC sends an interrupt when it takes output data
829 * change interrupt state so that SBBC won't trigger in sgcn_space_2_out_handler()
843 /* restore interrupt state */ in sgcn_space_2_out_handler()
850 * SC sends an interrupt when it detects BREAK sequence
[all …]
|
| /titanic_53/usr/src/uts/common/io/ib/adapters/tavor/ |
| H A D | tavor_mr.c | 87 * Context: Can be called from interrupt or base context.
126 * Context: Can be called from interrupt or base context.
175 * Context: Can be called from interrupt or base context.
199 * current thread context (i.e. if we are currently in the interrupt in tavor_mr_register_shared()
472 * Context: Can be called from interrupt or base context.
492 * current thread context (i.e. if we are currently in the interrupt in tavor_mr_deregister()
661 * Context: Can be called from interrupt or base context.
723 * Context: Can be called from interrupt or base context.
763 * Context: Can be called from interrupt or base context.
812 * Context: Can be called from interrupt or base context.
[all …]
|
| /titanic_53/usr/src/uts/common/io/ib/adapters/hermon/ |
| H A D | hermon_mr.c | 100 * Context: Can be called from interrupt or base context.
131 * Context: Can be called from interrupt or base context.
170 * Context: Can be called from interrupt or base context.
190 * current thread context (i.e. if we are currently in the interrupt in hermon_mr_register_shared()
440 * Context: Can be called from interrupt or base context.
461 * current thread context (i.e. if we are currently in the interrupt in hermon_mr_alloc_fmr()
652 * Context: Can be called from interrupt or base context.
741 * Context: Can be called from interrupt or base context.
759 * current thread context (i.e. if we are currently in the interrupt in hermon_mr_deregister()
938 * Context: Can be called from interrupt or base context.
[all …]
|
| /titanic_53/usr/src/uts/common/disp/ |
| H A D | thread.c | 544 * The interrupt routine must set the thread dispatcher in thread_create()
868 * <interrupt> in thread_zone_destroy()
874 * A cross call to all cpus will cause the interrupt handler in thread_zone_destroy()
930 * <interrupt> in thread_reaper()
936 * A cross call to all cpus will cause the interrupt handler in thread_reaper()
1300 * When an interrupt occurs, the interrupt is handled on the stack
1301 * of an interrupt thread, taken from a pool linked to the CPU structure.
1303 * When swtch() is switching away from an interrupt thread because it
1315 int i; /* interrupt level */ in thread_unpin()
1321 t->t_intr = NULL; /* clear interrupt ptr */ in thread_unpin()
[all …]
|
| /titanic_53/usr/src/uts/sun4/ml/ |
| H A D | swtch.s | 411 ! Set priority as low as possible, blocking all interrupt threads
419 ! If we are resuming an interrupt thread, store a starting timestamp
441 ! If an interrupt occurred while we were attempting to store
532 ! switching out of the interrupt context.
573 ! If we are resuming an interrupt thread, store a timestamp in the
580 ! We're resuming a non-interrupt thread.
591 ! We're an interrupt thread. Update t_intr_start and cpu_intrcnt
609 ! We're a non-interrupt thread and cpu_kprunrun is set. call kpreempt.
|
| /titanic_53/usr/src/uts/sparc/v9/ml/ |
| H A D | syscall_trap.s | 110 wrpr %g0, %g3, %pstate ! disable interrupt
128 wrpr %g0, %l3, %pstate ! enable interrupt
193 wrpr %g0, %g4, %pstate ! disable interrupt
213 wrpr %g0, %g5, %pstate ! enable interrupt
355 wrpr %g0, %g3, %pstate ! disable interrupt
373 wrpr %g0, %l3, %pstate ! enable interrupt
451 wrpr %g0, %g4, %pstate ! disable interrupt
471 wrpr %g0, %g5, %pstate ! enable interrupt
|
| /titanic_53/usr/src/uts/common/io/rge/ |
| H A D | rge_chip.c | 381 * is complete. We should get a link state change interrupt somewhere along
849 * Disable interrupt in rge_chip_reset()
855 * Clear pended interrupt in rge_chip_reset()
1070 * Enable interrupt in rge_chip_start()
1100 * Disable interrupt in rge_chip_stop()
1106 * Clear pended interrupt in rge_chip_stop()
1333 * ========== Hardware interrupt handler ==========
1381 * Was this interrupt caused by our device... in rge_intr()
1387 /* indicate it wasn't our interrupt */ in rge_intr()
1392 * Clear interrupt in rge_intr()
[all …]
|
| /titanic_53/usr/src/uts/common/sys/usb/hcd/openhci/ |
| H A D | ohci_polled.h | 64 * For ohci bandwidth of low speed interrupt devices limits,
87 /* Interrupt Endpoint descriptor */
88 ohci_ed_t *ohci_polled_ed; /* Interrupt endpoint */
|
| /titanic_53/usr/src/uts/common/io/ntxn/ |
| H A D | nx_hw_pci_regs.h | 39 * Interrupt related defines.
79 * Interrupt state machine and other bits.
113 * PCI Interrupt Vector Values.
|
| /titanic_53/usr/src/uts/sun4u/sys/ |
| H A D | rmc_comm_drvintf.h | 63 #define RCECANTREGINTR (-9) /* interrupt handler registration failure */
64 #define RCEALREADYREG (-10) /* interrupt handler already registered */
72 * interrupt handler is currently processing an asynchronous notification or
|
| H A D | sysioerr.h | 37 * Sbus error interrupt priorities
52 #define SYSIO_INTGN 0x0007C00000000000ULL /* interrupt group number */
62 #define SECR_UE_INTEN 0x4000000000000000ULL /* enable UE_INT interrupt */
63 #define SECR_CE_INTEN 0x2000000000000000ULL /* enable CE_INT interrupt */
|
| /titanic_53/usr/src/uts/sun4u/sunfire/io/ |
| H A D | fhc.c | 84 * This table represents the FHC interrupt priorities. They range from
90 PIL_15, /* System interrupt priority */
91 PIL_12, /* zs interrupt priority */
92 PIL_15, /* TOD interrupt priority */
348 /* Interrupt distribution callback function. */
502 * Reset the interrupt mapping registers.
515 * have to have to tear down and rebuild the interrupt records
560 /* Loop through all 4 FHC interrupt mapping registers */ in fhc_handle_imr()
566 "found lost system interrupt, resetting.."); in fhc_handle_imr()
632 /* reset interrupt mapping registers */ in fhc_attach()
[all …]
|
| /titanic_53/usr/src/uts/common/sys/ |
| H A D | dditypes.h | 102 * Interrupt types
117 uint_t idev_softint; /* Soft interrupt register bit(s) */
128 * interrupt specification
135 * soft interrupt id
|
| /titanic_53/usr/src/uts/common/io/usb/usba/ |
| H A D | README | 170 3. Interrupt pipe state transitions (endpoint number > 1, both IN and OUT) :-
172 Interrupt IN:
207 Interrupt OUT:
209 NOTE: Send all interrupt OUT requests to HCD and no queuing at USBA level.
|
| /titanic_53/usr/src/cmd/cpc/common/ |
| H A D | cputrack.c | 67 * We bail out as soon as possible when interrupt is set
69 static int interrupt = 0; variable
334 if (interrupt) in pinit_lwp()
400 if (interrupt) in pfini_lwp()
454 if (interrupt) in plwp_create()
475 if (interrupt) in plwp_exit()
501 if (interrupt) in pexec()
544 if (interrupt) in pexit()
581 if (interrupt) in ptick()
883 interrupt++; in intr()
|
| /titanic_53/usr/src/uts/intel/ia32/ml/ |
| H A D | swtch.s | 138 * If we are resuming an interrupt thread, store a timestamp in the thread
139 * structure. If an interrupt occurs between tsc_read() and its subsequent
142 * interrupt occurring in this window will put a new timestamp in the thread's
200 * If we are resuming an interrupt thread, store a timestamp in the thread
201 * structure. If an interrupt occurs between tsc_read() and its subsequent
204 * interrupt occurring in this window will put a new timestamp in the thread's
392 * possible and blocking all interrupt threads that may be active.
560 * possible and blocking all interrupt threads that may be active.
790 * possible and blocking all interrupt threads that may be active.
840 * possible and blocking all interrupt threads that may be active.
|
| /titanic_53/usr/src/uts/sun4/os/ |
| H A D | machdep.c | 430 * Create interrupt kstats for this CPU.
472 * Delete interrupt kstats for this CPU.
481 * Convert interrupt statistics from CPU ticks to nanoseconds and
524 * An interrupt thread is ending a time slice, so compute the interval it
539 * an interrupt thread which no longer has a pinned thread underneath in cpu_intr_swtch_enter()
541 * its handler. intr_thread() updated the interrupt statistic for its in cpu_intr_swtch_enter()
545 * It can also happen if an interrupt thread in intr_thread() calls in cpu_intr_swtch_enter()
547 * this event, the interrupt thread will be runnable. in cpu_intr_swtch_enter()
567 * An interrupt thread is returning from swtch(). Place a starting timestamp
878 * We need to post a soft interrupt to reprogram the lbolt cyclic when
|