| /titanic_41/usr/src/cmd/cpc/common/ |
| H A D | cputrack.c | 67 * We bail out as soon as possible when interrupt is set
69 static int interrupt = 0; variable
334 if (interrupt) in pinit_lwp()
400 if (interrupt) in pfini_lwp()
454 if (interrupt) in plwp_create()
475 if (interrupt) in plwp_exit()
501 if (interrupt) in pexec()
544 if (interrupt) in pexit()
581 if (interrupt) in ptick()
883 interrupt++; in intr()
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| /titanic_41/usr/src/cmd/dtrace/demo/sdt/ |
| H A D | intr.d | 27 interrupt-start
32 interrupt-complete
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| /titanic_41/usr/src/uts/sun4v/sys/ |
| H A D | machsystm.h | 61 * Target interrupt at the CPU running the add_intrspec
85 * Structure that defines the interrupt distribution list. It contains
86 * enough info about the interrupt so that it can callback the parent
87 * nexus driver and retarget the interrupt to a different CPU.
430 * Interrupt Queues and Error Queues
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| /titanic_41/usr/src/grub/grub-0.97/netboot/ |
| H A D | ns8390.h | 113 #define _3COM_CR_SHARE 0x10 /* select interrupt sharing option */
138 #define _3COM_IDCFR_IRQ2 0x10 /* Interrupt request 2 select */
139 #define _3COM_IDCFR_IRQ3 0x20 /* Interrupt request 3 select */
140 #define _3COM_IDCFR_IRQ4 0x40 /* Interrupt request 4 select */
141 #define _3COM_IDCFR_IRQ5 0x80 /* Interrupt request 5 select */
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| /titanic_41/usr/src/uts/common/os/ |
| H A D | kcpc.c | 68 static uint32_t kcpc_intrctx_count; /* # overflows in an interrupt handler */
98 * cross-call or from high-PIL interrupt
913 * Generic interrupt handler used on hardware that generates
916 * Note: executed at high-level interrupt context!
928 * interrupt in kernel mode, just after we've started to run an in kcpc_overflow_intr()
929 * interrupt thread. (That's because the hardware helpfully in kcpc_overflow_intr()
930 * delivers the overflow interrupt some random number of cycles in kcpc_overflow_intr()
936 * that was running when the interrupt went off. in kcpc_overflow_intr()
959 * "shared" mode, for example, and an overflow interrupt in kcpc_overflow_intr()
970 * the interrupt handler so that it can synchronously in kcpc_overflow_intr()
[all …]
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| H A D | cpu_event.c | 667 * interrupt disabled, so no special handling necessary. in cpu_idle_enter()
684 * will be invoked should interrupt happen during in cpu_idle_enter()
699 * handle the condition if the interrupt in cpu_idle_enter()
702 * However, if an interrupt occurs and we in cpu_idle_enter()
708 * We detect the interrupt, by checking the in cpu_idle_enter()
712 * the interrupt. in cpu_idle_enter()
751 * with interrupt disabled. in cpu_idle_exit()
767 * On x86, cpu_idle_exit will be called from idle thread or interrupt in cpu_idle_exit()
768 * handler. When called from interrupt handler, interrupts will be in cpu_idle_exit()
773 /* Called from interrupt, interrupts are already disabled. */ in cpu_idle_exit()
[all …]
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| /titanic_41/usr/src/man/man9f/ |
| H A D | ddi_get_kt_did.9f | 33 This routine can be called from user, kernel, or interrupt context. This
34 routine cannot be called from a high-level interrupt context.
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| H A D | rmalloc_wait.9f | 58 This function can be called from user, interrupt, or kernel context. However,
59 in most cases \fBrmalloc_wait()\fR should not be called from interrupt context.
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| H A D | usb_get_alt_if.9f | 294 Called from interrupt context.
344 Called from interrupt context with USB_FLAGS_SLEEP specified.
413 context. It may be called from interrupt context only if \fBUSB_FLAGS_SLEEP\fR
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| H A D | usb_get_dev_data.9f | 252 Called from interrupt context.
307 Called from interrupt context.
327 called from user, kernel or interrupt context.
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| /titanic_41/usr/src/uts/common/io/ib/clients/rdsv3/ |
| H A D | rdsv3.conf | 36 # allow interrupt and the event completion af_thr to use the same cpu
37 # default is exclusive mode, MSI-x interrupt and the event completion af_thr
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| /titanic_41/usr/src/uts/common/io/fibre-channel/fca/qlc/ |
| H A D | ql_iocb.c | 69 * Interrupt or Kernel context, no mailbox commands allowed.
266 * Interrupt or Kernel context, no mailbox commands allowed.
331 * XXX protect interrupt routine from calling itself. in ql_req_pkt()
366 * Interrupt or Kernel context, no mailbox commands allowed.
424 * Interrupt or Kernel context, no mailbox commands allowed.
544 * Interrupt or Kernel context, no mailbox commands allowed.
636 * Interrupt or Kernel context, no mailbox commands allowed.
767 * Interrupt or Kernel context, no mailbox commands allowed.
912 * Interrupt or Kernel context, no mailbox commands allowed.
980 * Interrupt or Kernel context, no mailbox commands allowed.
[all …]
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| /titanic_41/usr/src/man/man1m/ |
| H A D | intrstat.1m | 8 intrstat \- report interrupt statistics
19 The \fBintrstat\fR utility gathers and displays run-time interrupt statistics.
23 given CPU, and the percentage of absolute time spent in that device's interrupt
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| H A D | intrd.1m | 8 intrd \- interrupt distribution daemon
54 The interrupt distribution daemon is managed by the service management
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| /titanic_41/usr/src/cmd/truss/ |
| H A D | main.c | 171 * (leave_hung || interrupt || sigusr1). It must notify all other
184 if (interrupt && !int_notified) { in broadcast_signals()
188 (void) thr_kill(lwpid, interrupt); in broadcast_signals()
220 interrupt = SIGTERM; /* post an interrupt */ in grab_lwp()
670 if (!(interrupt | sigusr1)) in main()
849 interrupt = 0; /* another interrupt kills the report */ in main_thread()
898 * a termination condition (leave_hung | interrupt | sigusr1). in worker_thread()
901 if (interrupt | sigusr1) { in worker_thread()
918 if ((leave_hung | interrupt | sigusr1) && in worker_thread()
925 tout != 0 && !(interrupt | sigusr1)) { in worker_thread()
[all …]
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| /titanic_41/usr/src/uts/sun4u/io/px/ |
| H A D | px_hlib.c | 234 * CSR_V JBC's interrupt regs (log, enable, status, clear) in jbc_init()
271 * CSR_V UBC's interrupt regs (log, enable, status, clear) in ubc_init()
294 * CSR_V IB's interrupt regs (log, enable, status, clear) in hvio_ib_init()
317 * CSR_V ILU's interrupt regs (log, enable, status, clear) in ilu_init()
464 * CSR_V TLU's interrupt regs (log, enable, status, clear) in tlu_init()
693 * CSR_V TLU's CE interrupt regs (log, enable, status, clear) in tlu_init()
935 * CSR_V LPU Link Layer interrupt regs (mask, status) in lpu_init()
1253 * CSR_V LPU PHY LAYER interrupt regs (mask, status) in lpu_init()
1301 * CSR_V LPU RX LAYER interrupt regs (mask, status) in lpu_init()
1332 * CSR_V LPU TX LAYER interrupt regs (mask, status) in lpu_init()
[all …]
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| /titanic_41/usr/src/man/man3xcurses/ |
| H A D | noqiflush.3xcurses | 8 noqiflush, qiflush \- control flush of input and output on interrupt
31 when an interrupt, quit, or suspend character is sent to the terminal. The
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| /titanic_41/usr/src/lib/libdtrace_jni/java/docs/examples/ |
| H A D | intrstat.d | 29 sdt:::interrupt-start
34 sdt:::interrupt-complete
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| /titanic_41/usr/src/uts/i86pc/sys/ |
| H A D | mach_intr.h | 33 * Platform-dependent interrupt data structures
53 uint64_t ip_ticks; /* Interrupt ticks for this device */
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| /titanic_41/usr/src/uts/common/io/nge/ |
| H A D | nge.conf | 31 # Set the interrupt priority of the nge device to ipl 6 (same as
35 interrupt-priorities=6;
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| /titanic_41/usr/src/uts/sun4u/io/pci/ |
| H A D | pcipsy.c | 30 * interrupt mapping register
146 cmn_err(CE_NOTE, "Interrupt register failure, returning 0x%x\n", in pci_obj_setup()
243 "interrupt-map-mask", (caddr_t)javelin_prom_fix, in pci_intr_setup()
259 i = ddi_getprop(DDI_DEV_T_ANY, dip, 0, "#interrupt-cells", 1); in pci_intr_setup()
504 if (ddi_prop_exists(DDI_DEV_T_ANY, rdip, NULL, "interrupt-map")) in pci_xlate_intr()
546 * control interrupt-to-cpu binding on a per pci-slot basis instead of per
547 * function. For hardware like this, if an interrupt for one function has
551 * for consistent interrupt distribution).
554 * interrupt-to-cpu binding established, if there is then it returns that
679 * High-level handler for psycho's CBNINTR_THERMAL interrupt.
[all …]
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| /titanic_41/usr/src/uts/common/sys/ |
| H A D | ecppvar.h | 113 ddi_iblock_cookie_t ecpp_trap_cookie; /* interrupt cookie */
201 uint8_t tfifo_intr; /* TFIFO switch interrupt workaround */
206 * Spurious interrupt detection
214 kstat_t *intrstats; /* kstat interrupt counter */
230 * interrupt stats
268 #define ECPP_PHASE_NIBT_REVINTR 0x23 /* nibble/byte reverse interrupt */
342 /* spurious interrupt detection */
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| H A D | pcic_var.h | 169 int pc_intr_mode; /* which interrupt method */
178 ddi_intr_handle_t *pc_intr_htblp; /* ISA: interrupt handles */
228 #define PCF_EXTEND_INTR 0x00000080 /* Use Vadem interrupt sharing */
258 * interrupt modes
259 * the pcic variants provide a number of interrupt modes.
292 * must match the interrupt * type we have selected.
539 #define PCIC_CINT_IREQ 0x040 /* Interrupt present */
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| /titanic_41/usr/src/uts/common/io/rtls/ |
| H A D | rtls.c | 394 cmn_err(CE_WARN, "unsupported high level interrupt"); in rtls_attach()
485 * Add the interrupt handler in rtls_attach()
489 * will not get our interrupt handler invoked by OS while our device in rtls_attach()
1391 * rtls_intr() -- interrupt from board to inform us that a receive or
1409 * Was this interrupt caused by our device... in rtls_intr()
1415 /* indicate it wasn't our interrupt */ in rtls_intr()
1419 * Clear interrupt in rtls_intr()
1440 * Transmit error interrupt in rtls_intr()
1460 * Receive interrupt in rtls_intr()
1471 * Link change interrupt. in rtls_intr()
[all …]
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| /titanic_41/usr/src/man/man4/ |
| H A D | sbus.4 | 57 register space from a high-level interrupt context.
67 integer. Each array element describes a possible \fBSBus\fR interrupt level
71 interrupt handlers with the system using \fBddi_add_intr\fR(9F). The index into
|