Searched +full:first +full:- +full:generation (Results 1 – 25 of 1030) sorted by relevance
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1 //===-- xray_buffer_queue.cpp ----------------------------------*- C++ -*-===//5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception7 //===----------------------------------------------------------------------===//13 //===----------------------------------------------------------------------===//32 allocateBuffer((sizeof(BufferQueue::ControlBlock) - 1) + (Size * Count)); in allocControlBlock()40 (sizeof(BufferQueue::ControlBlock) - 1) + (Size * Count)); in deallocControlBlock()46 if (atomic_fetch_sub(&C->RefCount, 1, memory_order_acq_rel) == 1) in decRefCount()53 atomic_fetch_add(&C->RefCount, 1, memory_order_acq_rel); in incRefCount()57 // cache line. This allows us to not worry about false-sharing among atomic109 // At this point we increment the generation number to associate the buffers in init()[all …]
1 //===-- xray_fdr_controller.h ---------------------------------------------===//5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception7 //===----------------------------------------------------------------------===//11 //===----------------------------------------------------------------------===//37 bool First = true; variable43 return BQ == nullptr || BQ->finalizing(); in finalized()47 return B.Data != nullptr && B.Generation == BQ->generation() && in hasSpace()52 return FuncId & ((1 << 29) - 1); in mask()56 if (BQ->getBuffer(B) != BufferQueue::ErrorCode::Ok) in getNewBuffer()63 First = true; in getNewBuffer()[all …]
1 //===-- xray_buffer_queue.h ------------------------------------*- C++ -*-===//5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception7 //===----------------------------------------------------------------------===//13 //===----------------------------------------------------------------------===//35 /// ControlBlock has the reference count as the first member, sized according36 /// to platform-specific cache-line size. We never use the Buffer member of37 /// the union, which is only there for compiler-supported alignment and56 uint64_t Generation{0};102 T *operator->() const { return &(Buffers[Offset].Buff); }108 // We want to advance to the first Offset where the 'Used' property is in Iterator()[all …]
2 # Copyright 2017-2022 The OpenSSL Project Authors. All Rights Reserved.33 ok(run(app(['openssl', 'dgst', '-sign', $privkey,34 '-out', $sigfile,38 ok(run(app(['openssl', 'dgst', '-prverify', $privkey,39 '-signature', $sigfile,43 ok(run(app(['openssl', 'dgst', '-verify', $pubkey,44 '-signature', $sigfile,48 ok(!run(app(['openssl', 'dgst', '-verify', $pubkey,49 '-signature', $sigfile,65 ok(run(app(['openssl', 'sha512', '-sign', $privkey,[all …]
103 as first argument can be passed130 returns the current generation of the152 and returns \-1.164 .Bd -literal -offset indent181 subelement to be allocated and zeroed prior to the first invocation of186 after the first call to191 .Bd -literal -offset indent195 long generation;207 generation.208 The reason the generation is at the head of the buffer is so that userland[all …]
1 /*-2 * SPDX-License-Identifier: BSD-3-Clause182 &numdevsize, NULL, 0) == -1) { in devstat_getnumdevs()187 return(-1); in devstat_getnumdevs()192 if (KREADNL(kd, X_NUMDEVS, numdevs) == -1) in devstat_getnumdevs()193 return(-1); in devstat_getnumdevs()200 * This is an easy way to get the generation number, but the generation is202 * Because this generation sysctl is separate from the statistics sysctl,203 * the device list and the generation could change between the time that210 long generation; in devstat_getgeneration() local[all …]
18 .\" Set up some character translations and predefined strings. \*(-- will24 .tr \(*W-27 . ds -- \(*W-29 . if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch30 . if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch37 . ds -- \|\(em\|71 .\" Fear. Run. Save yourself. No user-serviceable parts.81 . ds #H ((1u-(\\\\n(.fu%2u))*.13m)97 . ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"98 . ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'[all …]
73 - algorithm specific control operations198 type used must match I<keytype> if it is not -1. The parameter I<optype> is a216 command line pages for the option I<-pkeyopt> which is supported by the228 Key generation typically involves setting up parameters to be used and231 In this case key generation is simply the process of setting up the240 key generation. For example for EC keys this will set the curve name and for266 if this control is called. If it is not called then the first byte of the plaintext298 RSA key generation to I<bits>. If not specified 2048 bits is used.301 generation to the value stored in I<pubexp>. Currently it should be an odd311 RSA key generation to I<primes>. If not specified 2 is used.[all …]
2 * Copyright 2012-2015 Samy Al Bahra.43 #define CK_HS_PROBE_L1_MASK (CK_HS_PROBE_L1 - 1)49 #define CK_HS_VMA_MASK ((uintptr_t)((1ULL << CK_MD_VMA_BITS) - 1))56 #define CK_HS_G_MASK (CK_HS_G - 1)79 CK_HS_PROBE_TOMBSTONE, /* Short-circuit on tombstone. */80 CK_HS_PROBE_INSERT /* Short-circuit on probe bound if tombstone found. */84 unsigned int generation[CK_HS_G]; member102 ck_pr_store_uint(&map->generation[h], in ck_hs_map_signal()103 map->generation[h] + 1); in ck_hs_map_signal()114 if (i->offset >= map->capacity) in _ck_hs_next()[all …]
2 * Copyright 2014-2015 Olivier Houchard.3 * Copyright 2012-2015 Samy Al Bahra.44 #define CK_RHS_PROBE_L1_MASK (CK_RHS_PROBE_L1 - 1)50 #define CK_RHS_VMA_MASK ((uintptr_t)((1ULL << CK_MD_VMA_BITS) - 1))56 #define CK_RHS_G_MASK (CK_RHS_G - 1)81 CK_RHS_PROBE_RH, /* Short-circuit if RH slot found. */82 CK_RHS_PROBE_INSERT, /* Short-circuit on probe bound if tombstone found. */84 …CK_RHS_PROBE_ROBIN_HOOD,/* Look for the first slot available for the entry we are about to replace…113 unsigned int generation[CK_RHS_G]; member138 if (map->read_mostly) in ck_rhs_entry()[all …]
40 * # Pseudo-Random Generators42 * A PRNG is a state-based engine that outputs pseudo-random bytes on54 * - `br_xxx_init()`58 * - `br_xxx_generate()`60 * Produce some pseudo-random bytes.62 * - `br_xxx_update()`66 * The initialisation function sets the first context field (`vtable`)78 * HMAC_DRBG is defined in [NIST SP 800-90A Revision79 * 1](http://nvlpubs.nist.gov/nistpubs/SpecialPublications/NIST.SP.800-90Ar1.pdf).84 * pointer to `br_sha256_vtable` to use HMAC_DRBG with SHA-256).[all …]
50 * such integers are represented with big-endian unsigned notation:51 * first byte is the most significant, and the value is positive (so53 * thus contain, for each such integer, a pointer to the first value byte55 * relevant bytes. As a general rule, minimal-length encoding is not60 * - the modulus (`n`);61 * - the public exponent (`e`).66 * - the modulus (`n`);67 * - the public exponent (`e`);68 * - the private exponent (`d`);69 * - the first prime factor (`p`);[all …]
36 .Nd randomize inode generation numbers47 utility installs random generation numbers on all the inodes for50 This increases the security of NFS-exported file systems by making62 re-randomize or report on an existing file system.69 or a file system that is mounted read-only.72 utility may be used on the root file system in single-user mode73 but the system should be rebooted via ``reboot -n'' afterwards.76 .Bl -tag -width indent87 Print the current generation numbers for all inodes instead of101 first appeared in[all …]
5 * Copyright(c) 2007-2023 Intel Corporation. All rights reserved.53 * supported, however the support is limited to "two-prime" mode. RSA54 * multi-prime is not supported.83 * Multi-prime (more than two primes) is not supported.89 /**< The version supported is "two-prime". */100 * first order, e.g. modulusN.pData[0] = MSB.106 * For key generation operations, the client MUST allocate the memory111 * For key generation operations, this field is unused. It is NOT124 * This structure contains the first representation that can be used for128 * first order, e.g. modulusN.pData[0] = MSB.[all …]
5 * Copyright(c) 2007-2023 Intel Corporation. All rights reserved.54 * Support is provided for FIPS PUB 186-2 with Change Notice 155 * specification, and optionally for FIPS PUB 186-3. If an56 * implementation does not support FIPS PUB 186-3, then the60 * Support for FIPS PUB 186-2 with Change Notice 1 implies supporting62 * - L = 1024, N = 16064 * Support for FIPS PUB 186-3 implies supporting the following choices67 * - L = 1024, N = 16068 * - L = 2048, N = 22469 * - L = 2048, N = 256[all …]
1 //===- SwitchLoweringUtils.h - Switch Lowering --------181 APInt First; global() member 190 : First(std::move(F)), Last(std::move(L)), SValue(SV), HeaderBB(H), First() function 209 APInt First; global() member [all...]
5 EVP_PKEY-FFC - EVP_PKEY DSA and DH/DHX shared FFC parameters.11 Diffie-Hellman key establishment algorithms specified in SP800-56A can also be20 For B<DSA> (and B<DH> that is not a named group) the FIPS186-4 standard21 specifies that the values used for FFC parameter generation are also required31 must be used for FIPS186-4.36 L<provider-keymgmt(7)/Common parameters>), the B<DSA>, B<DH> and B<DHX> keytype57 A DSA or Diffie-Hellman prime "p" value.61 A DSA or Diffie-Hellman generator "g" value.71 A DSA or Diffie-Hellman prime "q" value.75 An optional domain parameter I<seed> value used during generation and validation[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/pci/brcm,iproc-pci[all...]
4 - compatible:5 "brcm,iproc-pcie" for the first generation of PAXB based controller,7 "brcm,iproc-pcie-paxb-v2" for the second generation of PAXB-based9 "brcm,iproc-pcie-paxc" for the first generation of PAXC based11 "brcm,iproc-pcie-paxc-v2" for the second generation of PAXC based13 PAXB-based root complex is used for external endpoint devices. PAXC-based15 - reg: base address and length of the PCIe controller I/O register space16 - #interrupt-cells: set to <1>17 - interrupt-map-mask and interrupt-map, standard PCI properties to define the19 - linux,pci-domain: PCI domain ID. Should be unique for each host controller[all …]
1 /*-2 * Copyright (c) 2012-2016 Solarflare Communications Inc.81 dword = cursor->current[0]; in tlv_tag()96 dword = cursor->current[1]; in tlv_length()109 return ((uint8_t *)(&cursor->current[2])); in tlv_value()119 return ((uint8_t *)cursor->current); in tlv_item()124 * equivalent to tlv_n_words_for_len in mc-comms tlv.c127 (1 + 1 + (((length) + sizeof (uint32_t) - 1) / sizeof (uint32_t)))137 return (cursor->current + TLV_DWORD_COUNT(length)); in tlv_next_item_ptr()149 if (cursor->current == cursor->end) { in tlv_advance()[all …]
1 /* SPDX-License-Identifier: GPL-2.0-only */11 * Mediatek m4u generation 1 such as mt2701 has flat m4u port numbers,12 * the first port's id for larb[N] would be the last port's id of larb[N - 1]13 * plus one while larb[0]'s first port number is 0. The definition of15 * But m4u generation 2 like mt8173 have different port number, it use fixed16 * offset for each larb, the first port's id for larb[N] would be (N * 32).
1 .\"-2 .\" SPDX-License-Identifier: ISC4 .\" Copyright (c) 2005-2010 Damien Bergamini <damien.bergamini@free.fr>28 .Bd -ragged -offset indent39 .Bd -literal -offset indent48 The RT2500 chipset is the first generation of 802.11b/g adapters from Ralink.52 The RT2501 chipset is the second generation of 802.11a/b/g adapters from62 This chipset uses the MIMO (multiple-input multiple-output) technology with67 The RT2700 chipset is a low-cost version of the RT2800 chipset.72 The RT2800 chipset is the first generation of 802.11n adapters from Ralink.[all …]
1 /*-2 * SPDX-License-Identifier: BSD-2-Clause30 * VM Generation Counter driver32 * This driver has two functions: first, it provides a system event (both in35 * - Snapped and the snapshot is executing36 * - Recovered from backup37 * - Failed over in a HA setup38 * - Imported, copied, or cloned39 * - And unspecified if VM configuration changes might cause a changed40 * generation counter[all …]
4 - compatible: "brcm,ocotp" for the first generation Broadcom OTPC which is used5 in Cygnus and supports 32 bit read/write. Use "brcm,ocotp-v2" for the second6 generation Broadcom OTPC which is used in SoC's such as Stingray and supports7 64-bit read/write.8 - reg: Base address of the OTP controller.9 - brcm,ocotp-size: Amount of memory available, in 32 bit words16 brcm,ocotp-size = <2048>;