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/freebsd/sys/contrib/device-tree/Bindings/iio/adc/
H A Dsamsung,exynos-adc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/samsung,exynos-adc
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/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos5250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
46 #address-cells = <1>;
47 #size-cells = <0>;
49 cpu-map {
62 compatible = "arm,cortex-a15";
65 clock-names = "cpu";
66 operating-points-v2 = <&cpu0_opp_table>;
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H A Dexynos4412-itop-elite.dts1 // SPDX-License-Identifier: GPL-2.0
9 * Device tree source file for TOPEET iTop Exynos 4412 core board
13 /dts-v1/;
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pwm/pwm.h>
16 #include <dt-bindings/sound/samsung-i2s.h>
17 #include "exynos4412-itop-scp-core.dtsi"
21 compatible = "topeet,itop4412-elite", "samsung,exynos4412", "samsung,exynos4";
29 stdout-path = "serial2:115200n8";
33 compatible = "gpio-leds";
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H A Dexynos4412-p4note.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * Based on exynos4412-midas.dtsi.
10 /dts-v1/;
12 #include "exynos4412-ppmu-common.dtsi"
14 #include <dt-bindings/clock/maxim,max77686.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/linux-event-codes.h>
17 #include <dt-bindings/interrupt-controller/irq.h>
18 #include <dt-bindings/power/summit,smb347-charger.h>
19 #include "exynos-pinctrl.h"
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H A Dexynos4412-midas.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 /dts-v1/;
14 #include "exynos4412-ppmu-common.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-binding
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedExynosM5.td1 //=- AArch64SchedExynosM5.td - Samsung Exynos M5 Sched Defs --*- tablegen -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file defines the machine model for the Samsung Exynos M5 to support
12 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
15 // The Exynos-M5 is an advanced superscalar microprocessor with a 6-wide
16 // in-order stage for decode and dispatch and a wider issue stage.
17 // The execution units and loads and stores are out-of-order.
33 //===----------------------------------------------------------------------===//
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/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynos5433-tm2-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
11 /dts-v1/;
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/interrupt-controlle
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/freebsd/share/misc/
H A Dpci_vendors5 # Date: 2025-10-18 03:15:01
8 # the PCI ID Project at https://pci-ids.ucw.cz/.
14 # (version 2 or higher) or the 3-clause BSD License.
25 # device device_name <-- single tab
26 # subvendor subdevice subsystem_name <-- two tabs
30 # This is a relabelled RTL-8139
31 8139 AT-2500TX V3 Ethernet
41 7a09 PCI-to-PCI Bridge
51 7a19 PCI-to-PCI Bridge
57 7a29 PCI-to-PCI Bridge
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