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/linux/Documentation/devicetree/bindings/input/
H A Dsyna,rmi4.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jason A. Donenfeld <Jason@zx2c4.com>
11 - Matthias Schiffer <matthias.schiffer@ew.tq-group.com
12 - Vincent Huang <vincent.huang@tw.synaptics.com>
22 - syna,rmi4-i2c
23 - syna,rmi4-spi
28 '#address-cells':
31 '#size-cells':
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/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_util.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
4 * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
15 #define REG_MASK(n) ((BIT(n)) - 1)
41 * struct dpu_hw_blk - opaque hardware block object
52 * @ clip: clip shift
57 * @ thr_high: high threshold
59 * @ adjust_a: A-coefficients for mapping curve
60 * @ adjust_b: B-coefficients for mapping curve
61 * @ adjust_c: C-coefficients for mapping curve
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/linux/drivers/net/wireless/broadcom/b43/
H A Dphy_n.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 /* N-PHY registers. */
18 #define B43_NPHY_4WI_ADDR B43_PHY_N(0x00B) /* Four-wire bus address */
19 #define B43_NPHY_4WI_DATAHI B43_PHY_N(0x00C) /* Four-wire bus data high */
20 #define B43_NPHY_4WI_DATALO B43_PHY_N(0x00D) /* Four-wire bus data low */
21 #define B43_NPHY_BIST_STAT0 B43_PHY_N(0x00E) /* Built-in self test status 0 */
22 #define B43_NPHY_BIST_STAT1 B43_PHY_N(0x00F) /* Built-in self test status 1 */
26 #define B43_NPHY_C1_BCLIPBKOFF B43_PHY_N(0x01A) /* Core 1 barely clip backoff */
27 #define B43_NPHY_C1_CCK_BCLIPBKOFF B43_PHY_N(0x01B) /* Core 1 CCK barely clip backoff */
31 #define B43_NPHY_C1_CGAINI_CLIPGBKOFF 0x03E0 /* Clip gain backoff */
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/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8974pro-oneplus-bacon.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-msm8974pro.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 chassis-type = "handset";
12 qcom,msm-id = <194 0x10000>;
13 qcom,board-id = <8 0>;
21 stdout-path = "serial0:115200n8";
24 gpio-keys {
25 compatible = "gpio-keys";
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/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7870-a2corelte.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 chassis-type = "handset";
30 #address-cells = <2>;
31 #size-cells = <1>;
34 stdout-path = &serial2;
37 compatible = "simple-framebuffer";
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H A Dexynos7870-on7xelte.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 chassis-type = "handset";
30 #address-cells = <2>;
31 #size-cells = <1>;
34 stdout-path = &serial2;
37 compatible = "simple-framebuffer";
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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-lg-p895.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-lg-x3.dtsi"
11 pinctrl-names = "default";
12 pinctrl-0 = <&state_default>;
15 /* GNSS UART-B pinmux */
16 uartb-cts-rxd {
22 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
24 uartb-rts-txd {
30 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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H A Dtegra30-lg-x3.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/mfd/max77620.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-cpu-opp.dtsi"
11 #include "tegra30-cpu-opp-microvolt.dtsi"
14 chassis-type = "handset";
30 * pre-existing /chosen node to be available to insert the
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/linux/drivers/media/platform/st/sti/hva/
H A Dhva-h264.c1 // SPDX-License-Identifier: GPL-2.0
9 #include "hva-hw.h"
32 /* source buffer copy in YUV 420 MB-tiled format with size=16*256*3/2 */
41 /* factor for bitrate and cpb buffer size max values if profile >= high */
44 /* factor for bitrate and cpb buffer size max values if profile < high */
200 * @brc_type: selects the bit-rate control algorithm
205 * @non_VCL_NALU_Size: size of non-VCL NALUs (SPS, PPS, filler),
213 * @delay: End-to-End Initial Delay
251 * Bit 0-6 used for qp offset (value -64 to 63).
265 * YUV for the Y component.
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/linux/drivers/media/platform/qcom/venus/
H A Dhfi_plat_bufs_v6.c1 // SPDX-License-Identifier: GPL-2.0-only
88 * size for high resolution
117 u32 x, y, z; in size_h265d_lb_se_left_ctrl() local
119 x = ((height + 16 - 1) / 8) * MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE; in size_h265d_lb_se_left_ctrl()
120 y = ((height + 32 - 1) / 8) * MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE; in size_h265d_lb_se_left_ctrl()
121 z = ((height + 64 - 1) / 8) * MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE; in size_h265d_lb_se_left_ctrl()
123 return max3(x, y, z); in size_h265d_lb_se_left_ctrl()
144 * for high resolution
154 u32 x, y, z; in size_vpxd_lb_fe_left_ctrl() local
157 y = ((height + 31) >> 5) * MAX_FE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE; in size_vpxd_lb_fe_left_ctrl()
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/linux/drivers/media/i2c/
H A Dov772x.c1 // SPDX-License-Identifier: GPL-2.0
12 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
26 #include <linux/v4l2-mediabus.h>
31 #include <media/v4l2-ctrls.h>
32 #include <media/v4l2-device.h>
33 #include <media/v4l2-event.h>
34 #include <media/v4l2-fwnode.h>
35 #include <media/v4l2-image-sizes.h>
36 #include <media/v4l2-subdev.h>
41 #define GAIN 0x00 /* AGC - Gain control gain setting */
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/linux/drivers/media/usb/gspca/
H A Dstk1135.c1 // SPDX-License-Identifier: GPL-2.0-or-later
45 /* -- read a register -- */
48 struct usb_device *dev = gspca_dev->dev; in reg_r()
51 if (gspca_dev->usb_err < 0) in reg_r()
58 gspca_dev->usb_buf, 1, in reg_r()
62 index, gspca_dev->usb_buf[0]); in reg_r()
65 gspca_dev->usb_err = ret; in reg_r()
69 return gspca_dev->usb_buf[0]; in reg_r()
72 /* -- write a register -- */
76 struct usb_device *dev = gspca_dev->dev; in reg_w()
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H A Dspca508.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2009 Jean-Francois Moine <http://moinejf.free.fr>
58 * Initialization data: this is the first set-up data written to the
67 /* READ {0x0000, 0x8114} -> 0000: 00 */
79 /* --------------------------------------- */
82 /* --------------------------------------- */
91 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
92 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
96 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
97 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
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/linux/drivers/gpu/drm/msm/registers/adreno/
H A Da6xx.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
14 <!--
17 - "cmd" - the register is used outside of renderpass and blits,
19 - "rp_blit" - the register is used inside renderpass or blits
26 -->
32 <bitfield name="CP_IPC_INTR_0" pos="4" type="boolean" variants="A7XX-"/>
33 <bitfield name="CP_IPC_INTR_1" pos="5" type="boolean" variants="A7XX-"/>
44 <!-- Same as above but different name??: -->
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H A Da5xx.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
32 <value value="0x37" name="RB5_R10G10B10A2_UNORM"/> <!-- GL_RGB10_A2 -->
33 <value value="0x3a" name="RB5_R10G10B10A2_UINT"/> <!-- GL_RGB10_A2UI -->
34 <value value="0x42" name="RB5_R11G11B10_FLOAT"/> <!-- GL_R11F_G11F_B10F -->
251 <value value="8" name="BLIT_ZS"/> <!-- depth or combined depth+stencil -->
252 <value value="9" name="BLIT_S"/> <!-- separate stencil -->
255 <!-- see comment in a4xx.xml about script to extract countables from test-perf output -->
851 <!-- CP Interrupt bits -->
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/linux/drivers/net/wireless/intel/iwlegacy/
H A Dcommon.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
8 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 #define IL_ERR(f, a...) dev_err(&il->pci_dev->dev, f, ## a)
32 #define IL_WARN(f, a...) dev_warn(&il->pci_dev->dev, f, ## a)
33 #define IL_WARN_ONCE(f, a...) dev_warn_once(&il->pci_dev->dev, f, ## a)
34 #define IL_INFO(f, a...) dev_info(&il->pci_dev->dev, f, ## a)
46 #define U32_PAD(n) ((4-(n))&0x3)
48 /* CT-KILL constants */
56 * Use default noise value of -127 ... this is below the range of measurable
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/linux/drivers/video/fbdev/
H A Datafb.c2 * linux/drivers/video/atafb.c -- Atari builtin chipset frame buffer device
11 * - 03 Jan 95: Original version by Martin Schaller: The TT driver and
13 * - 09 Jan 95: Roman: I've added the hardware abstraction (hw_switch)
16 * - 07 May 95: Martin: Added colormap operations for the external driver
17 * - 21 May 95: Martin: Added support for overscan
19 * - Jul 95: Guenther Kelleter <guenther@pool.informatik.rwth-aachen.de>:
23 * - 27 Dec 95: Guenther: Implemented user definable video modes "user[0-7]"
25 * "R<x>;<y>;<depth>". (Makes sense only on Falcon)
28 * - 23 Sep 97: Juergen: added xres_virtual for cards like ProMST
29 * The external-part is legacy, therefore hardware-specific
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H A Damifb.c2 * linux/drivers/video/amifb.c -- Amiga builtin chipset frame buffer device
4 * Copyright (C) 1995-2003 Geert Uytterhoeven
30 * - 24 Jul 96: Copper generates now vblank interrupt and
32 * - 14 Jul 96: Rework and hopefully last ECS bugs fixed
33 * - 7 Mar 96: Hardware sprite support by Roman Zippel
34 * - 18 Feb 96: OCS and ECS support by Roman Zippel
36 * - 2 Dec 95: AGA version by Geert Uytterhoeven
107 ---------------------
111 +----------+---------------------------------------------+----------+-------+
115 +----------###############################################----------+-------+
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/linux/Documentation/networking/
H A Darcnet-hardware.rst1 .. SPDX-License-Identifier: GPL-2.0
11 2) This file is no longer Linux-specific. It should probably be moved out
17 e-mail apenwarr@worldvisions.ca with any settings for your particular card,
39 There are two "types" of ARCnet - STAR topology and BUS topology. This
46 well-designed standard. It uses something called "modified token passing"
47 which makes it completely incompatible with so-called "Token Ring" cards,
63 programming interface also means that when high-performance hardware
73 although they are generally kept down to the Ethernet-style 1500 bytes.
91 - Avery Pennraun <apenwarr@worldvisions.ca>
92 - Stephen A. Wood <saw@hallc1.cebaf.gov>
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/linux/tools/power/pm-graph/
H A Dsleepgraph.py2 # SPDX-License-Identifier: GPL-2.0-only
21 # https://www.intel.com/content/www/us/en/developer/topic-technology/open/pm-graph/overview.html
23 # git@github.com:intel/pm-graph
36 # CONFIG_DEVMEM=y
37 # CONFIG_PM_DEBUG=y
38 # CONFIG_PM_SLEEP_DEBUG=y
39 # CONFIG_FTRACE=y
40 # CONFIG_FUNCTION_TRACER=y
41 # CONFIG_FUNCTION_GRAPH_TRACER=y
42 # CONFIG_KPROBES=y
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/linux/kernel/sched/
H A Dfair.c1 // SPDX-License-Identifier: GPL-2.0
44 #include <linux/memory-tiers.h>
62 * The initial- and re-scaling of tunables is configurable
66 * SCHED_TUNABLESCALING_NONE - unscaled, always *1
67 * SCHED_TUNABLESCALING_LOG - scaled logarithmically, *1+ilog(ncpus)
68 * SCHED_TUNABLESCALING_LINEAR - scaled linear, *ncpus
75 * Minimal preemption granularity for CPU-bound tasks:
96 return -cpu; in arch_asym_cpu_priority()
116 * Amount of runtime to allocate from global (tg) to local (per-cfs_rq) pool
167 lw->weight += inc; in update_load_add()
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/linux/drivers/media/dvb-frontends/drx39xyj/
H A Ddrxj.c2 Copyright (c), 2004-2005,2007-2010 Trident Microsystems, Inc.
52 /*-----------------------------------------------------------------------------
54 ----------------------------------------------------------------------------*/
75 #define DRX39XX_MAIN_FIRMWARE "dvb-fe-drxj-mc-1.0.8.fw"
201 /*-----------------------------------------------------------------------------
203 ----------------------------------------------------------------------------*/
205 /*-----------------------------------------------------------------------------
207 ----------------------------------------------------------------------------*/
209 #define DRXJ_WAKE_UP_KEY (demod->my_i2c_dev_addr->i2c_addr)
438 #define AUD_VOLUME_DB_MIN -60
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