Searched refs:MDIO_WC_REG_RX66_SCW1_MASK (Results 1 – 2 of 2) sorted by relevance
648 #define MDIO_WC_REG_RX66_SCW1_MASK 0x83c7 macro
4448 MDIO_WC_REG_RX66_SCW1_MASK, 0xF0F0); in elink_warpcore_set_20G_DXGXS()