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Searched refs:CMD0 (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/intel/io/amd8111s/
H A Damd8111s_hw.c240 WRITE_REG32(pLayerPointers, MemBaseAddress + CMD0, 0x000F0F7F); in mdlClearHWConfig()
412 WRITE_REG32(pLayerPointers, pLayerPointers->pMdl->Mem_Address + CMD0, in mdlTransmit()
427 WRITE_REG32(pLayerPointers, pLayerPointers->pMdl->Mem_Address + CMD0, in mdlReceive()
800 WRITE_REG32(pLayerPointers, pLayerPointers->pMdl->Mem_Address + CMD0, in mdlStartChip()
804 WRITE_REG32(pLayerPointers, pLayerPointers->pMdl->Mem_Address + CMD0, in mdlStartChip()
820 WRITE_REG32(pLayerPointers, pMdl->Mem_Address + CMD0, INTREN); in mdlStopChip()
836 WRITE_REG32(pLayerPointers, pMdl->Mem_Address + CMD0, RUN); in mdlStopChip()
851 WRITE_REG32(pLayerPointers, pLayerPointers->pMdl->Mem_Address + CMD0, in mdlEnableInterrupt()
879 pLayerPointers->pMdl->Mem_Address + CMD0, INTREN); in mdlDisableInterrupt()
2123 WRITE_REG32(pLayerPointers, pLayerPointers->pMdl->Mem_Address + CMD0, in mdlRxFastSuspend()
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H A Damd8111s_hw.h281 #define CMD0 0x48 /* 32bit register */ macro