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Searched refs:dmac_cookie_addr (Results 1 – 3 of 3) sorted by relevance

/titanic_44/usr/src/uts/i86pc/io/amd_iommu/
H A Damd_iommu_page_tables.c648 uint64_t pa_4K = ((uint64_t)pt->pt_cookie.dmac_cookie_addr) >> 12; in amd_iommu_insert_pgtable_hash()
651 ASSERT((pt->pt_cookie.dmac_cookie_addr & AMD_IOMMU_PGTABLE_ALIGN) == 0); in amd_iommu_insert_pgtable_hash()
667 uint64_t pa_4K = (pt->pt_cookie.dmac_cookie_addr >> 12); in amd_iommu_remove_pgtable_hash()
670 ASSERT((pt->pt_cookie.dmac_cookie_addr & AMD_IOMMU_PGTABLE_ALIGN) == 0); in amd_iommu_remove_pgtable_hash()
699 ASSERT((pt->pt_cookie.dmac_cookie_addr & in amd_iommu_lookup_pgtable_hash()
701 if ((pt->pt_cookie.dmac_cookie_addr >> 12) == pgtable_pa_4K) { in amd_iommu_lookup_pgtable_hash()
879 ASSERT(pt->pt_cookie.dmac_cookie_addr != NULL); in amd_iommu_alloc_pgtable()
880 ASSERT((pt->pt_cookie.dmac_cookie_addr & AMD_IOMMU_PGTABLE_ALIGN) == 0); in amd_iommu_alloc_pgtable()
967 uint64_t next_pgtable_pa_4K = (pt->pt_cookie.dmac_cookie_addr) >> 12; in init_pde()
1080 dp->d_pgtable_root_4K = (pt->pt_cookie.dmac_cookie_addr) >> 12; in init_pt()
H A Damd_iommu_impl.h244 #define dmac_cookie_addr dmac_laddress macro
246 #define dmac_cookie_addr dmac_address macro
H A Damd_iommu_impl.c394 ASSERT((iommu->aiomt_buf_dma_cookie.dmac_cookie_addr in amd_iommu_setup_tables_and_buffers()
420 addr = (caddr_t)(uintptr_t)iommu->aiomt_buf_dma_cookie.dmac_cookie_addr; in amd_iommu_setup_tables_and_buffers()
1524 cookie_array[i].dmac_cookie_addr, in map_current_window()
1529 cookie_array[i].dmac_cookie_addr = (uintptr_t)start_va; in map_current_window()
1583 cookie_array[i].dmac_cookie_addr, in unmap_current_window()
1652 (void *)cookiep->dmac_cookie_addr, in amd_iommu_bindhdl()
1689 (void *)(uintptr_t)cookiep->dmac_cookie_addr, in amd_iommu_bindhdl()