Searched refs:MDIO_WC_REG_XGXSBLK0_XGXSCONTROL (Results 1 – 2 of 2) sorted by relevance
539 #define MDIO_WC_REG_XGXSBLK0_XGXSCONTROL 0x8000 macro
4376 MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, ~(1<<13)); in elink_warpcore_set_20G_force_KR2()4413 MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, (1<<13)); in elink_warpcore_set_20G_force_KR2()4919 MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, in elink_warpcore_link_reset()4970 MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, in elink_set_warpcore_loopback()5069 MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, &val16); in elink_warpcore_sequencer()5075 MDIO_WC_REG_XGXSBLK0_XGXSCONTROL, val16); in elink_warpcore_sequencer()