Searched refs:MDIO_WC_REG_RX66_CONTROL (Results 1 – 2 of 2) sorted by relevance
642 #define MDIO_WC_REG_RX66_CONTROL 0x83c0 macro
4038 {MDIO_WC_DEVAD, MDIO_WC_REG_RX66_CONTROL, 0x7415}, in elink_warpcore_enable_AN_KR()4239 MDIO_WC_REG_RX66_CONTROL, 0xF9); in elink_warpcore_set_10G_KR()4486 MDIO_WC_REG_RX66_CONTROL, ~(3<<13)); in elink_warpcore_set_sgmii_speed()4604 MDIO_WC_REG_RX66_CONTROL, (3<<13)); in elink_warpcore_clear_regs()5191 MDIO_WC_REG_RX66_CONTROL, 0x7415); in elink_warpcore_set_quad_mode()5236 MDIO_WC_REG_RX66_CONTROL, ~(3<<13)); in elink_warpcore_set_dual_mode()