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Searched refs:MDIO_WC_REG_CL82_USERB1_RX_CTRL10 (Results 1 – 2 of 2) sorted by relevance

/titanic_44/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dclc_reg.h657 #define MDIO_WC_REG_CL82_USERB1_RX_CTRL10 0x843a macro
/titanic_44/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c3941 {MDIO_WC_DEVAD, MDIO_WC_REG_CL82_USERB1_RX_CTRL10, 0x7537}, in elink_warpcore_enable_AN_KR2()
3980 {MDIO_WC_DEVAD, MDIO_WC_REG_CL82_USERB1_RX_CTRL10, 0xc4f0}, in elink_disable_kr2()