Searched refs:EMAC_REG_EMAC_MDIO_MODE (Results 1 – 3 of 3) sorted by relevance
/titanic_44/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/ |
H A D | lm_phy.c | 255 tmp=REG_RD(pdev,emac_base+EMAC_REG_EMAC_MDIO_MODE); in lm_mwrite() 258 REG_WR(pdev,emac_base+EMAC_REG_EMAC_MDIO_MODE,tmp); in lm_mwrite() 295 tmp=REG_RD(pdev,emac_base+EMAC_REG_EMAC_MDIO_MODE); in lm_mwrite() 298 REG_WR(pdev,emac_base+EMAC_REG_EMAC_MDIO_MODE,tmp); in lm_mwrite() 329 val=REG_RD(pdev,emac_base+EMAC_REG_EMAC_MDIO_MODE); in lm_mread() 332 REG_WR(pdev,emac_base+EMAC_REG_EMAC_MDIO_MODE,val); in lm_mread() 372 val=REG_RD(pdev,emac_base+EMAC_REG_EMAC_MDIO_MODE); in lm_mread() 375 REG_WR(pdev,emac_base+EMAC_REG_EMAC_MDIO_MODE,val); in lm_mread()
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/titanic_44/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/ |
H A D | emac_reg_driver.h | 245 #define EMAC_REG_EMAC_MDIO_MODE 0xb4 //ACCESS:?? DataWidth:0x20 macro
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/titanic_44/usr/src/uts/common/io/bnxe/577xx/common/ |
H A D | bnxe_clc.c | 1614 cur_mode = REG_RD(cb, emac_base + EMAC_REG_EMAC_MDIO_MODE); in elink_set_mdio_clk() 1632 REG_WR(cb, emac_base + EMAC_REG_EMAC_MDIO_MODE, new_mode); in elink_set_mdio_clk() 2870 mode = REG_RD(cb, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE); in elink_cl22_write() 2871 REG_WR(cb, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE, in elink_cl22_write() 2893 REG_WR(cb, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE, mode); in elink_cl22_write() 2906 mode = REG_RD(cb, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE); in elink_cl22_read() 2907 REG_WR(cb, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE, in elink_cl22_read() 2932 REG_WR(cb, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE, mode); in elink_cl22_read()
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