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Searched refs:MCERR_INT_WR (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/intel/io/intel_nb5000/
H A Dnb5000_init.c1003 MCERR_INT_WR(ERR_INT_ALL); in nb_int_init()
1017 MCERR_INT_WR(mcerr_int); in nb_int_init()
1044 MCERR_INT_WR(ERR_INT_ALL); in nb_int_fini()
1050 MCERR_INT_WR(nb_mcerr_int); in nb_int_fini()
1061 MCERR_INT_WR(emask_int|mc_mask_int); in nb_int_mask_mc()
1479 MCERR_INT_WR(l_mcerr_int); in nb_mask_mc_reset()
H A Dnb5000.h903 #define MCERR_INT_WR(val) if (nb_chipset == INTEL_NB_5400) { \ macro