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Searched refs:AMD_IOMMU_DEVTBL_V (Results 1 – 3 of 3) sorted by relevance

/titanic_41/usr/src/uts/i86pc/io/amd_iommu/
H A Damd_iommu_page_tables.c335 if (AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_V) == 0 && in init_devtbl()
340 if (AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_V) == 1 && in init_devtbl()
374 AMD_IOMMU_REG_SET64(&(entry[0]), AMD_IOMMU_DEVTBL_V, in init_devtbl()
449 V = AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_V); in amd_iommu_set_passthru()
467 AMD_IOMMU_REG_SET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_V, 0); in amd_iommu_set_passthru()
603 AMD_IOMMU_REG_SET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_V, 1); in amd_iommu_clear_devtbl_entry()
H A Damd_iommu_impl.h179 #define AMD_IOMMU_DEVTBL_V (0 << 16 | 0) macro
H A Damd_iommu_impl.c416 AMD_IOMMU_REG_SET64(dentry, AMD_IOMMU_DEVTBL_V, 1); in amd_iommu_setup_tables_and_buffers()