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Searched refs:regRDPCSTX1_RDPCSTX_INTERRUPT_CONTROL_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6599 #define regRDPCSTX1_RDPCSTX_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddpcs_4_2_3_offset.h233 #define regRDPCSTX1_RDPCSTX_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddpcs_4_2_2_offset.h216 #define regRDPCSTX1_RDPCSTX_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddpcs_4_2_0_offset.h227 #define regRDPCSTX1_RDPCSTX_INTERRUPT_CONTROL_BASE_IDX … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_4_1_0_offset.h14437 #define regRDPCSTX1_RDPCSTX_INTERRUPT_CONTROL_BASE_IDX … macro