xref: /linux/include/dt-bindings/mfd/stm32f4-rcc.h (revision 1ac731c529cd4d6adbce134754b51ff7d822b145)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * This header provides constants for the STM32F4 RCC IP
4  */
5 
6 #ifndef _DT_BINDINGS_MFD_STM32F4_RCC_H
7 #define _DT_BINDINGS_MFD_STM32F4_RCC_H
8 
9 /* AHB1 */
10 #define STM32F4_RCC_AHB1_GPIOA	0
11 #define STM32F4_RCC_AHB1_GPIOB	1
12 #define STM32F4_RCC_AHB1_GPIOC	2
13 #define STM32F4_RCC_AHB1_GPIOD	3
14 #define STM32F4_RCC_AHB1_GPIOE	4
15 #define STM32F4_RCC_AHB1_GPIOF	5
16 #define STM32F4_RCC_AHB1_GPIOG	6
17 #define STM32F4_RCC_AHB1_GPIOH	7
18 #define STM32F4_RCC_AHB1_GPIOI	8
19 #define STM32F4_RCC_AHB1_GPIOJ	9
20 #define STM32F4_RCC_AHB1_GPIOK	10
21 #define STM32F4_RCC_AHB1_CRC	12
22 #define STM32F4_RCC_AHB1_BKPSRAM	18
23 #define STM32F4_RCC_AHB1_CCMDATARAM	20
24 #define STM32F4_RCC_AHB1_DMA1	21
25 #define STM32F4_RCC_AHB1_DMA2	22
26 #define STM32F4_RCC_AHB1_DMA2D	23
27 #define STM32F4_RCC_AHB1_ETHMAC	25
28 #define STM32F4_RCC_AHB1_ETHMACTX	26
29 #define STM32F4_RCC_AHB1_ETHMACRX	27
30 #define STM32F4_RCC_AHB1_ETHMACPTP	28
31 #define STM32F4_RCC_AHB1_OTGHS		29
32 #define STM32F4_RCC_AHB1_OTGHSULPI	30
33 
34 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8))
35 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit)
36 
37 /* AHB2 */
38 #define STM32F4_RCC_AHB2_DCMI	0
39 #define STM32F4_RCC_AHB2_CRYP	4
40 #define STM32F4_RCC_AHB2_HASH	5
41 #define STM32F4_RCC_AHB2_RNG	6
42 #define STM32F4_RCC_AHB2_OTGFS	7
43 
44 #define STM32F4_AHB2_RESET(bit)	(STM32F4_RCC_AHB2_##bit + (0x14 * 8))
45 #define STM32F4_AHB2_CLOCK(bit)	(STM32F4_RCC_AHB2_##bit + 0x20)
46 
47 /* AHB3 */
48 #define STM32F4_RCC_AHB3_FMC	0
49 #define STM32F4_RCC_AHB3_QSPI	1
50 
51 #define STM32F4_AHB3_RESET(bit)	(STM32F4_RCC_AHB3_##bit + (0x18 * 8))
52 #define STM32F4_AHB3_CLOCK(bit)	(STM32F4_RCC_AHB3_##bit + 0x40)
53 
54 /* APB1 */
55 #define STM32F4_RCC_APB1_TIM2	0
56 #define STM32F4_RCC_APB1_TIM3	1
57 #define STM32F4_RCC_APB1_TIM4	2
58 #define STM32F4_RCC_APB1_TIM5	3
59 #define STM32F4_RCC_APB1_TIM6	4
60 #define STM32F4_RCC_APB1_TIM7	5
61 #define STM32F4_RCC_APB1_TIM12	6
62 #define STM32F4_RCC_APB1_TIM13	7
63 #define STM32F4_RCC_APB1_TIM14	8
64 #define STM32F4_RCC_APB1_WWDG	11
65 #define STM32F4_RCC_APB1_SPI2	14
66 #define STM32F4_RCC_APB1_SPI3	15
67 #define STM32F4_RCC_APB1_UART2	17
68 #define STM32F4_RCC_APB1_UART3	18
69 #define STM32F4_RCC_APB1_UART4	19
70 #define STM32F4_RCC_APB1_UART5	20
71 #define STM32F4_RCC_APB1_I2C1	21
72 #define STM32F4_RCC_APB1_I2C2	22
73 #define STM32F4_RCC_APB1_I2C3	23
74 #define STM32F4_RCC_APB1_CAN1	25
75 #define STM32F4_RCC_APB1_CAN2	26
76 #define STM32F4_RCC_APB1_PWR	28
77 #define STM32F4_RCC_APB1_DAC	29
78 #define STM32F4_RCC_APB1_UART7	30
79 #define STM32F4_RCC_APB1_UART8	31
80 
81 #define STM32F4_APB1_RESET(bit)	(STM32F4_RCC_APB1_##bit + (0x20 * 8))
82 #define STM32F4_APB1_CLOCK(bit)	(STM32F4_RCC_APB1_##bit + 0x80)
83 
84 /* APB2 */
85 #define STM32F4_RCC_APB2_TIM1	0
86 #define STM32F4_RCC_APB2_TIM8	1
87 #define STM32F4_RCC_APB2_USART1	4
88 #define STM32F4_RCC_APB2_USART6	5
89 #define STM32F4_RCC_APB2_ADC1	8
90 #define STM32F4_RCC_APB2_ADC2	9
91 #define STM32F4_RCC_APB2_ADC3	10
92 #define STM32F4_RCC_APB2_SDIO	11
93 #define STM32F4_RCC_APB2_SPI1	12
94 #define STM32F4_RCC_APB2_SPI4	13
95 #define STM32F4_RCC_APB2_SYSCFG	14
96 #define STM32F4_RCC_APB2_TIM9	16
97 #define STM32F4_RCC_APB2_TIM10	17
98 #define STM32F4_RCC_APB2_TIM11	18
99 #define STM32F4_RCC_APB2_SPI5	20
100 #define STM32F4_RCC_APB2_SPI6	21
101 #define STM32F4_RCC_APB2_SAI1	22
102 #define STM32F4_RCC_APB2_LTDC	26
103 #define STM32F4_RCC_APB2_DSI	27
104 
105 #define STM32F4_APB2_RESET(bit)	(STM32F4_RCC_APB2_##bit + (0x24 * 8))
106 #define STM32F4_APB2_CLOCK(bit)	(STM32F4_RCC_APB2_##bit + 0xA0)
107 
108 #endif /* _DT_BINDINGS_MFD_STM32F4_RCC_H */
109