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/illumos-gate/usr/src/uts/sun4u/ml/
H A Dmach_xc.S64 GET_TRACE_TICK(%g6, %g3)
80 TRACE_NEXT(%g4, %g6, %g3)
96 TRACE_PTR(%g3, %g4)
98 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi
99 stha %g0, [%g3 + TRAP_ENT_TL]%asi
102 stha %g4, [%g3 + TRAP_ENT_TT]%asi
103 stna %o7, [%g3 + TRAP_ENT_TPC]%asi
105 stna %g2, [%g3 + TRAP_ENT_SP]%asi /* sp = cpuset */
106 stna %o2, [%g3 + TRAP_ENT_TR]%asi /* tr = func */
107 stna %o3, [%g3 + TRAP_ENT_F1]%asi /* f1 = arg1 */
[all …]
H A Dtrap_table.S122 rdpr %tt, %g3 ;\
152 mov arg, %g3 ;\
194 mov T_FLUSHW, %g3 ;\
232 rdpr %tt, %g3 ;\
335 mov 12, %g3 ;\
336 sta %l3, [%sp + %g3]asi_num ;\
341 sta %l7, [%g4 + %g3]asi_num ;\
346 sta %i3, [%g4 + %g3]asi_num ;\
351 sta %i7, [%g4 + %g3]asi_num ;\
439 mov 12, %g3 ;\
[all …]
H A Dmach_interrupt.S79 srlx %g1, CTXREG_NEXT_SHIFT, %g3
80 brz,pt %g3, 7f ! nucleus pgsz is 0, no problem
81 sllx %g3, CTXREG_NEXT_SHIFT, %g3
85 clr %g3 ! kernel: PCONTEXT=0
86 xor %g3, %g1, %g3 ! user: clr N_pgsz0/1 bits
92 stxa %g3, [%g1]ASI_DMMU
109 ! g3: arg3
118 GET_TRACE_TICK(%g6, %g3)
134 TRACE_NEXT(%g4, %g6, %g3)
270 GET_TRACE_TICK(%g6, %g3)
[all …]
H A Dwbuf.S48 FAULT_WINTRACE(%g1, %g2, %g3, TT_F32_SN0)
75 mov T_WIN_OVERFLOW, %g3 ! arg3 = traptype
80 mov T_ALIGNMENT, %g3
182 FAULT_WINTRACE(%g1, %g2, %g3, TT_F64_SN0)
209 mov %g5, %g3 ! arg3 = traptype
214 mov T_ALIGNMENT, %g3
322 FAULT_WINTRACE(%g1, %g2, %g3, TT_F32_FN0)
339 mov T_WIN_UNDERFLOW, %g3
344 mov T_ALIGNMENT, %g3
359 FAULT_WINTRACE(%g1, %g2, %g3, TT_F32_FN1)
[all …]
/illumos-gate/usr/src/uts/sun4v/ml/
H A Dmach_xc.S66 GET_TRACE_TICK(%g6, %g3)
82 TRACE_NEXT(%g4, %g6, %g3)
98 TRACE_PTR(%g3, %g4)
100 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi
101 stha %g0, [%g3 + TRAP_ENT_TL]%asi
104 stha %g4, [%g3 + TRAP_ENT_TT]%asi
105 stna %o7, [%g3 + TRAP_ENT_TPC]%asi
107 stna %g2, [%g3 + TRAP_ENT_SP]%asi /* sp = cpuset */
108 stna %o2, [%g3 + TRAP_ENT_TR]%asi /* tr = func */
109 stna %o3, [%g3 + TRAP_ENT_F1]%asi /* f1 = arg1 */
[all …]
H A Dtrap_table.S123 rdpr %tt, %g3 ;\
157 mov arg, %g3 ;\
225 rdpr %tt, %g3 ;\
328 mov 12, %g3 ;\
329 sta %l3, [%sp + %g3]asi_num ;\
334 sta %l7, [%g4 + %g3]asi_num ;\
339 sta %i3, [%g4 + %g3]asi_num ;\
344 sta %i7, [%g4 + %g3]asi_num ;\
403 mov 12, %g3 ;\
405 lda [%sp + %g3]asi_num, %l3 ;\
[all …]
H A Dmach_interrupt.S56 ! %g3 queue base VA
60 mov CPU_MONDO_Q_HD, %g3
61 ldxa [%g3]ASI_QUEUE, %g6 ! %g6 = head ptr
70 ldx [%g2 + MCPU_CPU_Q_BASE], %g3 ! %g3 = queue base PA
412 * head offset(arg2) and %g3 is tail
429 stxa %g3, [%g4]ASI_QUEUE ! set head equal to tail
462 ldxa [%g4]ASI_QUEUE, %g3 ! %g3 = Q tail offset
464 cmp %g2, %g3
473 ldxa [%g4]ASI_QUEUE, %g3 ! %g3 = Q tail offset
520 cmp %g6, %g3 ! head == tail ??
[all …]
/illumos-gate/usr/src/common/crypto/arcfour/sun4u/
H A Darcfour_crypt_asm.S38 .register %g3,#scratch
80 ldub [%i5 + %g1], %g3
84 add %o2, %g3, %g2
104 stb %g3, [%i5 + %g2]
105 add %g3, %g4, %g5
116 ldub [%i5 + %g1], %g3
121 add %o2, %g3, %g2
143 stb %g3, [%i5 + %g2]
144 add %g3, %g4, %g5
155 ldub [%i5 + %g1], %g3
[all …]
/illumos-gate/usr/src/uts/sun4/brand/common/
H A Dbrand_solaris.S79 rdpr %tstate, %g3; /* %tstate.am is the trapping */
80 andcc %g3, TSTATE_AM, %g3; /* threads address mask bit */
97 rdpr %tstate, %g3; /* %tstate.am is the trapping */
98 andcc %g3, TSTATE_AM, %g3; /* threads address mask bit */
206 set XXX_emulation_table, %g3;
207 ldn [%g3], %g3;
208 add %g3, %l1, %g3;
209 ldub [%g3], %g3;
210 brz %g3, _exit;
221 ldn [%g2 + CPU_THREAD], %g3; /* get thread ptr */
[all …]
/illumos-gate/usr/src/uts/sun4u/cpu/
H A Dus3_cheetahplus_asm.S177 DO_TL1_CPU_LOGOUT(%g3, %g2, %g4, %g5, %g6, %g3, %g4)
183 cmp %g3, CLO_NESTING_MAX
201 PN_L2_FLUSHALL(%g3, %g4, %g5)
212 mov %g6, %g3
213 CHP_ECACHE_FLUSHALL(%g4, %g5, %g3)
224 ldxa [%g1 + CH_ERR_TL1_TMP]%asi, %g3
225 andcc %g3, CH_ERR_TSTATE_DC_ON, %g0
239 ldxa [%g0]ASI_DCU, %g3
240 or %g3, DCU_DC, %g3
241 stxa %g3, [%g0]ASI_DCU
[all …]
H A Dus3_cheetah_asm.S106 DO_TL1_CPU_LOGOUT(%g3, %g2, %g4, %g5, %g6, %g3, %g4)
112 cmp %g3, CLO_NESTING_MAX
152 ldxa [%g1 + CH_ERR_TL1_TMP]%asi, %g3
153 andcc %g3, CH_ERR_TSTATE_DC_ON, %g0
167 ldxa [%g0]ASI_DCU, %g3
168 or %g3, DCU_DC, %g3
169 stxa %g3, [%g0]ASI_DCU
175 ldxa [%g1 + CH_ERR_TL1_TMP]%asi, %g3
176 andcc %g3, CH_ERR_TSTATE_IC_ON, %g0
185 CH_ICACHE_FLUSHALL(%g4, %g5, %g6, %g3)
[all …]
H A Dus3_jalapeno_asm.S344 JP_FORCE_FULL_SPEED(%o3, %g1, %g2, %g3); /* %o3: saved speed */
355 JP_RESTORE_SPEED(%o3, %g1, %g2, %g3); /* %o3: saved speed */
371 ldxa [%g0]ASI_ESTATE_ERR, %g3
372 andn %g3, EN_REG_NCEEN + EN_REG_CEEN, %g4
389 and %g3, EN_REG_CEEN, %g4 ! store the CEEN value, TL=0
391 DO_CPU_LOGOUT(%g3, %g2, %g6, %g4, %g5, %g6, %g3, %g4)
408 stx %g3, [%g6 + 8]
409 JP_FORCE_FULL_SPEED(%g2, %g3, %g6, %g7) /* %g2: saved speed */
415 JP_RESTORE_SPEED(%g2, %g3, %g6, %g7) /* %g2: saved speed */
418 ldx [%g6 + 8], %g3
[all …]
H A Dopl_olympus_asm.S163 sethi %hi(ksfmmup), %g3
164 ldx [%g3 + %lo(ksfmmup)], %g3
165 cmp %g3, %g2
178 SFMMU_CPU_CNUM(%g2, %g6, %g3) ! %g6 = sfmmu cnum on this CPU
213 and %g4, %g2, %g3 /* g3 = pgcnt - 1 */
214 add %g3, 1, %g3 /* g3 = pgcnt */
234 deccc %g3 /* decr pgcnt */
267 deccc %g3 /* decr pgcnt */
364 mov IDDR_2, %g3
375 stxa %o2, [%g3]ASI_INTR_DISPATCH
[all …]
H A Dus3_common_asm.S268 sethi %hi(ksfmmup), %g3
269 ldx [%g3 + %lo(ksfmmup)], %g3
270 cmp %g3, %g2
283 SFMMU_CPU_CNUM(%g2, %g6, %g3) ! %g6 = sfmmu cnum on this CPU
318 and %g4, %g2, %g3 /* g3 = pgcnt - 1 */
319 add %g3, 1, %g3 /* g3 = pgcnt */
339 deccc %g3 /* decr pgcnt */
372 deccc %g3 /* decr pgcnt */
422 DCACHE_FLUSHPAGE(%g1, %g2, %g3, %g4, %g5)
444 DCACHE_FLUSHCOLOR(%g1, 0, %g2, %g3, %g4)
[all …]
/illumos-gate/usr/src/common/bignum/sun4u/
H A Dmont_mulf_v9.s76 /* 000000 0 */ .register %g3,#scratch
132 /* 000000 57 */ or %g0,%o7,%g3
140 /* 0x001c */ or %g0,%g3,%o7
250 /* 0x0038 77 */ or %g0,-1,%g3
251 /* 0x003c */ srl %g3,0,%l4
282 /* 0x0088 91 */ and %o0,%l3,%g3
294 /* 0x00b8 91 */ sllx %g3,16,%g5
295 /* 0x00bc 87 */ or %g0,48,%g3
302 /* 0x00d8 */ ldd [%i1+%g3],%f0
305 /* 0x00e4 89 */ srax %o1,32,%g3
[all …]
H A Dmont_mulf_v8plus.s176 /* 0x0034 */ add %o2,1,%g3
186 /* 0x005c 74 */ cmp %g3,3
208 /* 0x0078 */ sllx %o0,16,%g3
210 /* 0x0080 74 */ add %o0,%g3,%o4
225 /* 0x00bc 76 */ ldx [%sp+104],%g3
229 /* 0x00cc 84 */ or %g0,%g3,%g4
241 /* 0x00f8 80 */ and %g1,%o1,%g3
242 /* 0x00fc */ sllx %g3,16,%g5
243 /* 0x0100 77 */ and %g4,%o3,%g3
244 /* 0x0104 74 */ add %g3,%g5,%g3
[all …]
/illumos-gate/usr/src/uts/sfmmu/ml/
H A Dsfmmu_asm.S652 ldstub [%o0 + SFMMU_CTX_LOCK], %g3 ! %g3 = per process (PP) lock
654 brz %g3, 5f
657 brnz,a,pt %g3, 4b ! spin if lock is 1
658 ldub [%o0 + SFMMU_CTX_LOCK], %g3
660 ldstub [%o0 + SFMMU_CTX_LOCK], %g3 ! %g3 = PP lock
705 add %o3, MMU_CTX_CNUM, %g3
719 ld [%g3], %o1
735 ! %g3 = addr of mmu_ctxp->cnum
737 cas [%g3], %o1, %o5
740 ld [%g3], %o1
[all …]
H A Dsfmmu_kdi.S114 cmp %g3, TTE8K; \
117 mulx %g3, 3, %g5; \
127 sllx %g3, HTAG_REHASH_SHIFT, %g6; \
208 add %g4, HMEBLK_MISC, %g3; \
209 lda [%g3]ASI_MEM, %g3; \
210 and %g3, HBLK_SZMASK, %g3; /* ttesz in %g3 */ \
212 cmp %g3, TTE8K; \
264 set kdi_trap_vatotte, %g3
265 jmpl %g3, %g7 /* => %g1: TTE or 0 */
295 mov 1, %g3 /* VA %g1, ksfmmup %g2, idx %g3 */
[all …]
/illumos-gate/usr/src/uts/sun4u/vm/
H A Dmach_sfmmu_asm.S76 sethi %hi(ksfmmup), %g3
77 ldx [%g3 + %lo(ksfmmup)], %g3
78 cmp %g1, %g3
85 mov MMU_SCONTEXT, %g3
103 ldxa [%g3]ASI_MMU_CTX, %g5 /* %g5 = pgsz | sec-ctx */
110 stxa %g2, [%g3]ASI_MMU_CTX /* set invalid ctx */
114 ldxa [%g7]ASI_MMU_CTX, %g3 /* get pgz | pri-ctx */
115 and %g3, %g4, %g5 /* %g5 = pri-ctx */
118 srlx %g3, CTXREG_NEXT_SHIFT, %g3 /* %g3 = nucleus pgsz */
119 sllx %g3, CTXREG_NEXT_SHIFT, %g3 /* need to preserve nucleus pgsz */
[all …]
/illumos-gate/usr/src/common/crypto/des/sun4u/
H A Ddes_crypt_asm.s87 .register %g3,#scratch
2286 sethi %hi(0xaaaaaaaa), %g3
2293 or %g3, %lo(0xaaaaaaaa), %g3
2295 sllx %g3, 32, %o0
2297 or %g3, %o0, %g3 ! 0xaaaaaaaaaaaaaaaa
2299 srlx %g3, 1, %g2 ! 0x5555555555555555
2300 and %i1, %g3, %g1
2302 sllx %g1, 7, %g3
2308 or %g1, %g3, %g1
2355 ldx [%i5 + 96], %g3 ! top_1
[all …]
/illumos-gate/usr/src/uts/sparc/dtrace/
H A Ddtrace_asm.S105 sub %g1, %o0, %g3
106 brgez,a,pt %g3, 0f
107 wrpr %g3, %cwp
113 add %g4, %g3, %g3
114 inc %g3
115 wrpr %g3, %cwp
207 lduh [%o3], %g3
208 andcc %g3, CPU_DTRACE_BADADDR, %g0
234 lduh [%o3], %g3
235 andcc %g3, CPU_DTRACE_BADADDR, %g0
[all …]
/illumos-gate/usr/src/uts/sparc/v9/ml/
H A Dsyscall_trap.S154 set sysent, %g3 ! load address of vector table
159 add %g3, %g4, %l4
160 ldn [%l4 + SY_CALLC], %g3 ! load system call handler
162 call %g3 ! call system call handler
184 GET_TRACE_TICK(%g2, %g3)
201 TRACE_NEXT(%g4, %g2, %g3) ! set new trace pointer
225 mov CCR_IC, %g3
226 sllx %g3, TSTATE_CCR_SHIFT, %g3
228 andn %g1, %g3, %g1 ! clear carry bit for no error
388 set sysent32, %g3 ! load address of vector table
[all …]
/illumos-gate/usr/src/uts/sun4v/vm/
H A Dmach_sfmmu_asm.S81 sethi %hi(ksfmmup), %g3
82 ldx [%g3 + %lo(ksfmmup)], %g3
83 cmp %g1, %g3
91 mov MMU_SCONTEXT, %g3
93 ldxa [%g3]ASI_MMU_CTX, %g5 /* %g5 = sec-ctx */
98 stxa %g2, [%g3]ASI_MMU_CTX /* set invalid ctx */
111 mov %o0, %g3
126 mov %g3, %o0
146 ldxa [%g3]ASI_MMU_CTX, %g5 /* %g5 = sec-ctx */
151 stxa %g2, [%g3]ASI_MMU_CTX /* set sec-ctx to invalid */
[all …]
/illumos-gate/usr/src/uts/sun4/ml/
H A Dinterrupt.S51 ! %g3, %g5, %g6, %g7 - temps
71 and %g7, IV_SOFTINT_MT, %g3 ! %g3 = iv->iv_flags & IV_SOFTINT_MT
72 brz,pt %g3, 1f ! check for multi target softint
74 ld [%g1 + CPU_ID], %g3 ! for multi target softint, use cpuid
75 sll %g3, CPTRSHIFT, %g3 ! convert cpuid to offset address
76 add %g7, %g3, %g7 ! %g5 = &iv->iv_xpil_next[cpuid]
78 ldn [%g7], %g3 ! %g3 = next intr_vec_t
79 brnz,pn %g3, 2f ! branch if next intr_vec_t non NULL
80 stn %g3, [%g6] ! update cpu->m_cpu.intr_head[pil]
98 stna %g3, [%g5 + TRAP_ENT_F1]%asi ! trap_f1 = next intr_vec
[all …]
/illumos-gate/usr/src/uts/sun4v/cpu/
H A Dcommon_asm.S260 GET_HRESTIME(%o1,%o2,%o3,%o4,%o5,%g1,%g2,%g3,%g4,__LINE__)
272 GET_HRESTIME(%o0,%o2,%o3,%o4,%o5,%g1,%g2,%g3,%g4,__LINE__)
311 GET_HRESTIME(%o0,%o1,%g1,%g2,%g3,%g4,%g5,%o2,%o3,__LINE__)
312 CONV_HRESTIME(%o0, %o1, %g1, %g2, %g3)
332 CPU_ADDR(%g2, %g3) ! CPU struct ptr to %g2
334 ldn [%g2 + T_LWP], %g3 ! lwp pointer to %g3
340 ldx [%g3 + LWP_STATE_START], %g1 ! ms_state_start
346 ldx [%g3 + LWP_ACCT_USER], %g1 ! ms_acct[LMS_USER]
524 GET_NATIVE_TIME(%g1,%g2,%g3,__LINE__)
530 GET_NATIVE_TIME(%g1,%g2,%g3,__LINE__)
[all …]

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