Searched refs:d_intrmask (Results 1 – 2 of 2) sorted by relevance
730 dev->d_intrmask &= ~Y2_IS_HW_ERR; in yge_reset()1322 dev->d_intrmask = Y2_IS_HW_ERR | Y2_IS_STAT_BMU; in yge_attach()2289 (status & dev->d_intrmask) == 0) { /* Stray interrupt ? */ in yge_intr()2310 dev->d_intrmask &= ~(Y2_IS_CHK_RX1 | Y2_IS_CHK_RX2); in yge_intr()2311 CSR_WRITE_4(dev, B0_IMSK, dev->d_intrmask); in yge_intr()2317 dev->d_intrmask &= ~(Y2_IS_CHK_TXA1 | Y2_IS_CHK_TXA2); in yge_intr()2318 CSR_WRITE_4(dev, B0_IMSK, dev->d_intrmask); in yge_intr()2608 dev->d_intrmask |= Y2_IS_PORT_A; in yge_start_port()2611 dev->d_intrmask |= Y2_IS_PORT_B; in yge_start_port()2616 CSR_WRITE_4(dev, B0_IMSK, dev->d_intrmask); in yge_start_port()[all …]
2140 uint32_t d_intrmask; member