Home
last modified time | relevance | path

Searched refs:zeroReg (Results 1 – 1 of 1) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PreLegalizerCombiner.cpp494 Register zeroReg = B.buildConstant(LLT::scalar(64), 0).getReg(0); in applyExtUaddvToUaddlv() local
522 {MidScalarLLT}, {addlvReg, zeroReg}) in applyExtUaddvToUaddlv()
526 {LLT::scalar(32)}, {addlvReg, zeroReg}) in applyExtUaddvToUaddlv()