/freebsd/crypto/openssl/crypto/sha/asm/ |
H A D | keccak1600-avx512vl.pl | 56 my ($R20,$R01,$R31,$R21,$R41,$R11) = map("%ymm$_",(16..21)); 96 vprolvq $R20,$A20,$A20 210 vmovdqa64 0*32(%r8),$R20 # load "rhotate" indices 296 vmovdqa64 0*32(%r8),$R20 # load "rhotate" indices
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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRRegisterInfo.td | 56 def R20 : AVRReg<20, "r20">, DwarfRegNum<[20]>; 85 def R21R20 : AVRReg<20, "r21:r20", [R20, R21]>, DwarfRegNum<[20]>; 101 def R20R19 : AVRReg<19, "r20:r19", [R19, R20]>, DwarfRegNum<[19]>; 117 add R24, R25, R18, R19, R20, R21, R22, R23, 133 add R24, R25, R18, R19, R20, R21, R22, R23, 141 (add R23, R22, R21, R20, R19, R18, R17, R16)>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
H A D | LanaiBaseInfo.h | 89 case Lanai::R20: in getLanaiRegisterNumbering()
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/freebsd/sys/contrib/libsodium/src/libsodium/crypto_onetimeauth/poly1305/sse2/ |
H A D | poly1305_sse2.c | 211 xmmi R20, R21, R22, R23, R24, S21, S22, S23, S24; in poly1305_blocks() local 267 R20 = _mm_shuffle_epi32(T4, _MM_SHUFFLE(1, 1, 0, 0)); in poly1305_blocks() 275 R20 = _mm_shuffle_epi32(T0, _MM_SHUFFLE(0, 0, 0, 0)); in poly1305_blocks() 444 T14 = R20; in poly1305_blocks() 568 T14 = R20; in poly1305_blocks()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 122 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in getCalleeSavedRegs() 131 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in getCalleeSavedRegs()
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H A D | HexagonFrameLowering.h | 99 { Hexagon::R21, -20 }, { Hexagon::R20, -24 }, { Hexagon::D10, -24 }, in getCalleeSavedSpillSlots()
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H A D | HexagonRegisterInfo.td | 147 def D10 : Rd<20, "r21:20", [R20, R21]>, DwarfRegNum<[52]>; 539 (add R23, R22, R21, R20, R19, R18, R17, R16, 643 : CalleeSavedRegs<(add R16, R17, R18, R19, R20, R21, R22, R23,
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchExpandPseudoInsts.cpp | 538 Register ScratchReg = LoongArch::R20; // $t8 in expandLargeAddressLoad() 637 Register ScratchReg = LoongArch::R20; // $t8 in expandLoadAddressTLSDescPcLarge() 703 Register ScratchReg = IsTailCall ? LoongArch::R20 : LoongArch::R1; in expandFunctionCALL()
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H A D | LoongArchInstrInfo.td | 1487 let isCall = 1, Defs = [R1, R20], Size = 8 in 1498 let isCall = 1, Defs = [R1, R20], Size = 24 in 1537 Uses = [R3], Defs = [R20], Size = 8 in 1549 Uses = [R3], Defs = [R19, R20], Size = 24 in 1623 let Defs = [R20], Size = 20 in { 1638 } // Defs = [R20], Size = 20 1646 let Defs = [R20], Size = 20 in { 1655 } // Defs = [R20], Size = 20 1680 isCodeGenOnly = 0, isAsmParserOnly = 1, Defs = [R1, R4, R20], Size = 32 in
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H A D | LoongArchRegisterInfo.td | 80 def R20 : LoongArchReg<20, "r20", ["t8"]>, DwarfRegNum<[20]>;
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H A D | LoongArchInstrInfo.cpp | 467 Scav = LoongArch::R20; in insertIndirectBranch()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
H A D | LanaiDisassembler.cpp | 159 Lanai::R18, Lanai::R19, Lanai::R20, Lanai::R21, Lanai::R22, Lanai::R23,
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/ |
H A D | X86DisassemblerDecoder.h | 308 ENTRY(R20) \ 342 ENTRY(R20) \
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/freebsd/crypto/openssl/ |
H A D | NOTES-ANDROID.md | 21 longer supported with NDK R20+).
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCCallingConv.td | 302 def CSR_SVR432_COMM : CalleeSavedRegs<(add R14, R15, R16, R17, R18, R19, R20, 324 def CSR_AIX32 : CalleeSavedRegs<(add R13, R14, R15, R16, R17, R18, R19, R20,
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
H A D | CSKYRegisterInfo.td | 72 def R20 : CSKYReg<20, "r20", ["t4"]>, DwarfRegNum<[20]>;
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H A D | CSKYFrameLowering.cpp | 388 static const MCPhysReg CSHRegs[] = {CSKY::R18, CSKY::R19, CSKY::R20, in determineCalleeSaves()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/ |
H A D | ARCDisassembler.cpp | 127 ARC::R14, ARC::R15, ARC::R16, ARC::R17, ARC::R18, ARC::R19, ARC::R20,
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/ |
H A D | HexagonDisassembler.cpp | 563 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, Hexagon::R24, in DecodeIntRegsRegisterClass() 578 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in DecodeGeneralSubRegsRegisterClass()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/ |
H A D | AVRDisassembler.cpp | 65 AVR::R14, AVR::R15, AVR::R16, AVR::R17, AVR::R18, AVR::R19, AVR::R20,
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCChecker.cpp | 751 Register = Hexagon::R20; in compoundRegisterMap()
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H A D | HexagonMCDuplexInfo.cpp | 680 case Hexagon::R20: in addOps()
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H A D | HexagonMCInstrInfo.cpp | 299 case R20: in getDuplexRegisterNumbering()
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/Disassembler/ |
H A D | CSKYDisassembler.cpp | 68 CSKY::R14, CSKY::R15, CSKY::R16, CSKY::R17, CSKY::R18, CSKY::R19, CSKY::R20,
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86BaseInfo.h | 1338 case X86::R20: in needSIB()
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