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Searched refs:R20 (Results 1 – 25 of 30) sorted by relevance

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/freebsd/crypto/openssl/crypto/sha/asm/
H A Dkeccak1600-avx512vl.pl56 my ($R20,$R01,$R31,$R21,$R41,$R11) = map("%ymm$_",(16..21));
96 vprolvq $R20,$A20,$A20
210 vmovdqa64 0*32(%r8),$R20 # load "rhotate" indices
296 vmovdqa64 0*32(%r8),$R20 # load "rhotate" indices
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRRegisterInfo.td56 def R20 : AVRReg<20, "r20">, DwarfRegNum<[20]>;
85 def R21R20 : AVRReg<20, "r21:r20", [R20, R21]>, DwarfRegNum<[20]>;
101 def R20R19 : AVRReg<19, "r20:r19", [R19, R20]>, DwarfRegNum<[19]>;
117 add R24, R25, R18, R19, R20, R21, R22, R23,
133 add R24, R25, R18, R19, R20, R21, R22, R23,
141 (add R23, R22, R21, R20, R19, R18, R17, R16)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiBaseInfo.h89 case Lanai::R20: in getLanaiRegisterNumbering()
/freebsd/sys/contrib/libsodium/src/libsodium/crypto_onetimeauth/poly1305/sse2/
H A Dpoly1305_sse2.c211 xmmi R20, R21, R22, R23, R24, S21, S22, S23, S24; in poly1305_blocks() local
267 R20 = _mm_shuffle_epi32(T4, _MM_SHUFFLE(1, 1, 0, 0)); in poly1305_blocks()
275 R20 = _mm_shuffle_epi32(T0, _MM_SHUFFLE(0, 0, 0, 0)); in poly1305_blocks()
444 T14 = R20; in poly1305_blocks()
568 T14 = R20; in poly1305_blocks()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp122 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in getCalleeSavedRegs()
131 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in getCalleeSavedRegs()
H A DHexagonFrameLowering.h99 { Hexagon::R21, -20 }, { Hexagon::R20, -24 }, { Hexagon::D10, -24 }, in getCalleeSavedSpillSlots()
H A DHexagonRegisterInfo.td147 def D10 : Rd<20, "r21:20", [R20, R21]>, DwarfRegNum<[52]>;
539 (add R23, R22, R21, R20, R19, R18, R17, R16,
643 : CalleeSavedRegs<(add R16, R17, R18, R19, R20, R21, R22, R23,
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchExpandPseudoInsts.cpp538 Register ScratchReg = LoongArch::R20; // $t8 in expandLargeAddressLoad()
637 Register ScratchReg = LoongArch::R20; // $t8 in expandLoadAddressTLSDescPcLarge()
703 Register ScratchReg = IsTailCall ? LoongArch::R20 : LoongArch::R1; in expandFunctionCALL()
H A DLoongArchInstrInfo.td1487 let isCall = 1, Defs = [R1, R20], Size = 8 in
1498 let isCall = 1, Defs = [R1, R20], Size = 24 in
1537 Uses = [R3], Defs = [R20], Size = 8 in
1549 Uses = [R3], Defs = [R19, R20], Size = 24 in
1623 let Defs = [R20], Size = 20 in {
1638 } // Defs = [R20], Size = 20
1646 let Defs = [R20], Size = 20 in {
1655 } // Defs = [R20], Size = 20
1680 isCodeGenOnly = 0, isAsmParserOnly = 1, Defs = [R1, R4, R20], Size = 32 in
H A DLoongArchRegisterInfo.td80 def R20 : LoongArchReg<20, "r20", ["t8"]>, DwarfRegNum<[20]>;
H A DLoongArchInstrInfo.cpp467 Scav = LoongArch::R20; in insertIndirectBranch()
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/
H A DLanaiDisassembler.cpp159 Lanai::R18, Lanai::R19, Lanai::R20, Lanai::R21, Lanai::R22, Lanai::R23,
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/
H A DX86DisassemblerDecoder.h308 ENTRY(R20) \
342 ENTRY(R20) \
/freebsd/crypto/openssl/
H A DNOTES-ANDROID.md21 longer supported with NDK R20+).
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.td302 def CSR_SVR432_COMM : CalleeSavedRegs<(add R14, R15, R16, R17, R18, R19, R20,
324 def CSR_AIX32 : CalleeSavedRegs<(add R13, R14, R15, R16, R17, R18, R19, R20,
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYRegisterInfo.td72 def R20 : CSKYReg<20, "r20", ["t4"]>, DwarfRegNum<[20]>;
H A DCSKYFrameLowering.cpp388 static const MCPhysReg CSHRegs[] = {CSKY::R18, CSKY::R19, CSKY::R20, in determineCalleeSaves()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/
H A DARCDisassembler.cpp127 ARC::R14, ARC::R15, ARC::R16, ARC::R17, ARC::R18, ARC::R19, ARC::R20,
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp563 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, Hexagon::R24, in DecodeIntRegsRegisterClass()
578 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in DecodeGeneralSubRegsRegisterClass()
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/
H A DAVRDisassembler.cpp65 AVR::R14, AVR::R15, AVR::R16, AVR::R17, AVR::R18, AVR::R19, AVR::R20,
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCChecker.cpp751 Register = Hexagon::R20; in compoundRegisterMap()
H A DHexagonMCDuplexInfo.cpp680 case Hexagon::R20: in addOps()
H A DHexagonMCInstrInfo.cpp299 case R20: in getDuplexRegisterNumbering()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/Disassembler/
H A DCSKYDisassembler.cpp68 CSKY::R14, CSKY::R15, CSKY::R16, CSKY::R17, CSKY::R18, CSKY::R19, CSKY::R20,
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86BaseInfo.h1338 case X86::R20: in needSIB()

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