1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright (c) 2021, Intel Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the Intel Corporation nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _IAVF_ADMINQ_CMD_H_ 33 #define _IAVF_ADMINQ_CMD_H_ 34 35 /* This header file defines the iavf Admin Queue commands and is shared between 36 * iavf Firmware and Software. Do not change the names in this file to IAVF 37 * because this file should be diff-able against the iavf version, even 38 * though many parts have been removed in this VF version. 39 * 40 * This file needs to comply with the Linux Kernel coding style. 41 */ 42 43 #define IAVF_FW_API_VERSION_MAJOR 0x0001 44 #define IAVF_FW_API_VERSION_MINOR_X722 0x0006 45 #define IAVF_FW_API_VERSION_MINOR_X710 0x0007 46 47 #define IAVF_FW_MINOR_VERSION(_h) ((_h)->mac.type == IAVF_MAC_XL710 ? \ 48 IAVF_FW_API_VERSION_MINOR_X710 : \ 49 IAVF_FW_API_VERSION_MINOR_X722) 50 51 /* API version 1.7 implements additional link and PHY-specific APIs */ 52 #define IAVF_MINOR_VER_GET_LINK_INFO_XL710 0x0007 53 /* API version 1.6 for X722 devices adds ability to stop FW LLDP agent */ 54 #define IAVF_MINOR_VER_FW_LLDP_STOPPABLE_X722 0x0006 55 56 struct iavf_aq_desc { 57 __le16 flags; 58 __le16 opcode; 59 __le16 datalen; 60 __le16 retval; 61 __le32 cookie_high; 62 __le32 cookie_low; 63 union { 64 struct { 65 __le32 param0; 66 __le32 param1; 67 __le32 param2; 68 __le32 param3; 69 } internal; 70 struct { 71 __le32 param0; 72 __le32 param1; 73 __le32 addr_high; 74 __le32 addr_low; 75 } external; 76 u8 raw[16]; 77 } params; 78 }; 79 80 /* Flags sub-structure 81 * |0 |1 |2 |3 |4 |5 |6 |7 |8 |9 |10 |11 |12 |13 |14 |15 | 82 * |DD |CMP|ERR|VFE| * * RESERVED * * |LB |RD |VFC|BUF|SI |EI |FE | 83 */ 84 85 /* command flags and offsets*/ 86 #define IAVF_AQ_FLAG_DD_SHIFT 0 87 #define IAVF_AQ_FLAG_CMP_SHIFT 1 88 #define IAVF_AQ_FLAG_ERR_SHIFT 2 89 #define IAVF_AQ_FLAG_VFE_SHIFT 3 90 #define IAVF_AQ_FLAG_LB_SHIFT 9 91 #define IAVF_AQ_FLAG_RD_SHIFT 10 92 #define IAVF_AQ_FLAG_VFC_SHIFT 11 93 #define IAVF_AQ_FLAG_BUF_SHIFT 12 94 #define IAVF_AQ_FLAG_SI_SHIFT 13 95 #define IAVF_AQ_FLAG_EI_SHIFT 14 96 #define IAVF_AQ_FLAG_FE_SHIFT 15 97 98 #define IAVF_AQ_FLAG_DD (1 << IAVF_AQ_FLAG_DD_SHIFT) /* 0x1 */ 99 #define IAVF_AQ_FLAG_CMP (1 << IAVF_AQ_FLAG_CMP_SHIFT) /* 0x2 */ 100 #define IAVF_AQ_FLAG_ERR (1 << IAVF_AQ_FLAG_ERR_SHIFT) /* 0x4 */ 101 #define IAVF_AQ_FLAG_VFE (1 << IAVF_AQ_FLAG_VFE_SHIFT) /* 0x8 */ 102 #define IAVF_AQ_FLAG_LB (1 << IAVF_AQ_FLAG_LB_SHIFT) /* 0x200 */ 103 #define IAVF_AQ_FLAG_RD (1 << IAVF_AQ_FLAG_RD_SHIFT) /* 0x400 */ 104 #define IAVF_AQ_FLAG_VFC (1 << IAVF_AQ_FLAG_VFC_SHIFT) /* 0x800 */ 105 #define IAVF_AQ_FLAG_BUF (1 << IAVF_AQ_FLAG_BUF_SHIFT) /* 0x1000 */ 106 #define IAVF_AQ_FLAG_SI (1 << IAVF_AQ_FLAG_SI_SHIFT) /* 0x2000 */ 107 #define IAVF_AQ_FLAG_EI (1 << IAVF_AQ_FLAG_EI_SHIFT) /* 0x4000 */ 108 #define IAVF_AQ_FLAG_FE (1 << IAVF_AQ_FLAG_FE_SHIFT) /* 0x8000 */ 109 110 /* error codes */ 111 enum iavf_admin_queue_err { 112 IAVF_AQ_RC_OK = 0, /* success */ 113 IAVF_AQ_RC_EPERM = 1, /* Operation not permitted */ 114 IAVF_AQ_RC_ENOENT = 2, /* No such element */ 115 IAVF_AQ_RC_ESRCH = 3, /* Bad opcode */ 116 IAVF_AQ_RC_EINTR = 4, /* operation interrupted */ 117 IAVF_AQ_RC_EIO = 5, /* I/O error */ 118 IAVF_AQ_RC_ENXIO = 6, /* No such resource */ 119 IAVF_AQ_RC_E2BIG = 7, /* Arg too long */ 120 IAVF_AQ_RC_EAGAIN = 8, /* Try again */ 121 IAVF_AQ_RC_ENOMEM = 9, /* Out of memory */ 122 IAVF_AQ_RC_EACCES = 10, /* Permission denied */ 123 IAVF_AQ_RC_EFAULT = 11, /* Bad address */ 124 IAVF_AQ_RC_EBUSY = 12, /* Device or resource busy */ 125 IAVF_AQ_RC_EEXIST = 13, /* object already exists */ 126 IAVF_AQ_RC_EINVAL = 14, /* Invalid argument */ 127 IAVF_AQ_RC_ENOTTY = 15, /* Not a typewriter */ 128 IAVF_AQ_RC_ENOSPC = 16, /* No space left or alloc failure */ 129 IAVF_AQ_RC_ENOSYS = 17, /* Function not implemented */ 130 IAVF_AQ_RC_ERANGE = 18, /* Parameter out of range */ 131 IAVF_AQ_RC_EFLUSHED = 19, /* Cmd flushed due to prev cmd error */ 132 IAVF_AQ_RC_BAD_ADDR = 20, /* Descriptor contains a bad pointer */ 133 IAVF_AQ_RC_EMODE = 21, /* Op not allowed in current dev mode */ 134 IAVF_AQ_RC_EFBIG = 22, /* File too large */ 135 }; 136 137 /* Admin Queue command opcodes */ 138 enum iavf_admin_queue_opc { 139 /* aq commands */ 140 iavf_aqc_opc_get_version = 0x0001, 141 iavf_aqc_opc_driver_version = 0x0002, 142 iavf_aqc_opc_queue_shutdown = 0x0003, 143 iavf_aqc_opc_set_pf_context = 0x0004, 144 145 /* resource ownership */ 146 iavf_aqc_opc_request_resource = 0x0008, 147 iavf_aqc_opc_release_resource = 0x0009, 148 149 iavf_aqc_opc_list_func_capabilities = 0x000A, 150 iavf_aqc_opc_list_dev_capabilities = 0x000B, 151 152 /* Proxy commands */ 153 iavf_aqc_opc_set_proxy_config = 0x0104, 154 iavf_aqc_opc_set_ns_proxy_table_entry = 0x0105, 155 156 /* LAA */ 157 iavf_aqc_opc_mac_address_read = 0x0107, 158 iavf_aqc_opc_mac_address_write = 0x0108, 159 160 /* PXE */ 161 iavf_aqc_opc_clear_pxe_mode = 0x0110, 162 163 /* WoL commands */ 164 iavf_aqc_opc_set_wol_filter = 0x0120, 165 iavf_aqc_opc_get_wake_reason = 0x0121, 166 iavf_aqc_opc_clear_all_wol_filters = 0x025E, 167 168 /* internal switch commands */ 169 iavf_aqc_opc_get_switch_config = 0x0200, 170 iavf_aqc_opc_add_statistics = 0x0201, 171 iavf_aqc_opc_remove_statistics = 0x0202, 172 iavf_aqc_opc_set_port_parameters = 0x0203, 173 iavf_aqc_opc_get_switch_resource_alloc = 0x0204, 174 iavf_aqc_opc_set_switch_config = 0x0205, 175 iavf_aqc_opc_rx_ctl_reg_read = 0x0206, 176 iavf_aqc_opc_rx_ctl_reg_write = 0x0207, 177 178 iavf_aqc_opc_add_vsi = 0x0210, 179 iavf_aqc_opc_update_vsi_parameters = 0x0211, 180 iavf_aqc_opc_get_vsi_parameters = 0x0212, 181 182 iavf_aqc_opc_add_pv = 0x0220, 183 iavf_aqc_opc_update_pv_parameters = 0x0221, 184 iavf_aqc_opc_get_pv_parameters = 0x0222, 185 186 iavf_aqc_opc_add_veb = 0x0230, 187 iavf_aqc_opc_update_veb_parameters = 0x0231, 188 iavf_aqc_opc_get_veb_parameters = 0x0232, 189 190 iavf_aqc_opc_delete_element = 0x0243, 191 192 iavf_aqc_opc_add_macvlan = 0x0250, 193 iavf_aqc_opc_remove_macvlan = 0x0251, 194 iavf_aqc_opc_add_vlan = 0x0252, 195 iavf_aqc_opc_remove_vlan = 0x0253, 196 iavf_aqc_opc_set_vsi_promiscuous_modes = 0x0254, 197 iavf_aqc_opc_add_tag = 0x0255, 198 iavf_aqc_opc_remove_tag = 0x0256, 199 iavf_aqc_opc_add_multicast_etag = 0x0257, 200 iavf_aqc_opc_remove_multicast_etag = 0x0258, 201 iavf_aqc_opc_update_tag = 0x0259, 202 iavf_aqc_opc_add_control_packet_filter = 0x025A, 203 iavf_aqc_opc_remove_control_packet_filter = 0x025B, 204 iavf_aqc_opc_add_cloud_filters = 0x025C, 205 iavf_aqc_opc_remove_cloud_filters = 0x025D, 206 iavf_aqc_opc_clear_wol_switch_filters = 0x025E, 207 iavf_aqc_opc_replace_cloud_filters = 0x025F, 208 209 iavf_aqc_opc_add_mirror_rule = 0x0260, 210 iavf_aqc_opc_delete_mirror_rule = 0x0261, 211 212 /* Dynamic Device Personalization */ 213 iavf_aqc_opc_write_personalization_profile = 0x0270, 214 iavf_aqc_opc_get_personalization_profile_list = 0x0271, 215 216 /* DCB commands */ 217 iavf_aqc_opc_dcb_ignore_pfc = 0x0301, 218 iavf_aqc_opc_dcb_updated = 0x0302, 219 iavf_aqc_opc_set_dcb_parameters = 0x0303, 220 221 /* TX scheduler */ 222 iavf_aqc_opc_configure_vsi_bw_limit = 0x0400, 223 iavf_aqc_opc_configure_vsi_ets_sla_bw_limit = 0x0406, 224 iavf_aqc_opc_configure_vsi_tc_bw = 0x0407, 225 iavf_aqc_opc_query_vsi_bw_config = 0x0408, 226 iavf_aqc_opc_query_vsi_ets_sla_config = 0x040A, 227 iavf_aqc_opc_configure_switching_comp_bw_limit = 0x0410, 228 229 iavf_aqc_opc_enable_switching_comp_ets = 0x0413, 230 iavf_aqc_opc_modify_switching_comp_ets = 0x0414, 231 iavf_aqc_opc_disable_switching_comp_ets = 0x0415, 232 iavf_aqc_opc_configure_switching_comp_ets_bw_limit = 0x0416, 233 iavf_aqc_opc_configure_switching_comp_bw_config = 0x0417, 234 iavf_aqc_opc_query_switching_comp_ets_config = 0x0418, 235 iavf_aqc_opc_query_port_ets_config = 0x0419, 236 iavf_aqc_opc_query_switching_comp_bw_config = 0x041A, 237 iavf_aqc_opc_suspend_port_tx = 0x041B, 238 iavf_aqc_opc_resume_port_tx = 0x041C, 239 iavf_aqc_opc_configure_partition_bw = 0x041D, 240 /* hmc */ 241 iavf_aqc_opc_query_hmc_resource_profile = 0x0500, 242 iavf_aqc_opc_set_hmc_resource_profile = 0x0501, 243 244 /* phy commands*/ 245 246 /* phy commands*/ 247 iavf_aqc_opc_get_phy_abilities = 0x0600, 248 iavf_aqc_opc_set_phy_config = 0x0601, 249 iavf_aqc_opc_set_mac_config = 0x0603, 250 iavf_aqc_opc_set_link_restart_an = 0x0605, 251 iavf_aqc_opc_get_link_status = 0x0607, 252 iavf_aqc_opc_set_phy_int_mask = 0x0613, 253 iavf_aqc_opc_get_local_advt_reg = 0x0614, 254 iavf_aqc_opc_set_local_advt_reg = 0x0615, 255 iavf_aqc_opc_get_partner_advt = 0x0616, 256 iavf_aqc_opc_set_lb_modes = 0x0618, 257 iavf_aqc_opc_get_phy_wol_caps = 0x0621, 258 iavf_aqc_opc_set_phy_debug = 0x0622, 259 iavf_aqc_opc_upload_ext_phy_fm = 0x0625, 260 iavf_aqc_opc_run_phy_activity = 0x0626, 261 iavf_aqc_opc_set_phy_register = 0x0628, 262 iavf_aqc_opc_get_phy_register = 0x0629, 263 264 /* NVM commands */ 265 iavf_aqc_opc_nvm_read = 0x0701, 266 iavf_aqc_opc_nvm_erase = 0x0702, 267 iavf_aqc_opc_nvm_update = 0x0703, 268 iavf_aqc_opc_nvm_config_read = 0x0704, 269 iavf_aqc_opc_nvm_config_write = 0x0705, 270 iavf_aqc_opc_nvm_progress = 0x0706, 271 iavf_aqc_opc_oem_post_update = 0x0720, 272 iavf_aqc_opc_thermal_sensor = 0x0721, 273 274 /* virtualization commands */ 275 iavf_aqc_opc_send_msg_to_pf = 0x0801, 276 iavf_aqc_opc_send_msg_to_vf = 0x0802, 277 iavf_aqc_opc_send_msg_to_peer = 0x0803, 278 279 /* alternate structure */ 280 iavf_aqc_opc_alternate_write = 0x0900, 281 iavf_aqc_opc_alternate_write_indirect = 0x0901, 282 iavf_aqc_opc_alternate_read = 0x0902, 283 iavf_aqc_opc_alternate_read_indirect = 0x0903, 284 iavf_aqc_opc_alternate_write_done = 0x0904, 285 iavf_aqc_opc_alternate_set_mode = 0x0905, 286 iavf_aqc_opc_alternate_clear_port = 0x0906, 287 288 /* LLDP commands */ 289 iavf_aqc_opc_lldp_get_mib = 0x0A00, 290 iavf_aqc_opc_lldp_update_mib = 0x0A01, 291 iavf_aqc_opc_lldp_add_tlv = 0x0A02, 292 iavf_aqc_opc_lldp_update_tlv = 0x0A03, 293 iavf_aqc_opc_lldp_delete_tlv = 0x0A04, 294 iavf_aqc_opc_lldp_stop = 0x0A05, 295 iavf_aqc_opc_lldp_start = 0x0A06, 296 iavf_aqc_opc_get_cee_dcb_cfg = 0x0A07, 297 iavf_aqc_opc_lldp_set_local_mib = 0x0A08, 298 iavf_aqc_opc_lldp_stop_start_spec_agent = 0x0A09, 299 300 /* Tunnel commands */ 301 iavf_aqc_opc_add_udp_tunnel = 0x0B00, 302 iavf_aqc_opc_del_udp_tunnel = 0x0B01, 303 iavf_aqc_opc_set_rss_key = 0x0B02, 304 iavf_aqc_opc_set_rss_lut = 0x0B03, 305 iavf_aqc_opc_get_rss_key = 0x0B04, 306 iavf_aqc_opc_get_rss_lut = 0x0B05, 307 308 /* Async Events */ 309 iavf_aqc_opc_event_lan_overflow = 0x1001, 310 311 /* OEM commands */ 312 iavf_aqc_opc_oem_parameter_change = 0xFE00, 313 iavf_aqc_opc_oem_device_status_change = 0xFE01, 314 iavf_aqc_opc_oem_ocsd_initialize = 0xFE02, 315 iavf_aqc_opc_oem_ocbb_initialize = 0xFE03, 316 317 /* debug commands */ 318 iavf_aqc_opc_debug_read_reg = 0xFF03, 319 iavf_aqc_opc_debug_write_reg = 0xFF04, 320 iavf_aqc_opc_debug_modify_reg = 0xFF07, 321 iavf_aqc_opc_debug_dump_internals = 0xFF08, 322 }; 323 324 /* command structures and indirect data structures */ 325 326 /* Structure naming conventions: 327 * - no suffix for direct command descriptor structures 328 * - _data for indirect sent data 329 * - _resp for indirect return data (data which is both will use _data) 330 * - _completion for direct return data 331 * - _element_ for repeated elements (may also be _data or _resp) 332 * 333 * Command structures are expected to overlay the params.raw member of the basic 334 * descriptor, and as such cannot exceed 16 bytes in length. 335 */ 336 337 /* This macro is used to generate a compilation error if a structure 338 * is not exactly the correct length. It gives a divide by zero error if the 339 * structure is not of the correct size, otherwise it creates an enum that is 340 * never used. 341 */ 342 #define IAVF_CHECK_STRUCT_LEN(n, X) enum iavf_static_assert_enum_##X \ 343 { iavf_static_assert_##X = (n)/((sizeof(struct X) == (n)) ? 1 : 0) } 344 345 /* This macro is used extensively to ensure that command structures are 16 346 * bytes in length as they have to map to the raw array of that size. 347 */ 348 #define IAVF_CHECK_CMD_LENGTH(X) IAVF_CHECK_STRUCT_LEN(16, X) 349 350 /* Queue Shutdown (direct 0x0003) */ 351 struct iavf_aqc_queue_shutdown { 352 __le32 driver_unloading; 353 #define IAVF_AQ_DRIVER_UNLOADING 0x1 354 u8 reserved[12]; 355 }; 356 357 IAVF_CHECK_CMD_LENGTH(iavf_aqc_queue_shutdown); 358 359 #define IAVF_AQC_WOL_PRESERVE_STATUS 0x200 360 #define IAVF_AQC_MC_MAG_EN 0x0100 361 #define IAVF_AQC_WOL_PRESERVE_ON_PFR 0x0200 362 363 struct iavf_aqc_vsi_properties_data { 364 /* first 96 byte are written by SW */ 365 __le16 valid_sections; 366 #define IAVF_AQ_VSI_PROP_SWITCH_VALID 0x0001 367 #define IAVF_AQ_VSI_PROP_SECURITY_VALID 0x0002 368 #define IAVF_AQ_VSI_PROP_VLAN_VALID 0x0004 369 #define IAVF_AQ_VSI_PROP_CAS_PV_VALID 0x0008 370 #define IAVF_AQ_VSI_PROP_INGRESS_UP_VALID 0x0010 371 #define IAVF_AQ_VSI_PROP_EGRESS_UP_VALID 0x0020 372 #define IAVF_AQ_VSI_PROP_QUEUE_MAP_VALID 0x0040 373 #define IAVF_AQ_VSI_PROP_QUEUE_OPT_VALID 0x0080 374 #define IAVF_AQ_VSI_PROP_OUTER_UP_VALID 0x0100 375 #define IAVF_AQ_VSI_PROP_SCHED_VALID 0x0200 376 /* switch section */ 377 __le16 switch_id; /* 12bit id combined with flags below */ 378 #define IAVF_AQ_VSI_SW_ID_SHIFT 0x0000 379 #define IAVF_AQ_VSI_SW_ID_MASK (0xFFF << IAVF_AQ_VSI_SW_ID_SHIFT) 380 #define IAVF_AQ_VSI_SW_ID_FLAG_NOT_STAG 0x1000 381 #define IAVF_AQ_VSI_SW_ID_FLAG_ALLOW_LB 0x2000 382 #define IAVF_AQ_VSI_SW_ID_FLAG_LOCAL_LB 0x4000 383 u8 sw_reserved[2]; 384 /* security section */ 385 u8 sec_flags; 386 #define IAVF_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD 0x01 387 #define IAVF_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK 0x02 388 #define IAVF_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK 0x04 389 u8 sec_reserved; 390 /* VLAN section */ 391 __le16 pvid; /* VLANS include priority bits */ 392 __le16 fcoe_pvid; 393 u8 port_vlan_flags; 394 #define IAVF_AQ_VSI_PVLAN_MODE_SHIFT 0x00 395 #define IAVF_AQ_VSI_PVLAN_MODE_MASK (0x03 << \ 396 IAVF_AQ_VSI_PVLAN_MODE_SHIFT) 397 #define IAVF_AQ_VSI_PVLAN_MODE_TAGGED 0x01 398 #define IAVF_AQ_VSI_PVLAN_MODE_UNTAGGED 0x02 399 #define IAVF_AQ_VSI_PVLAN_MODE_ALL 0x03 400 #define IAVF_AQ_VSI_PVLAN_INSERT_PVID 0x04 401 #define IAVF_AQ_VSI_PVLAN_EMOD_SHIFT 0x03 402 #define IAVF_AQ_VSI_PVLAN_EMOD_MASK (0x3 << \ 403 IAVF_AQ_VSI_PVLAN_EMOD_SHIFT) 404 #define IAVF_AQ_VSI_PVLAN_EMOD_STR_BOTH 0x0 405 #define IAVF_AQ_VSI_PVLAN_EMOD_STR_UP 0x08 406 #define IAVF_AQ_VSI_PVLAN_EMOD_STR 0x10 407 #define IAVF_AQ_VSI_PVLAN_EMOD_NOTHING 0x18 408 u8 pvlan_reserved[3]; 409 /* ingress egress up sections */ 410 __le32 ingress_table; /* bitmap, 3 bits per up */ 411 #define IAVF_AQ_VSI_UP_TABLE_UP0_SHIFT 0 412 #define IAVF_AQ_VSI_UP_TABLE_UP0_MASK (0x7 << \ 413 IAVF_AQ_VSI_UP_TABLE_UP0_SHIFT) 414 #define IAVF_AQ_VSI_UP_TABLE_UP1_SHIFT 3 415 #define IAVF_AQ_VSI_UP_TABLE_UP1_MASK (0x7 << \ 416 IAVF_AQ_VSI_UP_TABLE_UP1_SHIFT) 417 #define IAVF_AQ_VSI_UP_TABLE_UP2_SHIFT 6 418 #define IAVF_AQ_VSI_UP_TABLE_UP2_MASK (0x7 << \ 419 IAVF_AQ_VSI_UP_TABLE_UP2_SHIFT) 420 #define IAVF_AQ_VSI_UP_TABLE_UP3_SHIFT 9 421 #define IAVF_AQ_VSI_UP_TABLE_UP3_MASK (0x7 << \ 422 IAVF_AQ_VSI_UP_TABLE_UP3_SHIFT) 423 #define IAVF_AQ_VSI_UP_TABLE_UP4_SHIFT 12 424 #define IAVF_AQ_VSI_UP_TABLE_UP4_MASK (0x7 << \ 425 IAVF_AQ_VSI_UP_TABLE_UP4_SHIFT) 426 #define IAVF_AQ_VSI_UP_TABLE_UP5_SHIFT 15 427 #define IAVF_AQ_VSI_UP_TABLE_UP5_MASK (0x7 << \ 428 IAVF_AQ_VSI_UP_TABLE_UP5_SHIFT) 429 #define IAVF_AQ_VSI_UP_TABLE_UP6_SHIFT 18 430 #define IAVF_AQ_VSI_UP_TABLE_UP6_MASK (0x7 << \ 431 IAVF_AQ_VSI_UP_TABLE_UP6_SHIFT) 432 #define IAVF_AQ_VSI_UP_TABLE_UP7_SHIFT 21 433 #define IAVF_AQ_VSI_UP_TABLE_UP7_MASK (0x7 << \ 434 IAVF_AQ_VSI_UP_TABLE_UP7_SHIFT) 435 __le32 egress_table; /* same defines as for ingress table */ 436 /* cascaded PV section */ 437 __le16 cas_pv_tag; 438 u8 cas_pv_flags; 439 #define IAVF_AQ_VSI_CAS_PV_TAGX_SHIFT 0x00 440 #define IAVF_AQ_VSI_CAS_PV_TAGX_MASK (0x03 << \ 441 IAVF_AQ_VSI_CAS_PV_TAGX_SHIFT) 442 #define IAVF_AQ_VSI_CAS_PV_TAGX_LEAVE 0x00 443 #define IAVF_AQ_VSI_CAS_PV_TAGX_REMOVE 0x01 444 #define IAVF_AQ_VSI_CAS_PV_TAGX_COPY 0x02 445 #define IAVF_AQ_VSI_CAS_PV_INSERT_TAG 0x10 446 #define IAVF_AQ_VSI_CAS_PV_ETAG_PRUNE 0x20 447 #define IAVF_AQ_VSI_CAS_PV_ACCEPT_HOST_TAG 0x40 448 u8 cas_pv_reserved; 449 /* queue mapping section */ 450 __le16 mapping_flags; 451 #define IAVF_AQ_VSI_QUE_MAP_CONTIG 0x0 452 #define IAVF_AQ_VSI_QUE_MAP_NONCONTIG 0x1 453 __le16 queue_mapping[16]; 454 #define IAVF_AQ_VSI_QUEUE_SHIFT 0x0 455 #define IAVF_AQ_VSI_QUEUE_MASK (0x7FF << IAVF_AQ_VSI_QUEUE_SHIFT) 456 __le16 tc_mapping[8]; 457 #define IAVF_AQ_VSI_TC_QUE_OFFSET_SHIFT 0 458 #define IAVF_AQ_VSI_TC_QUE_OFFSET_MASK (0x1FF << \ 459 IAVF_AQ_VSI_TC_QUE_OFFSET_SHIFT) 460 #define IAVF_AQ_VSI_TC_QUE_NUMBER_SHIFT 9 461 #define IAVF_AQ_VSI_TC_QUE_NUMBER_MASK (0x7 << \ 462 IAVF_AQ_VSI_TC_QUE_NUMBER_SHIFT) 463 /* queueing option section */ 464 u8 queueing_opt_flags; 465 #define IAVF_AQ_VSI_QUE_OPT_MULTICAST_UDP_ENA 0x04 466 #define IAVF_AQ_VSI_QUE_OPT_UNICAST_UDP_ENA 0x08 467 #define IAVF_AQ_VSI_QUE_OPT_TCP_ENA 0x10 468 #define IAVF_AQ_VSI_QUE_OPT_FCOE_ENA 0x20 469 #define IAVF_AQ_VSI_QUE_OPT_RSS_LUT_PF 0x00 470 #define IAVF_AQ_VSI_QUE_OPT_RSS_LUT_VSI 0x40 471 u8 queueing_opt_reserved[3]; 472 /* scheduler section */ 473 u8 up_enable_bits; 474 u8 sched_reserved; 475 /* outer up section */ 476 __le32 outer_up_table; /* same structure and defines as ingress tbl */ 477 u8 cmd_reserved[8]; 478 /* last 32 bytes are written by FW */ 479 __le16 qs_handle[8]; 480 #define IAVF_AQ_VSI_QS_HANDLE_INVALID 0xFFFF 481 __le16 stat_counter_idx; 482 __le16 sched_id; 483 u8 resp_reserved[12]; 484 }; 485 486 IAVF_CHECK_STRUCT_LEN(128, iavf_aqc_vsi_properties_data); 487 488 /* Get VEB Parameters (direct 0x0232) 489 * uses iavf_aqc_switch_seid for the descriptor 490 */ 491 struct iavf_aqc_get_veb_parameters_completion { 492 __le16 seid; 493 __le16 switch_id; 494 __le16 veb_flags; /* only the first/last flags from 0x0230 is valid */ 495 __le16 statistic_index; 496 __le16 vebs_used; 497 __le16 vebs_free; 498 u8 reserved[4]; 499 }; 500 501 IAVF_CHECK_CMD_LENGTH(iavf_aqc_get_veb_parameters_completion); 502 503 #define IAVF_LINK_SPEED_100MB_SHIFT 0x1 504 #define IAVF_LINK_SPEED_1000MB_SHIFT 0x2 505 #define IAVF_LINK_SPEED_10GB_SHIFT 0x3 506 #define IAVF_LINK_SPEED_40GB_SHIFT 0x4 507 #define IAVF_LINK_SPEED_20GB_SHIFT 0x5 508 #define IAVF_LINK_SPEED_25GB_SHIFT 0x6 509 510 enum iavf_aq_link_speed { 511 IAVF_LINK_SPEED_UNKNOWN = 0, 512 IAVF_LINK_SPEED_100MB = (1 << IAVF_LINK_SPEED_100MB_SHIFT), 513 IAVF_LINK_SPEED_1GB = (1 << IAVF_LINK_SPEED_1000MB_SHIFT), 514 IAVF_LINK_SPEED_10GB = (1 << IAVF_LINK_SPEED_10GB_SHIFT), 515 IAVF_LINK_SPEED_40GB = (1 << IAVF_LINK_SPEED_40GB_SHIFT), 516 IAVF_LINK_SPEED_20GB = (1 << IAVF_LINK_SPEED_20GB_SHIFT), 517 IAVF_LINK_SPEED_25GB = (1 << IAVF_LINK_SPEED_25GB_SHIFT), 518 }; 519 520 #define IAVF_AQ_LINK_UP_FUNCTION 0x01 521 522 /* Send to PF command (indirect 0x0801) id is only used by PF 523 * Send to VF command (indirect 0x0802) id is only used by PF 524 * Send to Peer PF command (indirect 0x0803) 525 */ 526 struct iavf_aqc_pf_vf_message { 527 __le32 id; 528 u8 reserved[4]; 529 __le32 addr_high; 530 __le32 addr_low; 531 }; 532 533 IAVF_CHECK_CMD_LENGTH(iavf_aqc_pf_vf_message); 534 535 /* Get CEE DCBX Oper Config (0x0A07) 536 * uses the generic descriptor struct 537 * returns below as indirect response 538 */ 539 540 #define IAVF_AQC_CEE_APP_FCOE_SHIFT 0x0 541 #define IAVF_AQC_CEE_APP_FCOE_MASK (0x7 << IAVF_AQC_CEE_APP_FCOE_SHIFT) 542 #define IAVF_AQC_CEE_APP_ISCSI_SHIFT 0x3 543 #define IAVF_AQC_CEE_APP_ISCSI_MASK (0x7 << IAVF_AQC_CEE_APP_ISCSI_SHIFT) 544 #define IAVF_AQC_CEE_APP_FIP_SHIFT 0x8 545 #define IAVF_AQC_CEE_APP_FIP_MASK (0x7 << IAVF_AQC_CEE_APP_FIP_SHIFT) 546 547 #define IAVF_AQC_CEE_PG_STATUS_SHIFT 0x0 548 #define IAVF_AQC_CEE_PG_STATUS_MASK (0x7 << IAVF_AQC_CEE_PG_STATUS_SHIFT) 549 #define IAVF_AQC_CEE_PFC_STATUS_SHIFT 0x3 550 #define IAVF_AQC_CEE_PFC_STATUS_MASK (0x7 << IAVF_AQC_CEE_PFC_STATUS_SHIFT) 551 #define IAVF_AQC_CEE_APP_STATUS_SHIFT 0x8 552 #define IAVF_AQC_CEE_APP_STATUS_MASK (0x7 << IAVF_AQC_CEE_APP_STATUS_SHIFT) 553 #define IAVF_AQC_CEE_FCOE_STATUS_SHIFT 0x8 554 #define IAVF_AQC_CEE_FCOE_STATUS_MASK (0x7 << IAVF_AQC_CEE_FCOE_STATUS_SHIFT) 555 #define IAVF_AQC_CEE_ISCSI_STATUS_SHIFT 0xB 556 #define IAVF_AQC_CEE_ISCSI_STATUS_MASK (0x7 << IAVF_AQC_CEE_ISCSI_STATUS_SHIFT) 557 #define IAVF_AQC_CEE_FIP_STATUS_SHIFT 0x10 558 #define IAVF_AQC_CEE_FIP_STATUS_MASK (0x7 << IAVF_AQC_CEE_FIP_STATUS_SHIFT) 559 560 /* struct iavf_aqc_get_cee_dcb_cfg_v1_resp was originally defined with 561 * word boundary layout issues, which the Linux compilers silently deal 562 * with by adding padding, making the actual struct larger than designed. 563 * However, the FW compiler for the NIC is less lenient and complains 564 * about the struct. Hence, the struct defined here has an extra byte in 565 * fields reserved3 and reserved4 to directly acknowledge that padding, 566 * and the new length is used in the length check macro. 567 */ 568 struct iavf_aqc_get_cee_dcb_cfg_v1_resp { 569 u8 reserved1; 570 u8 oper_num_tc; 571 u8 oper_prio_tc[4]; 572 u8 reserved2; 573 u8 oper_tc_bw[8]; 574 u8 oper_pfc_en; 575 u8 reserved3[2]; 576 __le16 oper_app_prio; 577 u8 reserved4[2]; 578 __le16 tlv_status; 579 }; 580 581 IAVF_CHECK_STRUCT_LEN(0x18, iavf_aqc_get_cee_dcb_cfg_v1_resp); 582 583 struct iavf_aqc_get_cee_dcb_cfg_resp { 584 u8 oper_num_tc; 585 u8 oper_prio_tc[4]; 586 u8 oper_tc_bw[8]; 587 u8 oper_pfc_en; 588 __le16 oper_app_prio; 589 __le32 tlv_status; 590 u8 reserved[12]; 591 }; 592 593 IAVF_CHECK_STRUCT_LEN(0x20, iavf_aqc_get_cee_dcb_cfg_resp); 594 595 /* Set Local LLDP MIB (indirect 0x0A08) 596 * Used to replace the local MIB of a given LLDP agent. e.g. DCBx 597 */ 598 struct iavf_aqc_lldp_set_local_mib { 599 #define SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT 0 600 #define SET_LOCAL_MIB_AC_TYPE_DCBX_MASK (1 << \ 601 SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT) 602 #define SET_LOCAL_MIB_AC_TYPE_LOCAL_MIB 0x0 603 #define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_SHIFT (1) 604 #define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_MASK (1 << \ 605 SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_SHIFT) 606 #define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS 0x1 607 u8 type; 608 u8 reserved0; 609 __le16 length; 610 u8 reserved1[4]; 611 __le32 address_high; 612 __le32 address_low; 613 }; 614 615 IAVF_CHECK_CMD_LENGTH(iavf_aqc_lldp_set_local_mib); 616 617 struct iavf_aqc_lldp_set_local_mib_resp { 618 #define SET_LOCAL_MIB_RESP_EVENT_TRIGGERED_MASK 0x01 619 u8 status; 620 u8 reserved[15]; 621 }; 622 623 IAVF_CHECK_STRUCT_LEN(0x10, iavf_aqc_lldp_set_local_mib_resp); 624 625 /* Stop/Start LLDP Agent (direct 0x0A09) 626 * Used for stopping/starting specific LLDP agent. e.g. DCBx 627 */ 628 struct iavf_aqc_lldp_stop_start_specific_agent { 629 #define IAVF_AQC_START_SPECIFIC_AGENT_SHIFT 0 630 #define IAVF_AQC_START_SPECIFIC_AGENT_MASK \ 631 (1 << IAVF_AQC_START_SPECIFIC_AGENT_SHIFT) 632 u8 command; 633 u8 reserved[15]; 634 }; 635 636 IAVF_CHECK_CMD_LENGTH(iavf_aqc_lldp_stop_start_specific_agent); 637 638 struct iavf_aqc_get_set_rss_key { 639 #define IAVF_AQC_SET_RSS_KEY_VSI_VALID (0x1 << 15) 640 #define IAVF_AQC_SET_RSS_KEY_VSI_ID_SHIFT 0 641 #define IAVF_AQC_SET_RSS_KEY_VSI_ID_MASK (0x3FF << \ 642 IAVF_AQC_SET_RSS_KEY_VSI_ID_SHIFT) 643 __le16 vsi_id; 644 u8 reserved[6]; 645 __le32 addr_high; 646 __le32 addr_low; 647 }; 648 649 IAVF_CHECK_CMD_LENGTH(iavf_aqc_get_set_rss_key); 650 651 struct iavf_aqc_get_set_rss_key_data { 652 u8 standard_rss_key[0x28]; 653 u8 extended_hash_key[0xc]; 654 }; 655 656 IAVF_CHECK_STRUCT_LEN(0x34, iavf_aqc_get_set_rss_key_data); 657 658 struct iavf_aqc_get_set_rss_lut { 659 #define IAVF_AQC_SET_RSS_LUT_VSI_VALID (0x1 << 15) 660 #define IAVF_AQC_SET_RSS_LUT_VSI_ID_SHIFT 0 661 #define IAVF_AQC_SET_RSS_LUT_VSI_ID_MASK (0x3FF << \ 662 IAVF_AQC_SET_RSS_LUT_VSI_ID_SHIFT) 663 __le16 vsi_id; 664 #define IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT 0 665 #define IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_MASK (0x1 << \ 666 IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) 667 668 #define IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_VSI 0 669 #define IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_PF 1 670 __le16 flags; 671 u8 reserved[4]; 672 __le32 addr_high; 673 __le32 addr_low; 674 }; 675 676 IAVF_CHECK_CMD_LENGTH(iavf_aqc_get_set_rss_lut); 677 #endif /* _IAVF_ADMINQ_CMD_H_ */ 678