/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcInstrAliases.td | 166 // t<cond> %icc, rs => t<cond> %icc, G0 + rs 168 (TICCrr G0, IntRegs:$rs2, condVal)>, 176 // t<cond> %xcc, rs => t<cond> %xcc, G0 + rs 178 (TXCCrr G0, IntRegs:$rs2, condVal)>, 186 // t<cond> rs=> t<cond> %icc, G0 + rs2 188 // (TICCrr G0, IntRegs:$rs2, condVal)>, 196 // t<cond> %icc, imm => t<cond> %icc, G0 + imm 198 (TICCri G0, i32imm:$imm, condVal)>, 204 // t<cond> %xcc, imm => t<cond> %xcc, G0 + imm 206 (TXCCri G0, i32imm:$imm, condVal)>, [all …]
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H A D | DelaySlotFiller.cpp | 419 && OrMI->getOperand(1).getReg() != SP::G0 in combineRestoreOR() 420 && OrMI->getOperand(2).getReg() != SP::G0) in combineRestoreOR() 424 && OrMI->getOperand(1).getReg() != SP::G0 in combineRestoreOR() 472 RestoreMI->getOperand(1).setReg(SP::G0); in combineRestoreSETHIi() 491 && MBBI->getOperand(0).getReg() == SP::G0 in tryCombineRestoreWithPrevInst() 492 && MBBI->getOperand(1).getReg() == SP::G0 in tryCombineRestoreWithPrevInst() 493 && MBBI->getOperand(2).getReg() == SP::G0); in tryCombineRestoreWithPrevInst()
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H A D | SparcFrameLowering.cpp | 225 BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0) in emitEpilogue() 226 .addReg(SP::G0); in emitEpilogue() 239 .addReg(SP::G0) in emitEpilogue() 242 .addReg(SP::G0) in emitEpilogue()
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H A D | SparcInstr64Bit.td | 64 def : Pat<(i64 0), (COPY (i64 G0))>, 72 def : Pat<(i64 simm13:$val), (ORri (i64 G0), (as_i32imm $val))>; 286 def : Pat<(store (i64 0), ADDRrr:$dst), (STXrr ADDRrr:$dst, (i64 G0))>; 287 def : Pat<(store (i64 0), ADDRri:$dst), (STXri ADDRri:$dst, (i64 G0))>; 493 def : Pat<(SPlo tglobaladdr:$in), (ORri (i64 G0), tglobaladdr:$in)>; 495 def : Pat<(SPlo tconstpool:$in), (ORri (i64 G0), tconstpool:$in)>; 499 def : Pat<(SPlo tglobaltlsaddr:$in), (ORri (i64 G0), tglobaltlsaddr:$in)>; 507 def : Pat<(SPlo tblockaddress:$in), (ORri (i64 G0), tblockaddress:$in)>;
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H A D | SparcRegisterInfo.td | 140 def G0 : Ri< 0, "g0">, DwarfRegNum<[0]> { 299 def G0_G1 : Rdi< 0, "g0", [G0, G1]>;
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H A D | SparcISelDAGToDAG.cpp | 153 R2 = CurDAG->getRegister(SP::G0, TLI->getPointerTy(CurDAG->getDataLayout())); in SelectADDRrr() 365 TopPart = CurDAG->getRegister(SP::G0, MVT::i32); in Select()
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H A D | SparcInstrInfo.cpp | 455 BuildMI(MBB, I, DL, get(SP::ORrr), DestReg).addReg(SP::G0) in copyPhysReg() 495 .addReg(SP::G0) in copyPhysReg() 517 MIB.addReg(SP::G0); in copyPhysReg()
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H A D | SparcInstrInfo.td | 1222 // to construct a MEMrr with fixed G0 registers. 1828 def : Pat<(i32 0), (COPY (i32 G0))>; 1831 (ORri (i32 G0), imm:$val)>; 1847 def : Pat<(SPlo tglobaladdr:$in), (ORri (i32 G0), tglobaladdr:$in)>; 1849 def : Pat<(SPlo tconstpool:$in), (ORri (i32 G0), tconstpool:$in)>; 1853 def : Pat<(SPlo tglobaltlsaddr:$in), (ORri (i32 G0), tglobaltlsaddr:$in)>; 1861 def : Pat<(SPlo tblockaddress:$in), (ORri (i32 G0), tblockaddress:$in)>; 1889 def : Pat<(store (i32 0), ADDRrr:$dst), (STrr ADDRrr:$dst, (i32 G0))>; 1890 def : Pat<(store (i32 0), ADDRri:$dst), (STri ADDRri:$dst, (i32 G0))>; 1925 // The upper part is done with ORrr instead of `COPY G0` [all …]
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H A D | SparcRegisterInfo.cpp | 71 Reserved.set(SP::G0); in getReservedRegs()
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/freebsd/sys/teken/ |
H A D | sequences | 74 G0SCS0 G0 SCS Special Graphics ^[ ( 0 75 G0SCS1 G0 SCS US ASCII ^[ ( 1 76 G0SCS2 G0 SCS Special Graphics ^[ ( 2 77 G0SCSA G0 SCS UK National ^[ ( A 78 G0SCSB G0 SCS US ASCII ^[ ( B
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/ |
H A D | SparcInstPrinter.cpp | 72 case SP::G0: // jmp $addr | ret | retl in printSparcAliasInstr() 156 if (Op1.isReg() && Op1.getReg() != SP::G0) { in printMemOperand() 164 PrintedFirstOperand && ((Op2.isReg() && Op2.getReg() == SP::G0) || in printMemOperand()
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/freebsd/contrib/bearssl/samples/ |
H A D | cert-ee-rsa.pem | 14 1u1P3z8wYAZnko5hhV8atYyzD2Gp+t9dxGQA6oexM199y6OFJG4sZTvqcz+G0/3o5ALGYWomF1IB
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/freebsd/sys/contrib/device-tree/src/arm/aspeed/ |
H A D | aspeed-bmc-vegman-n110.dts | 21 /*G0-G7*/ "CPU_ERR2","CPU_CATERR","PCH_BMC_THERMTRIP","","IRQ_NMI_EVENT","","","", 58 /*G0-G7*/ "MAIN_PLD_MINOR_REV_BIT0","","MAIN_PLD_MINOR_REV_BIT1","","MAIN_PLD_MINOR_REV_BIT2","","MAIN_PLD_MINOR_REV_BIT3","","MAIN_PLD_MAJOR_REV_BIT0","","MAIN_PLD_MAJOR_REV_BIT1","","MAIN_PLD_MAJOR_REV_BIT2","","MAIN_PLD_MAJOR_REV_BIT3","",
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H A D | aspeed-bmc-vegman-sx20.dts | 21 /*G0-G7*/ "CPU_ERR2","CPU_CATERR","PCH_BMC_THERMTRIP","","IRQ_NMI_EVENT","","","", 58 /*G0-G7*/ "MAIN_PLD_MINOR_REV_BIT0","","MAIN_PLD_MINOR_REV_BIT1","","MAIN_PLD_MINOR_REV_BIT2","","MAIN_PLD_MINOR_REV_BIT3","","MAIN_PLD_MAJOR_REV_BIT0","","MAIN_PLD_MAJOR_REV_BIT1","","MAIN_PLD_MAJOR_REV_BIT2","","MAIN_PLD_MAJOR_REV_BIT3","",
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H A D | aspeed-bmc-vegman-rx20.dts | 49 /*G0-G7*/ "CPU_ERR2","CPU_CATERR","PCH_BMC_THERMTRIP","SPI_BMC_BOOT_HD","IRQ_NMI_EVENT","SPI_BMC_BOOT_WP","SPI_BMC_BOOT_WP1","", 86 /*G0-G7*/ "MAIN_PLD_MINOR_REV_BIT0","","MAIN_PLD_MINOR_REV_BIT1","","MAIN_PLD_MINOR_REV_BIT2","","MAIN_PLD_MINOR_REV_BIT3","","MAIN_PLD_MAJOR_REV_BIT0","","MAIN_PLD_MAJOR_REV_BIT1","","MAIN_PLD_MAJOR_REV_BIT2","","MAIN_PLD_MAJOR_REV_BIT3","",
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H A D | aspeed-bmc-qcom-dc-scm-v1.dts | 101 /*G0-G7*/ "","","","","","","","",
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H A D | aspeed-bmc-inventec-transformers.dts | 277 /*G0-G7*/ "","","jtag-mux","","","","","",
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H A D | aspeed-bmc-amd-daytonax.dts | 132 /*G0-G7*/ "","","","","","","","",
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H A D | aspeed-bmc-amd-ethanolx.dts | 127 /*G0-G7*/ "BRD_REV_ID_3","BRD_REV_ID_2","BRD_REV_ID_1","BRD_REV_ID_0",
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H A D | aspeed-bmc-facebook-greatlakes.dts | 259 /*G0-G7*/ "","","","","","","","",
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H A D | aspeed-bmc-opp-nicole.dts | 226 /*G0-G7*/ "","","","","","","","",
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/freebsd/tests/sys/net/if_ovpn/ |
H A D | client2.key | 16 7mXGhq1ZS2a7/yt1ZLOtgQDkpwadQXnzjoOmTi9JmTXgGDkf/77G0/MqOtMRHqGy
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
H A D | SparcAsmParser.cpp | 160 Sparc::G0, Sparc::G1, Sparc::G2, Sparc::G3, 511 if (Reg >= Sparc::G0 && Reg <= Sparc::G7) in MorphToIntPairReg() 512 regIdx = Reg - Sparc::G0; in MorphToIntPairReg() 587 Op->Mem.OffsetReg = Sparc::G0; // always 0 in CreateMEMr() 677 MCOperand PrevReg = MCOperand::createReg(Sparc::G0); in expandSET() 740 .addReg(Sparc::G0) in expandSETX() 969 Operands.push_back(SparcOperand::MorphToMEMri(Sparc::G0, std::move(LHS))); in parseMEMOperand() 1315 if (OldMemOp.getMemOffsetReg() != Sparc::G0) { in parseOperand()
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/freebsd/sys/contrib/device-tree/src/arm/synaptics/ |
H A D | berlin2cd-google-chromecast.dts | 74 groups = "G0";
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/freebsd/sys/contrib/device-tree/Bindings/display/ |
H A D | arm,pl11x.txt | 52 index of the pad used as G0, third value index of the
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