1 /************************************************************************** 2 SPDX-License-Identifier: BSD-2-Clause 3 4 Copyright (c) 2007, Chelsio Inc. 5 All rights reserved. 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, 11 this list of conditions and the following disclaimer. 12 13 2. Neither the name of the Chelsio Corporation nor the names of its 14 contributors may be used to endorse or promote products derived from 15 this software without specific prior written permission. 16 17 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 21 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 POSSIBILITY OF SUCH DAMAGE. 28 29 ***************************************************************************/ 30 #ifndef _FIRMWARE_EXPORTS_H_ 31 #define _FIRMWARE_EXPORTS_H_ 32 33 /* WR OPCODES supported by the firmware. 34 */ 35 #define FW_WROPCODE_FORWARD 0x01 36 #define FW_WROPCODE_BYPASS 0x05 37 38 #define FW_WROPCODE_TUNNEL_TX_PKT 0x03 39 40 #define FW_WROPOCDE_ULPTX_DATA_SGL 0x00 41 #define FW_WROPCODE_ULPTX_MEM_READ 0x02 42 #define FW_WROPCODE_ULPTX_PKT 0x04 43 #define FW_WROPCODE_ULPTX_INVALIDATE 0x06 44 45 #define FW_WROPCODE_TUNNEL_RX_PKT 0x07 46 47 #define FW_WROPCODE_OFLD_GETTCB_RPL 0x08 48 #define FW_WROPCODE_OFLD_CLOSE_CON 0x09 49 #define FW_WROPCODE_OFLD_TP_ABORT_CON_REQ 0x0A 50 #define FW_WROPCODE_OFLD_HOST_ABORT_CON_RPL 0x0F 51 #define FW_WROPCODE_OFLD_HOST_ABORT_CON_REQ 0x0B 52 #define FW_WROPCODE_OFLD_TP_ABORT_CON_RPL 0x0C 53 #define FW_WROPCODE_OFLD_TX_DATA 0x0D 54 #define FW_WROPCODE_OFLD_TX_DATA_ACK 0x0E 55 56 #define FW_WROPCODE_RI_RDMA_INIT 0x10 57 #define FW_WROPCODE_RI_RDMA_WRITE 0x11 58 #define FW_WROPCODE_RI_RDMA_READ_REQ 0x12 59 #define FW_WROPCODE_RI_RDMA_READ_RESP 0x13 60 #define FW_WROPCODE_RI_SEND 0x14 61 #define FW_WROPCODE_RI_TERMINATE 0x15 62 #define FW_WROPCODE_RI_RDMA_READ 0x16 63 #define FW_WROPCODE_RI_RECEIVE 0x17 64 #define FW_WROPCODE_RI_BIND_MW 0x18 65 #define FW_WROPCODE_RI_FASTREGISTER_MR 0x19 66 #define FW_WROPCODE_RI_LOCAL_INV 0x1A 67 #define FW_WROPCODE_RI_MODIFY_QP 0x1B 68 #define FW_WROPCODE_RI_BYPASS 0x1C 69 70 #define FW_WROPOCDE_RSVD 0x1E 71 72 #define FW_WROPCODE_SGE_EGRESSCONTEXT_RR 0x1F 73 74 #define FW_WROPCODE_MNGT 0x1D 75 #define FW_MNGTOPCODE_PKTSCHED_SET 0x00 76 #define FW_MNGTOPCODE_WRC_SET 0x01 77 #define FW_MNGTOPCODE_TUNNEL_CR_FLUSH 0x02 78 79 /* Maximum size of a WR sent from the host, limited by the SGE. 80 * 81 * Note: WR coming from ULP or TP are only limited by CIM. 82 */ 83 #define FW_WR_SIZE 128 84 85 /* Maximum number of outstanding WRs sent from the host. Value must be 86 * programmed in the CTRL/TUNNEL/QP SGE Egress Context and used by 87 * offload modules to limit the number of WRs per connection. 88 */ 89 #define FW_T3_WR_NUM 16 90 #define FW_N3_WR_NUM 7 91 92 #ifndef N3 93 # define FW_WR_NUM FW_T3_WR_NUM 94 #else 95 # define FW_WR_NUM FW_N3_WR_NUM 96 #endif 97 98 /* FW_TUNNEL_NUM corresponds to the number of supported TUNNEL Queues. These 99 * queues must start at SGE Egress Context FW_TUNNEL_SGEEC_START and must 100 * start at 'TID' (or 'uP Token') FW_TUNNEL_TID_START. 101 * 102 * Ingress Traffic (e.g. DMA completion credit) for TUNNEL Queue[i] is sent 103 * to RESP Queue[i]. 104 */ 105 #define FW_TUNNEL_NUM 8 106 #define FW_TUNNEL_SGEEC_START 8 107 #define FW_TUNNEL_TID_START 65544 108 109 110 /* FW_CTRL_NUM corresponds to the number of supported CTRL Queues. These queues 111 * must start at SGE Egress Context FW_CTRL_SGEEC_START and must start at 'TID' 112 * (or 'uP Token') FW_CTRL_TID_START. 113 * 114 * Ingress Traffic for CTRL Queue[i] is sent to RESP Queue[i]. 115 */ 116 #define FW_CTRL_NUM 8 117 #define FW_CTRL_SGEEC_START 65528 118 #define FW_CTRL_TID_START 65536 119 120 /* FW_OFLD_NUM corresponds to the number of supported OFFLOAD Queues. These 121 * queues must start at SGE Egress Context FW_OFLD_SGEEC_START. 122 * 123 * Note: the 'uP Token' in the SGE Egress Context fields is irrelevant for 124 * OFFLOAD Queues, as the host is responsible for providing the correct TID in 125 * every WR. 126 * 127 * Ingress Trafffic for OFFLOAD Queue[i] is sent to RESP Queue[i]. 128 */ 129 #define FW_OFLD_NUM 8 130 #define FW_OFLD_SGEEC_START 0 131 132 /* 133 * 134 */ 135 #define FW_RI_NUM 1 136 #define FW_RI_SGEEC_START 65527 137 #define FW_RI_TID_START 65552 138 139 /* 140 * The RX_PKT_TID 141 */ 142 #define FW_RX_PKT_NUM 1 143 #define FW_RX_PKT_TID_START 65553 144 145 /* FW_WRC_NUM corresponds to the number of Work Request Context that supported 146 * by the firmware. 147 */ 148 #define FW_WRC_NUM \ 149 (65536 + FW_TUNNEL_NUM + FW_CTRL_NUM + FW_RI_NUM + FW_RX_PKT_NUM) 150 151 /* 152 * FW type and version. 153 */ 154 #define S_FW_VERSION_TYPE 28 155 #define M_FW_VERSION_TYPE 0xF 156 #define V_FW_VERSION_TYPE(x) ((x) << S_FW_VERSION_TYPE) 157 #define G_FW_VERSION_TYPE(x) \ 158 (((x) >> S_FW_VERSION_TYPE) & M_FW_VERSION_TYPE) 159 160 #define S_FW_VERSION_MAJOR 16 161 #define M_FW_VERSION_MAJOR 0xFFF 162 #define V_FW_VERSION_MAJOR(x) ((x) << S_FW_VERSION_MAJOR) 163 #define G_FW_VERSION_MAJOR(x) \ 164 (((x) >> S_FW_VERSION_MAJOR) & M_FW_VERSION_MAJOR) 165 166 #define S_FW_VERSION_MINOR 8 167 #define M_FW_VERSION_MINOR 0xFF 168 #define V_FW_VERSION_MINOR(x) ((x) << S_FW_VERSION_MINOR) 169 #define G_FW_VERSION_MINOR(x) \ 170 (((x) >> S_FW_VERSION_MINOR) & M_FW_VERSION_MINOR) 171 172 #define S_FW_VERSION_MICRO 0 173 #define M_FW_VERSION_MICRO 0xFF 174 #define V_FW_VERSION_MICRO(x) ((x) << S_FW_VERSION_MICRO) 175 #define G_FW_VERSION_MICRO(x) \ 176 (((x) >> S_FW_VERSION_MICRO) & M_FW_VERSION_MICRO) 177 178 #endif /* _FIRMWARE_EXPORTS_H_ */ 179