1 /*- SPDX-License-Identifier: BSD-2-Clause 2 * Copyright (c) 2022 Microsoft Corp. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #ifndef _HYPERV_COMMON_REG_H_ 28 #define _HYPERV_COMMON_REG_H_ 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 33 #define MSR_HV_GUESTID_BUILD_MASK 0xffffULL 34 #define MSR_HV_GUESTID_VERSION_MASK 0x0000ffffffff0000ULL 35 #define MSR_HV_GUESTID_VERSION_SHIFT 16 36 #define MSR_HV_GUESTID_OSID_MASK 0x00ff000000000000ULL 37 #define MSR_HV_GUESTID_OSID_SHIFT 48 38 #define MSR_HV_GUESTID_OSTYPE_MASK 0x7f00000000000000ULL 39 #define MSR_HV_GUESTID_OSTYPE_SHIFT 56 40 #define MSR_HV_GUESTID_OPENSRC 0x8000000000000000ULL 41 #define MSR_HV_GUESTID_OSTYPE_LINUX \ 42 ((0x01ULL << MSR_HV_GUESTID_OSTYPE_SHIFT) | MSR_HV_GUESTID_OPENSRC) 43 #define MSR_HV_GUESTID_OSTYPE_FREEBSD \ 44 ((0x02ULL << MSR_HV_GUESTID_OSTYPE_SHIFT) | MSR_HV_GUESTID_OPENSRC) 45 46 #define MSR_HV_HYPERCALL 0x40000001 47 #define MSR_HV_HYPERCALL_ENABLE 0x0001ULL 48 #define MSR_HV_HYPERCALL_RSVD_MASK 0x0ffeULL 49 #define MSR_HV_HYPERCALL_PGSHIFT 12 50 51 #define MSR_HV_REFERENCE_TSC 0x40000021 52 #define MSR_HV_REFTSC_ENABLE 0x0001ULL 53 #define MSR_HV_REFTSC_RSVD_MASK 0x0ffeULL 54 #define MSR_HV_REFTSC_PGSHIFT 12 55 56 #define MSR_HV_SCTRL_ENABLE 0x0001ULL 57 #define MSR_HV_SCTRL_RSVD_MASK 0xfffffffffffffffeULL 58 59 #define MSR_HV_SIEFP_ENABLE 0x0001ULL 60 #define MSR_HV_SIEFP_RSVD_MASK 0x0ffeULL 61 #define MSR_HV_SIEFP_PGSHIFT 12 62 #define MSR_HV_SIEFP_PGMASK (~0ULL << MSR_HV_SIEFP_PGSHIFT) 63 64 #define MSR_HV_SIMP_ENABLE 0x0001ULL 65 #define MSR_HV_SIMP_RSVD_MASK 0x0ffeULL 66 #define MSR_HV_SIMP_PGSHIFT 12 67 #define MSR_HV_SIMP_PGMASK (~0ULL << MSR_HV_SIMP_PGSHIFT) 68 69 #define MSR_HV_SINT_VECTOR_MASK 0x00ffULL 70 #define MSR_HV_SINT_RSVD1_MASK 0xff00ULL 71 #define MSR_HV_SINT_MASKED 0x00010000ULL 72 73 #define MSR_HV_SINT_RSVD2_MASK 0xfffffffffffc0000ULL 74 #define MSR_HV_SINT_RSVD_MASK (MSR_HV_SINT_RSVD1_MASK | \ 75 MSR_HV_SINT_RSVD2_MASK) 76 77 #define MSR_HV_STIMER0_CONFIG 0x400000b0 78 #define MSR_HV_STIMER_CFG_ENABLE 0x0001ULL 79 #define MSR_HV_STIMER_CFG_PERIODIC 0x0002ULL 80 #define MSR_HV_STIMER_CFG_LAZY 0x0004ULL 81 #define MSR_HV_STIMER_CFG_AUTOEN 0x0008ULL 82 #define MSR_HV_STIMER_CFG_SINT_MASK 0x000f0000ULL 83 #define MSR_HV_STIMER_CFG_SINT_SHIFT 16 84 85 #define MSR_HV_STIMER0_COUNT 0x400000b1 86 87 /* 88 * CPUID leaves 89 */ 90 91 #define CPUID_LEAF_HV_MAXLEAF 0x40000000 92 93 #define CPUID_LEAF_HV_INTERFACE 0x40000001 94 #define CPUID_HV_IFACE_HYPERV 0x31237648 /* HV#1 */ 95 96 /* EAX: features include/hyperv.h CPUID_HV_MSR */ 97 /* ECX: power management features */ 98 #define CPUPM_HV_CSTATE_MASK 0x000f /* deepest C-state */ 99 #define CPUPM_HV_C3_HPET 0x0010 /* C3 requires HPET */ 100 #define CPUPM_HV_CSTATE(f) ((f) & CPUPM_HV_CSTATE_MASK) 101 /* EDX: features3 */ 102 #define CPUID3_HV_MWAIT 0x0001 /* MWAIT */ 103 #define CPUID3_HV_XMM_HYPERCALL 0x0010 /* Hypercall input through 104 * XMM regs */ 105 #define CPUID3_HV_GUEST_IDLE 0x0020 /* guest idle */ 106 #define CPUID3_HV_NUMA 0x0080 /* NUMA distance query */ 107 #define CPUID3_HV_TIME_FREQ 0x0100 /* timer frequency query 108 * (TSC, LAPIC) */ 109 #define CPUID3_HV_MSR_CRASH 0x0400 /* MSRs for guest crash */ 110 #define CPUID_LEAF_HV_LIMITS 0x40000005 111 #define CPUID_LEAF_HV_HWFEATURES 0x40000006 112 113 /* 114 * Hyper-V Monitor Notification Facility 115 */ 116 struct hyperv_mon_param { 117 uint32_t mp_connid; 118 uint16_t mp_evtflag_ofs; 119 uint16_t mp_rsvd; 120 } __packed; 121 122 /* 123 * Hyper-V message types 124 */ 125 #define HYPERV_MSGTYPE_NONE 0 126 #define HYPERV_MSGTYPE_CHANNEL 1 127 #define HYPERV_MSGTYPE_TIMER_EXPIRED 0x80000010 128 129 /* 130 * Hypercall status codes 131 */ 132 #define HYPERCALL_STATUS_SUCCESS 0x0000 133 134 /* 135 * Hypercall input values 136 */ 137 #define HYPERCALL_POST_MESSAGE 0x005c 138 #define HYPERCALL_SIGNAL_EVENT 0x005d 139 140 /* 141 * Hypercall input parameters 142 */ 143 #define HYPERCALL_PARAM_ALIGN 8 144 #if 0 145 /* 146 * XXX 147 * <<Hypervisor Top Level Functional Specification 4.0b>> requires 148 * input parameters size to be multiple of 8, however, many post 149 * message input parameters do _not_ meet this requirement. 150 */ 151 #define HYPERCALL_PARAM_SIZE_ALIGN 8 152 #endif 153 154 /* 155 * HYPERCALL_POST_MESSAGE 156 */ 157 #define HYPERCALL_POSTMSGIN_DSIZE_MAX 240 158 #define HYPERCALL_POSTMSGIN_SIZE 256 159 160 struct hypercall_postmsg_in { 161 uint32_t hc_connid; 162 uint32_t hc_rsvd; 163 uint32_t hc_msgtype; /* HYPERV_MSGTYPE_ */ 164 uint32_t hc_dsize; 165 uint8_t hc_data[HYPERCALL_POSTMSGIN_DSIZE_MAX]; 166 } __packed; 167 CTASSERT(sizeof(struct hypercall_postmsg_in) == HYPERCALL_POSTMSGIN_SIZE); 168 169 /* 170 * HYPERCALL_SIGNAL_EVENT 171 * 172 * struct hyperv_mon_param. 173 */ 174 175 #endif /* i!__HYPERV_COMMON_REG_H__ */ 176